Commit Graph

88 Commits

Author SHA1 Message Date
C.S.M
75e2d77b26 feat(spi_flash): Add new xmc chip id 2024-09-23 19:06:23 +08:00
Armando
9c81fe6114 fix(mspi): fixed mspi clock wrong on ram loadable app on c61, enable tests on c5 c61 2024-09-10 11:12:03 +08:00
Armando
42cf1d8867 fix(mspi): fixed mspi clock wrong on ram loadable app on c5 2024-09-10 11:12:02 +08:00
Armando
6933ba39bc fix(system): fixed ram loadable app on p4 2024-09-09 10:31:48 +08:00
wanckl
19c6e77a31 fix(mspi): collect mspi iomux pin macro from iomux_reg.h to spi_pins.h 2024-09-03 13:55:00 +08:00
Marius Vikhammer
a04bedc4ce Merge branch 'bugfix/assert_ndebug' into 'master'
feat(newlib): add option to disable eval of expression in assert() when NDEBUG set

Closes IDFGH-479 and IDFGH-8692

See merge request espressif/esp-idf!32887
2024-08-26 15:42:31 +08:00
Marius Vikhammer
0d140f38ea fix(system): fixed warnings related to ununsed var if asserts disabled 2024-08-26 10:25:04 +08:00
C.S.M
fad2c740b1 feature(spi_flash): Promote the c61 mspi clock frequency from 40 to 80M 2024-08-22 10:58:50 +08:00
C.S.M
bc80476411 fix(mspi): Refactor mspi ll/soc for c5 and c61 2024-08-15 15:08:56 +08:00
C.S.M
9de3e737cf feat(spiram): Add spiram support on esp32c5 2024-07-04 19:29:04 +08:00
Song Ruo Jing
40f3bc2e57 feat(clk): Add basic clock support for esp32c5 mp
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
2024-06-26 14:26:34 +08:00
laokaiyao
21f870ecd5 remove(c5beta3): remove c5 beta3 system files 2024-06-17 12:02:15 +08:00
C.S.M
374c89097f feat(spi_flash): Adjust flash clock to real 80M clock, and support 32bit address on eco1 2024-05-27 19:42:47 +08:00
Armando
3e477681ac change(cpu_start): added note about internal ram only stage 2024-05-22 14:13:29 +08:00
harshal.patil
3eb6487bb5
fix(bootloader_support): Make esp_flash_encrypt.h independent of spi_flash_mmap.h header 2024-05-13 16:54:45 +05:30
wanlei
20c18ac52b feat(esp32c61): final introduce helloworld support 2024-04-02 10:50:52 +08:00
laokaiyao
24d6dcb829 feat(esp32c5mp): add system related components 2024-03-18 17:34:56 +08:00
Konstantin Kondrashov
3f89072af1 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
wanlei
ee02b71f1c feat(esp32c61): introduce target esp32c61 2024-03-01 21:12:25 +08:00
Konstantin Kondrashov
9ffafd53b2 fix(bootloader_support): Adds bootloader_flash_update_size() for the rest chips
Closes https://github.com/espressif/esp-idf/issues/13179
2024-02-14 17:41:20 +02:00
KonstantinKondrashov
b471d9d22c change(all): Clearing unused efuse rom headers 2024-01-22 18:02:55 +02:00
laokaiyao
d0a8f3e5c4 feat(esp32c5): support esptool on esp32c5 beta3 2024-01-09 13:11:11 +08:00
laokaiyao
11e19f40b9 feat(esp32c5): support to build hello world on esp32c5 beta3 2024-01-09 13:11:11 +08:00
Cao Sen Miao
cbcbecaa06 fix(spi_flash): Remove the useless print 2024-01-08 15:46:09 +08:00
Cao Sen Miao
2e83fa1c69 refactor(spi_flash): Use new spi_flash register sturct and deperecate the old one 2024-01-08 09:59:22 +08:00
laokaiyao
bb0879b3f8 feat(esp32c5): introduce target esp32c5 2023-11-28 16:14:17 +08:00
Xiao Xufeng
cc28674686 refactor(bootloader_flash): make cache enable more obvious 2023-11-01 02:01:45 +08:00
Xiao Xufeng
28f19cf0e6 fix(ram_app): Fixed issue ram_app can't use the SPI Flash
1st bootloader won't help to initialize the MSPI & cache properly as it
usually do when loading from flash. And the ram app doesn't have valid
headers.

Since there is no enough space in 2nd bootloader, we replace the
`bootloader_init_spi_flash` in the ram_app (!pure_ram_app), with an
customized alternative of it for the ram_app.

This alternative helps to initialize the MSPI & cache properly, without
the help of 1st bootloader or image headers.
2023-11-01 02:01:45 +08:00
Xiao Xufeng
1f5fb3f921 spi_flash: fixed issue that enabling HPM-DC by default may cause app unable to restart 2023-10-24 10:38:08 +08:00
Armando
17063b51e0 feat(soc): added flash operation range macros in ext_mem_defs.h 2023-10-16 17:19:04 +08:00
Cao Sen Miao
6cea72b76b fix(ota): Fixed OTA fail on octal flash with 32MB memory,
Closes https://github.com/espressif/esp-idf/issues/11903
2023-10-13 12:01:26 +08:00
Armando
ec27891af6 change(cache): swap cache hal arg 'type' and 'level' 2023-09-22 14:19:41 +08:00
Armando
ea38a2e9a4 feat(cache): support cache driver on esp32p4 2023-09-22 14:19:41 +08:00
Armando
de77ab3061 change(soc): added SOC_ prefix to mmu defs 2023-09-05 15:47:26 +08:00
Armando
706d684418 feat(esp32p4): introduced new target esp32p4, supported hello_world 2023-08-09 19:33:25 +08:00
Cao Sen Miao
91ad084c15 bugfix(spi_flash): Add flash resuem in bootloader on esp32s3 2023-08-03 18:26:00 +08:00
C.S.M
7927ec44f1 Merge branch 'bugfix/gd25lq255e_unlock' into 'master'
spi_flash: fix gd25lq255e unlock mistake

See merge request espressif/esp-idf!24859
2023-07-21 15:29:45 +08:00
Cao Sen Miao
44693a63b4 spi_flash: fix gd25lq255e unlock mistake 2023-07-18 10:12:46 +08:00
Chen Ji Chang
7ec38eb309 Merge branch 'bugfix/update_all_esp32xxx/rom/gpio.h_comments' into 'master'
gpio: Update the incorrect comments in rom/gpio.h

Closes IDFGH-10490

See merge request espressif/esp-idf!24487
2023-07-13 19:44:31 +08:00
Chen Jichang
b9c22b126a bugfix(driver/gpio):update the incorrect comment
There are some register description errors in parts of rom/gpio.h
This commit update the incorrect comments in rom/gpio.h And now
esp_rom_gpio.h is recommend instead of rom/gpio.h. So this commit adds
macro SIG_GPIO_OUT_IDX in esp_rom_gpio_connect_out_signal
function and removes the reference to gpio.h in some source files.

Closes https://github.com/espressif/esp-idf/issues/11737
2023-07-13 10:52:50 +08:00
wuzhenghui
d35ba005b8 bugfix: fix bootloader print wrong spi speed mode 2023-06-20 20:02:14 +08:00
Armando
101e6a18eb esp32p4: introduce the target
Add esp32p4 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32p4`
2023-06-13 15:16:11 +08:00
Xiao Xufeng
91fc40cfd9 esp32: stop using deprecated name PICOD2 to avoid confusion 2023-06-08 02:09:12 +08:00
Cao Sen Miao
1ec55b7d1a spi_flash: Add GD25LQ255E flash support 2023-05-17 18:28:57 +08:00
Marek Matej
d1a447f6c0 bootloader_support: fix register backup
By storing the 'user2' register during the early init
we fix the flash access issue, which occurs in the
Zephyr/MCUboot ports for ESP32.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-05-03 15:11:10 +02:00
Almir Okato
8d84a5315a Merge branch 'fix/bootloader_missing_include' into 'master'
bootloader_support: add missing header to bootloader_flash.c

See merge request espressif/esp-idf!23221
2023-04-27 06:26:49 +08:00
laokaiyao
b7053b46ef esp32h4: remove esp32h4 target from peripherals 2023-04-20 15:19:45 +08:00
Almir Okato
4b910ffa68 bootloader_support: add missing esp_rom_sys.h to bootloader_flash.c bootloader build
Missing esp_rom_sys.h header could cause declaration issues.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2023-04-15 16:49:12 -03:00
Cao Sen Miao
c7053641bc spi_flash: 32M bits address flash map, (for customer use only) 2023-04-14 11:37:09 +08:00
Song Ruo Jing
5816c47457 spi_flash: Move mspi clock source switch to 64M in 2nd bootloader code from rtc_clk.c to bootloader_flash_config_esp32h2.c 2023-04-04 16:09:47 +08:00