refactor(bootloader_flash): make cache enable more obvious

This commit is contained in:
Xiao Xufeng 2023-08-27 01:12:21 +08:00
parent 28f19cf0e6
commit cc28674686
8 changed files with 52 additions and 31 deletions

View File

@ -270,13 +270,10 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
default:
size = 2;
}
Cache_Read_Disable(0);
// Set flash chip size
esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);
// TODO: set mode
// TODO: set frequency
Cache_Flush(0);
Cache_Read_Enable(0);
}
static void print_flash_info(const esp_image_header_t *bootloader_hdr)
@ -381,7 +378,12 @@ esp_err_t bootloader_init_spi_flash(void)
#endif
print_flash_info(&bootloader_image_hdr);
Cache_Read_Disable(0);
update_flash_config(&bootloader_image_hdr);
Cache_Flush(0);
Cache_Read_Enable(0);
//ensure the flash is write-protected
bootloader_enable_wp();
return ESP_OK;
@ -465,7 +467,12 @@ void bootloader_flash_hardware_init(void)
/* Remaining parts in bootloader_init_spi_flash */
bootloader_flash_unlock();
Cache_Read_Disable(0);
update_flash_config(&hdr);
Cache_Flush(0);
Cache_Read_Enable(0);
//ensure the flash is write-protected
bootloader_enable_wp();
}

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@ -128,10 +128,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
default:
size = 2;
}
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
// Set flash chip size
esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
}
static void print_flash_info(const esp_image_header_t *bootloader_hdr)
@ -245,7 +243,11 @@ esp_err_t bootloader_init_spi_flash(void)
bootloader_print_mmu_page_size();
print_flash_info(&bootloader_image_hdr);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&bootloader_image_hdr);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();
return ESP_OK;
@ -306,9 +308,9 @@ void bootloader_flash_hardware_init(void)
bootloader_print_mmu_page_size();
cache_hal_disable(CACHE_TYPE_ALL);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&hdr);
cache_hal_enable(CACHE_TYPE_ALL);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();

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@ -139,10 +139,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
default:
size = 2;
}
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
// Set flash chip size
esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
}
static void print_flash_info(const esp_image_header_t *bootloader_hdr)
@ -253,7 +251,11 @@ esp_err_t bootloader_init_spi_flash(void)
#endif
print_flash_info(&bootloader_image_hdr);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&bootloader_image_hdr);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();
return ESP_OK;
@ -316,9 +318,9 @@ void bootloader_flash_hardware_init(void)
bootloader_spi_flash_resume();
bootloader_flash_unlock();
cache_hal_disable(CACHE_TYPE_ALL);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&hdr);
cache_hal_enable(CACHE_TYPE_ALL);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();

View File

@ -103,10 +103,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
default:
size = 2;
}
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
// Set flash chip size
esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
}
static void print_flash_info(const esp_image_header_t *bootloader_hdr)
@ -214,7 +212,11 @@ esp_err_t bootloader_init_spi_flash(void)
#endif
print_flash_info(&bootloader_image_hdr);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&bootloader_image_hdr);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();
return ESP_OK;
@ -277,9 +279,9 @@ void bootloader_flash_hardware_init(void)
bootloader_spi_flash_resume();
bootloader_flash_unlock();
cache_hal_disable(CACHE_TYPE_ALL);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&hdr);
cache_hal_enable(CACHE_TYPE_ALL);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();

View File

@ -110,10 +110,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
default:
size = 2;
}
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
// Set flash chip size
esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
}
static void print_flash_info(const esp_image_header_t *bootloader_hdr)
@ -216,7 +214,11 @@ esp_err_t bootloader_init_spi_flash(void)
#endif
print_flash_info(&bootloader_image_hdr);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&bootloader_image_hdr);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();
return ESP_OK;
@ -280,9 +282,9 @@ void bootloader_flash_hardware_init(void)
bootloader_spi_flash_resume();
bootloader_flash_unlock();
cache_hal_disable(CACHE_TYPE_ALL);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&hdr);
cache_hal_enable(CACHE_TYPE_ALL);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();

View File

@ -97,10 +97,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
default:
size = 2;
}
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
// Set flash chip size
esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
}
static void print_flash_info(const esp_image_header_t *bootloader_hdr)
@ -202,7 +200,11 @@ esp_err_t bootloader_init_spi_flash(void)
#endif
print_flash_info(&bootloader_image_hdr);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&bootloader_image_hdr);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();
return ESP_OK;
@ -264,9 +266,9 @@ void bootloader_flash_hardware_init(void)
bootloader_spi_flash_resume();
bootloader_flash_unlock();
cache_hal_disable(CACHE_TYPE_ALL);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&hdr);
cache_hal_enable(CACHE_TYPE_ALL);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();

View File

@ -153,12 +153,10 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
default:
size = 2;
}
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
// Set flash chip size
esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);
// TODO: set mode
// TODO: set frequency
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
}
static void print_flash_info(const esp_image_header_t *bootloader_hdr)
@ -271,7 +269,11 @@ esp_err_t bootloader_init_spi_flash(void)
#endif
print_flash_info(&bootloader_image_hdr);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&bootloader_image_hdr);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();
return ESP_OK;
@ -334,9 +336,9 @@ void bootloader_flash_hardware_init(void)
bootloader_flash_unlock();
cache_hal_disable(CACHE_TYPE_ALL);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&hdr);
cache_hal_enable(CACHE_TYPE_ALL);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();

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@ -160,12 +160,10 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
size = 2;
}
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
// Set flash chip size
esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);
// TODO: set mode
// TODO: set frequency
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
}
static void print_flash_info(const esp_image_header_t *bootloader_hdr)
@ -294,7 +292,11 @@ esp_err_t bootloader_init_spi_flash(void)
bootloader_flash_32bits_address_map_enable(bootloader_flash_get_spi_mode());
#endif
print_flash_info(&bootloader_image_hdr);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&bootloader_image_hdr);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();
return ESP_OK;
@ -365,9 +367,9 @@ void bootloader_flash_hardware_init(void)
bootloader_flash_32bits_address_map_enable(bootloader_flash_get_spi_mode());
#endif
cache_hal_disable(CACHE_TYPE_ALL);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&hdr);
cache_hal_enable(CACHE_TYPE_ALL);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//ensure the flash is write-protected
bootloader_enable_wp();