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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
refactor(bootloader_flash): make cache enable more obvious
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28f19cf0e6
commit
cc28674686
@ -270,13 +270,10 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
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default:
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size = 2;
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}
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Cache_Read_Disable(0);
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// Set flash chip size
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esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);
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// TODO: set mode
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// TODO: set frequency
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Cache_Flush(0);
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Cache_Read_Enable(0);
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}
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static void print_flash_info(const esp_image_header_t *bootloader_hdr)
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@ -381,7 +378,12 @@ esp_err_t bootloader_init_spi_flash(void)
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#endif
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print_flash_info(&bootloader_image_hdr);
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Cache_Read_Disable(0);
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update_flash_config(&bootloader_image_hdr);
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Cache_Flush(0);
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Cache_Read_Enable(0);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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return ESP_OK;
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@ -465,7 +467,12 @@ void bootloader_flash_hardware_init(void)
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/* Remaining parts in bootloader_init_spi_flash */
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bootloader_flash_unlock();
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Cache_Read_Disable(0);
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update_flash_config(&hdr);
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Cache_Flush(0);
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Cache_Read_Enable(0);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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}
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@ -128,10 +128,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
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default:
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size = 2;
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}
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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// Set flash chip size
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esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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static void print_flash_info(const esp_image_header_t *bootloader_hdr)
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@ -245,7 +243,11 @@ esp_err_t bootloader_init_spi_flash(void)
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bootloader_print_mmu_page_size();
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print_flash_info(&bootloader_image_hdr);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&bootloader_image_hdr);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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return ESP_OK;
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@ -306,9 +308,9 @@ void bootloader_flash_hardware_init(void)
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bootloader_print_mmu_page_size();
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cache_hal_disable(CACHE_TYPE_ALL);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&hdr);
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cache_hal_enable(CACHE_TYPE_ALL);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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@ -139,10 +139,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
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default:
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size = 2;
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}
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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// Set flash chip size
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esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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static void print_flash_info(const esp_image_header_t *bootloader_hdr)
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@ -253,7 +251,11 @@ esp_err_t bootloader_init_spi_flash(void)
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#endif
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print_flash_info(&bootloader_image_hdr);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&bootloader_image_hdr);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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return ESP_OK;
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@ -316,9 +318,9 @@ void bootloader_flash_hardware_init(void)
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bootloader_spi_flash_resume();
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bootloader_flash_unlock();
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cache_hal_disable(CACHE_TYPE_ALL);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&hdr);
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cache_hal_enable(CACHE_TYPE_ALL);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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@ -103,10 +103,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
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default:
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size = 2;
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}
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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// Set flash chip size
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esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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static void print_flash_info(const esp_image_header_t *bootloader_hdr)
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@ -214,7 +212,11 @@ esp_err_t bootloader_init_spi_flash(void)
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#endif
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print_flash_info(&bootloader_image_hdr);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&bootloader_image_hdr);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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return ESP_OK;
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@ -277,9 +279,9 @@ void bootloader_flash_hardware_init(void)
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bootloader_spi_flash_resume();
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bootloader_flash_unlock();
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cache_hal_disable(CACHE_TYPE_ALL);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&hdr);
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cache_hal_enable(CACHE_TYPE_ALL);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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@ -110,10 +110,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
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default:
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size = 2;
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}
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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// Set flash chip size
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esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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static void print_flash_info(const esp_image_header_t *bootloader_hdr)
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@ -216,7 +214,11 @@ esp_err_t bootloader_init_spi_flash(void)
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#endif
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print_flash_info(&bootloader_image_hdr);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&bootloader_image_hdr);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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return ESP_OK;
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@ -280,9 +282,9 @@ void bootloader_flash_hardware_init(void)
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bootloader_spi_flash_resume();
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bootloader_flash_unlock();
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cache_hal_disable(CACHE_TYPE_ALL);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&hdr);
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cache_hal_enable(CACHE_TYPE_ALL);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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@ -97,10 +97,8 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
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default:
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size = 2;
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}
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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// Set flash chip size
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esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); // TODO: set mode
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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static void print_flash_info(const esp_image_header_t *bootloader_hdr)
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@ -202,7 +200,11 @@ esp_err_t bootloader_init_spi_flash(void)
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#endif
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print_flash_info(&bootloader_image_hdr);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&bootloader_image_hdr);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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return ESP_OK;
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@ -264,9 +266,9 @@ void bootloader_flash_hardware_init(void)
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bootloader_spi_flash_resume();
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bootloader_flash_unlock();
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cache_hal_disable(CACHE_TYPE_ALL);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&hdr);
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cache_hal_enable(CACHE_TYPE_ALL);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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@ -153,12 +153,10 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
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default:
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size = 2;
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}
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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// Set flash chip size
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esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);
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// TODO: set mode
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// TODO: set frequency
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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static void print_flash_info(const esp_image_header_t *bootloader_hdr)
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@ -271,7 +269,11 @@ esp_err_t bootloader_init_spi_flash(void)
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#endif
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print_flash_info(&bootloader_image_hdr);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&bootloader_image_hdr);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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return ESP_OK;
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@ -334,9 +336,9 @@ void bootloader_flash_hardware_init(void)
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bootloader_flash_unlock();
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cache_hal_disable(CACHE_TYPE_ALL);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&hdr);
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cache_hal_enable(CACHE_TYPE_ALL);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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@ -160,12 +160,10 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
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size = 2;
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}
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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// Set flash chip size
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esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);
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// TODO: set mode
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// TODO: set frequency
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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static void print_flash_info(const esp_image_header_t *bootloader_hdr)
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@ -294,7 +292,11 @@ esp_err_t bootloader_init_spi_flash(void)
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bootloader_flash_32bits_address_map_enable(bootloader_flash_get_spi_mode());
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#endif
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print_flash_info(&bootloader_image_hdr);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&bootloader_image_hdr);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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return ESP_OK;
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@ -365,9 +367,9 @@ void bootloader_flash_hardware_init(void)
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bootloader_flash_32bits_address_map_enable(bootloader_flash_get_spi_mode());
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#endif
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cache_hal_disable(CACHE_TYPE_ALL);
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cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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update_flash_config(&hdr);
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cache_hal_enable(CACHE_TYPE_ALL);
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cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//ensure the flash is write-protected
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bootloader_enable_wp();
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