fuzhibo
589646a31e
update touch with review advice
2021-10-08 10:39:46 +08:00
fuzhibo
057b9d61b5
driver(touch): support touch sensor for esp32s3 platform
2021-10-08 10:39:46 +08:00
Jiang Jiang Jian
f5ae8b0533
Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master'
...
support RTC8M and XTAL power domain in light sleep mode
Closes IDF-3419
See merge request espressif/esp-idf!15152
2021-09-27 04:02:29 +00:00
Li Shuai
f5b39a7cde
esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator
2021-09-16 14:40:46 +08:00
Armando
c45c6f52f1
adc: support adc efuse-based calibration on esp32s3
2021-09-14 11:42:50 +08:00
Li Shuai
e44ead5356
Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep
2021-09-13 17:36:54 +08:00
morris
9d97d01679
Merge branch 'bugfix/mcpwm_cpp_reserved_word' into 'master'
...
bugfix/mcpwm: rename invalid keyword 'operator'
Closes IDFGH-5840
See merge request espressif/esp-idf!15159
2021-09-13 03:10:04 +00:00
SalimTerryLi
d9f4ae02f1
mcpwm: rename keyword 'operator' which is not valid in cpp
...
Closes https://github.com/espressif/esp-idf/issues/7542
2021-09-10 12:41:42 +08:00
baohongde
006a10b050
components/doc: Update doc about high-level interrupt
...
some bugfix.
2021-09-09 20:40:09 +08:00
baohongde
6d63fe06fa
components/os: add config option to choose system check intterupt level.
2021-09-09 11:29:12 +08:00
baohongde
d1db2df316
components/bt: High level interrupt in bluetooth
...
components/os: Move ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and ETS_DPORT_INUM to l5 interrupt
components/os: high level interrupt(5)
components/os: hli_api: meta queue: fix out of bounds access, check for overflow
components/os: hli: don't spill registers, instead save them to a separate region
Level 4 interrupt has a chance of preempting a window overflow or underflow exception.
Therefore it is not possible to use standard context save functions,
as the SP on entry to Level 4 interrupt may be invalid (e.g. in WindowUnderflow4).
Instead, mask window overflows and save the entire general purpose register file,
plus some of the special registers.
Then clear WindowStart, allowing the C handler to execute without spilling the old windows.
On exit from the interrupt handler, do everything in reverse.
components/bt: using high level interrupt in lc
components/os: Add DRAM_ATTR to avoid feature `Allow .bss segment placed in external memory`
components/bt: optimize code structure
components/os: Modify the BT assert process to adapt to coredump and HLI
components/os: Disable exception mode after saving special registers
To store some registers first, avoid stuck due to live lock after disabling exception mode
components/os: using dport instead of AHB in BT to fix live lock
components/bt: Fix hli queue send error
components/bt: Fix CI fail
# Conflicts:
# components/bt/CMakeLists.txt
# components/bt/component.mk
# components/bt/controller/bt.c
# components/bt/controller/lib
# components/esp_common/src/int_wdt.c
# components/esp_system/port/soc/esp32/dport_panic_highint_hdl.S
# components/soc/esp32/include/soc/soc.h
2021-09-09 11:29:06 +08:00
laokaiyao
c5afd7ce34
i2s: fix write failure on ESP32 in 32bit slave mode
2021-09-03 17:36:44 +08:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
...
update all struct headers to be more "standardized":
- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199
added helper macros to force peripheral registers being accessed in 32 bitwidth
added a check script into ci
2021-08-30 13:50:58 +08:00
Michael (XIAO Xufeng)
375145ecdb
Merge branch 'feature/mcpwm_bldc_hall_example' into 'master'
...
mcpwm: bldc hall example
Closes IDF-3648
See merge request espressif/esp-idf!14578
2021-08-26 08:28:27 +00:00
Song Ruo Jing
fe5c87cb3c
Merge branch 'bugfix/enable_gpio_20' into 'master'
...
gpio: Enable IO20 on ESP32
Closes IDFGH-5140
See merge request espressif/esp-idf!14881
2021-08-25 07:25:37 +00:00
morris
3bfd8f5d5f
mcpwm: update register file according to TRM
2021-08-24 15:38:46 +08:00
Alberto García Hierro
6deaefde69
Enable IO20 on ESP32
...
Some newer ESP32 variants (like ESP32-PICO-V3 and ESP32-PICO-MINI-02)
do implement this pin and it can be used as a normal GPIO.
Fixes #6016
Fixes #6837
Closes https://github.com/espressif/esp-idf/pull/6918
2021-08-20 14:05:38 +08:00
morris
bb87fd8f08
Merge branch 'refactor/pcnt_driver_esp32s3' into 'master'
...
pcnt: soc update and hal refactor
See merge request espressif/esp-idf!14698
2021-08-20 04:23:15 +00:00
morris
1656cee69d
i2s: correct soc info
...
1. remove non-exist I2S instance
2. update soc_caps.h, i2s_ll.h
2021-08-10 21:06:59 +08:00
suda-morris
9920271c21
pcnt: update pcnt soc data for all targets
2021-08-10 17:19:21 +08:00
Wang Meng Yang
8652b1d576
Merge branch 'bugfix/btdm_esp32_ble_white_list_connection_fail' into 'master'
...
Fixed ESP32 BLE can't resolve the peer address when enable white list
See merge request espressif/esp-idf!14348
2021-08-09 06:46:08 +00:00
Michael (XIAO Xufeng)
947980ecac
Merge branch 'bugfix/uart_set_pin_use_iomux' into 'master'
...
uart: uart_set_pin function will now use IOMUX whenever possible
Closes IDF-3183
See merge request espressif/esp-idf!14318
2021-08-05 04:17:29 +00:00
xiewenxiang
1cc0f6aac5
Fixed ESP32 BLE can't resolve the peer address when enable white list
2021-08-04 22:00:38 +08:00
Omar Chebib
779e7400b0
uart: uart_set_pin function will now use IOMUX whenever possible
...
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
2021-08-04 12:48:30 +08:00
laokaiyao
d51b85989b
doc/i2s: update i2s programming guide on s3 & c3
2021-08-04 10:20:03 +08:00
houwenxiang
2f1247e1c4
driver: support I2S on ESP32-S3 & ESP32-C3
...
1. refactor I2S driver.
2. support TDM mode for esp2s3 & esp32c3.
2021-08-04 10:20:03 +08:00
Konstantin Kondrashov
4972605b16
esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt
2021-08-03 14:35:29 +08:00
morris
88c87bfe56
mcpwm: update hal and soc naming
2021-07-26 22:32:45 +08:00
morris
1560d6f1ba
soc: add reset reasons in soc component
2021-07-13 10:45:38 +08:00
Angus Gratton
0f1b24891b
Merge branch 'bugfix/esp32_u4wdh_quad_io' into 'master'
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bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip
Closes IDFGH-4353
See merge request espressif/esp-idf!13111
2021-06-07 04:50:54 +00:00
Angus Gratton
dc6b950257
doc: Add performance guides for execuion speed, binary size, RAM usage
...
Closes https://github.com/espressif/esp-idf/issues/7007
Closes https://github.com/espressif/esp-idf/issues/6715
Closes https://github.com/espressif/esp-idf/issues/3781
Closes https://github.com/espressif/esp-idf/issues/2566
2021-06-03 13:55:34 +10:00
Ivan Grokhotkov
17c65dad27
soc: add esp32s3 sdmmc support
...
* sync the latest struct header file from ESP32
* add soc_caps.h macros to distinguish between IO MUX and GPIO Matrix
support in SDMMC on different chips.
* store GPIO matrix signal numbers in sdmmc_slot_info_t
2021-05-10 23:21:27 +02:00
Cao Sen Miao
0d81edb174
spi_flash: refactoring flash encryption into new api
2021-04-25 17:09:25 +08:00
Ivan Grokhotkov
ea7d020f20
Merge branch 'feature/ubsan' into 'master'
...
system: add option to enable undefined behavior sanitizer (UBSAN)
Closes IDF-166 and IDF-1824
See merge request espressif/esp-idf!11318
2021-04-23 09:27:42 +00:00
Ivan Grokhotkov
da90775d98
hal: mpu: fix signed overflow error
2021-04-22 23:33:47 +02:00
Darian Leung
54eb152a96
TWAI: Simply caps and remove unused caps
2021-04-16 18:36:18 +08:00
Angus Gratton
268b23db96
bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip
...
Closes https://github.com/espressif/esp-idf/issues/6191
2021-04-12 18:49:17 +10:00
morris
75dfd970b4
dac: added DAC support macro
...
Remove DAC support on ESP32-S3
2021-04-12 12:04:46 +08:00
Armando
9b9ea71ff9
spi: remove HSPI macro on esp32c3 and esp32s3
2021-04-06 13:42:49 +08:00
Michael (XIAO Xufeng)
3a90d51831
Merge branch 'refactor/using_isr_callback_in_timer_example' into 'master'
...
TIMG: clean up timer example and add example test
Closes IDF-2722, IDF-2766, and IDF-2347
See merge request espressif/esp-idf!12218
2021-03-22 06:36:32 +00:00
morris
f5ca47c0fc
mcpwm: rename macros related to soc capbility
2021-03-16 21:53:59 +08:00
morris
5a520cacf1
timer_group: correct timer_ll_set_divider
2021-03-16 17:56:37 +08:00
Angus Gratton
fd164b82b6
Merge branch 'refactor/move_from_xtensa' into 'master'
...
Movements from xtensa
Closes IDF-2164
See merge request espressif/esp-idf!10556
2021-03-11 00:24:25 +00:00
Renz Bagaporo
1efdcd69d9
xtensa: move out trax
2021-02-26 19:45:48 +08:00
Xia Xiaotian
f53c0c5b87
esp_wifi: store PHY digital registers before disabling PHY and load
...
them after enabling PHY
2021-02-26 11:29:50 +08:00
morris
7b37158ede
rmt: distinguish group and channel in HAL layer
2021-02-25 12:42:23 +08:00
morris
6dc7f95342
mcpwm: fix wrong meta information
2021-02-22 20:23:35 +08:00
Angus Gratton
2ec04b57de
soc esp32: Removes parentheses from RTC_MEM_xyz macros that expand directly to single numbers
...
Not necessary in these cases, and prevents parens from expanding into the
assembly code such as added in 562ab01046
-
a pattern which is accepted by GCC assembler but illegal syntax for LLVM assembler.
As reported https://github.com/espressif/llvm-project/issues/35#issuecomment-726853574
2021-02-08 10:08:01 +11:00
Michael (XIAO Xufeng)
d7d1dee208
system: reset dma when soft reset
2021-01-25 04:51:40 +00:00
Angus Gratton
fe8a891de9
Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master'
...
bootloader/esp32c3: Support secure boot
Closes IDF-2115
See merge request espressif/esp-idf!11797
2021-01-21 08:42:49 +08:00
KonstantinKondrashov
88c5fe49b8
soc: Adds a soc_caps define for all chips to define the number of boot key digests
2021-01-19 20:51:13 +08:00
Li Shuai
aa7fd175b9
light sleep: light sleep support for esp32c3
2021-01-19 14:50:58 +08:00
ninh
27aa6c289f
components/pm: Add slp gpio configure workaround
2021-01-15 15:34:45 +08:00
morris
e6d23a35ec
gdma: dynamic alloc DMA channels
2021-01-13 10:52:27 +08:00
ninh
dc7bdb9857
adjust lightsleep overhead time and cali slowclk
2021-01-06 03:40:28 +00:00
Marius Vikhammer
eb788deb03
esp_hw_support: merge C3 changes to master
...
Merge RTC related C3 changes to master
2020-12-30 12:20:41 +08:00
Angus Gratton
c3ba995f2c
Merge branch 'ci/ccomp_performance_tests' into 'master'
...
unit_test: Refactor all performance tests that rely on cache compensated timer
See merge request espressif/esp-idf!11709
2020-12-24 13:44:52 +08:00
Angus Gratton
fa892eb017
soc: Explain units for rtc_clk_cal() function, fix typo
2020-12-23 09:53:24 +11:00
Cao Sen Miao
e338a2e3df
rtc: add function to en/disable the rtc clock
2020-12-23 09:53:24 +11:00
Marius Vikhammer
0a95151a75
unit_test: Refactor all performance tests that rely on cache compensated timer
...
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.
This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
2020-12-22 18:56:24 +11:00
Cao Sen Miao
0736c91d68
soc: Remove cache constants from soc.h
2020-12-17 15:34:13 +11:00
Marius Vikhammer
457ce080ae
AES: refactor and add HAL layer
...
Refactor the AES driver and add HAL, LL and caps.
Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Angus Gratton
c29d93986d
soc: Add initial ESP32-C3 support
...
From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00
Armando
fb8b905539
uart: add uart support on esp32s3
2020-11-24 19:12:51 +08:00
morris
c5fe158929
doc: fix wrong register description regarding to ethernet SMI
2020-11-16 13:30:49 +08:00
Michael (XIAO Xufeng)
14944b181e
Merge branch 'fix/soc_caps_spi_dummy_output_esp32' into 'master'
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soc_caps.h: remove spi cap that is defined to 0
See merge request espressif/esp-idf!11203
2020-11-16 10:39:27 +08:00
Michael (XIAO Xufeng)
099fca515d
Merge branch 'bugfix/move_crypto_caps' into 'master'
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SHA/RSA: moved all caps to soc_caps.h
Closes IDF-2300
See merge request espressif/esp-idf!11032
2020-11-13 11:06:44 +08:00
Angus Gratton
935e4b4d62
Merge branch 'feature/riscv_arch' into 'master'
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Add RISC-V support
Closes IDF-2359
See merge request espressif/esp-idf!11140
2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe
Updates for riscv support
...
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
longer signed/unsigned int).
Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Cao Sen Miao
6eee601cf6
i2c: Add supports on esp32s3
2020-11-12 11:32:45 +08:00
Michael (XIAO Xufeng)
5b6c965e99
soc_caps.h: remove spi cap that is defined to 0
...
According to the caps rule, for unsupported feature we don't define anything.
Remove the define 0 that violates this rule.
2020-11-12 10:29:42 +08:00
Marius Vikhammer
488f46acf5
SHA/RSA: moved all caps to soc_caps.h
2020-11-12 02:15:46 +00:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
...
Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
morris
ff976867b3
rmt: split TX and RX in LL driver
...
Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
chenjianqiang
9465af0066
rmt: support esp32s3
2020-11-05 19:00:55 +08:00
morris
e4c8ec6174
timergroup: move interrupt index into peripheral description file
...
1. Added timer_group_periph.c file, describing module global signals
(e.g. interrupt index)
2. Added more caps in soc_caps.h
2020-11-03 18:16:50 +08:00
Michael (XIAO Xufeng)
35faecea1d
Merge branch 'feature/support_sigma_delta_on_s3' into 'master'
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sigma_delta: add periph signal list and support esp32-s3
See merge request espressif/esp-idf!10945
2020-10-30 17:22:02 +08:00
Michael (XIAO Xufeng)
3bacf35310
esp_flash: support high capacity flash chips (32-bit address)
2020-10-29 18:20:11 +08:00
morris
17808b3ff8
sigma_delta: add periph signal list and support esp32-s3
2020-10-29 11:06:28 +08:00
Renz Bagaporo
79887fdc6c
soc: descriptive part occupy whole component
2020-10-28 07:21:29 +08:00
Renz Christian Bagaporo
1f2e2fe8af
soc: separate abstraction, description and implementation
2020-02-11 14:30:42 +05:00
Wangjialin
aaf119e930
flash(esp32s2): fix setting address field in spi user mode.
2020-02-07 16:10:51 +01:00
Ivan Grokhotkov
70752baba4
esp32s2: add brownout detector support
...
1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
2020-01-23 13:44:19 +01:00
Angus Gratton
c7738f24fc
Merge branch 'bugfix/ledc_driver_enums' into 'master'
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driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum
See merge request espressif/esp-idf!7021
2020-01-10 15:34:43 +08:00
Darian Leung
a049e02d96
can: Refactor CAN to use HAL and LowLevel layers
...
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:
- Added bit field members to can_message_t as alternative
to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
2020-01-09 16:13:51 +08:00
michael
f676a3b190
driver, soc: update multichip support headers
2020-01-06 17:13:54 +08:00
Ivan Grokhotkov
52f8aa2adb
Merge branch 'feature/heap_non_os_build' into 'master'
...
heap: make compatible with non-OS builds, remove target dependence
Closes IDF-1236
See merge request espressif/esp-idf!7051
2020-01-03 17:12:51 +08:00
Ivan Grokhotkov
d9534b3d6a
soc: fix backtraces containing ROM functions
...
esp_ptr_executable would return false for pointers to ROM, which would
interrupt the backtrace. This makes ROM ranges recognized as
executable.
2020-01-02 18:42:46 +01:00
Ivan Grokhotkov
4bbfa6e494
Merge branch 'feature/soc_ledc_caps' into 'master'
...
soc: add ledc_caps.h, replace target-based ifdefs with caps-based
See merge request espressif/esp-idf!6858
2019-12-30 18:47:11 +08:00
Ivan Grokhotkov
e4d45608d3
soc: add ledc_caps.h, replace target-based ifdefs with caps-based
2019-12-28 20:33:21 +00:00
Ivan Grokhotkov
3285ed116d
heap: make compatible with non-OS builds, remove target dependence
2019-12-27 12:40:06 +01:00
morris
7baf7ce273
ethernet: optimise tx and rx
2019-12-24 11:18:31 +08:00
michael
11fa11000f
spi: re-enable the unit tests for esp32s2beta
2019-12-23 10:22:59 +08:00
Mahavir Jain
e8db1c4da0
Merge branch 'feature/enable_i2s_tests_on_esp32s2beta' into 'master'
...
Enable i2s and freertos test/s on esp32s2beta
See merge request espressif/esp-idf!6790
2019-12-18 17:51:54 +08:00
kewal shah
eec8212237
add simplified API to set UART threshold values for RX FIFO full and TX FIFO empty
2019-12-16 20:26:04 +00:00
Angus Gratton
435dd546cc
driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum
...
ledc_types.h includes two similar enums, ledc_clk_src_t & ledc_clk_cfg_t. Latter was added in
ESP-IDF v4.0.
The two enums do different things but there are two similar names: LEDC_REF_TICK / LEDC_USE_REF_TICK
and LEDC_APB_CLK / LEDC_USE_APB_CLK.
Because C will accept any enum or integer value for an enum argument, there's no easy way to check
the correct enum is passed without using static analysis.
To avoid accidental errors, make the numeric values for the two similarly named enums the same.,
Noticed when looking into https://github.com/espressif/esp-idf/issues/4476
2019-12-16 19:43:11 +11:00
Mahavir Jain
8b05cf41ad
i2s: enable tests for esp32s2beta
2019-12-16 11:53:33 +05:30
Wang Jia Lin
f5e60524ac
Merge branch 'bugfix/fix_i2c_driver_breakingchange_issue' into 'master'
...
bugfix(i2c): fix I2C driver breaking change issue
See merge request espressif/esp-idf!6809
2019-12-06 16:50:16 +08:00
houwenxiang
aac935ec81
bugfix(i2c): fix I2C driver breaking change issue.
...
1. Fixed I2C driver breaking change issue.
2. Add I2C UT test case.
2019-12-04 15:51:36 +08:00
houwenxiang
e4230d11ca
bugfix(UART): fix uart driver spinlock misused bug
...
1. fix uart driver spinlock misused bug
2. add uart driver ut test case
3. undo the change in light_sleep_example_main.c
2019-12-03 16:06:31 +08:00