simon.chupin
294f9783fc
Tools: Fix memory calculations of idf_size.py
2021-08-11 17:51:51 +02:00
Michael (XIAO Xufeng)
064f12cb90
idf_size.py: fixed diram counted twice issue, and improve display
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Currently static RAM usage are listed under corresponding physical
memory.
ld: fix linker script for C3 and S3
2021-08-11 17:51:50 +02:00
Marius Vikhammer
85b107bf54
Merge branch 'bugfix/rename_ext_mem_bss_section' into 'master'
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ld: rename .ext_ram.noinit to .ext_ram_noinit
See merge request espressif/esp-idf!14717
2021-08-11 05:51:00 +00:00
Marius Vikhammer
6a2f7b6f88
ld: rename .ext_ram.noinit to .ext_ram_noinit
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Older versions of the coredump utility tool do not correctly
handle this nameing scheme. Rename to keep forward compatibility.
2021-08-10 11:13:54 +08:00
Jiang Jiang Jian
6e1f8a68b9
Merge branch 'feature/support_esp32s3_wifi_lightsleep' into 'master'
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support esp32s3 wifi lightsleep
Closes IDF-1781
See merge request espressif/esp-idf!14569
2021-08-06 12:51:46 +00:00
Roland Dobai
7384149780
Merge branch 'update_copyright_notice_esp32s2_esp32s3' into 'master'
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esp32s2, esp32s3: update copyright notice
See merge request espressif/esp-idf!13831
2021-08-06 10:36:07 +00:00
Jan Brudný
562ce4d009
esp32s2, esp32s3: update copyright notice
2021-08-05 15:01:26 +02:00
Sachin Parekh
6582f7070e
Update tests for assert and abort
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- Place panic_abort in IRAM
- Added abort, assert test case in case of cache disabled
- Expect assert instead of abort in a freertos_mutex test
2021-08-05 11:09:22 +05:30
Li Shuai
d73a09cd8b
light sleep: add wifi mac sleep support for esp32s3
2021-08-04 21:58:33 +08:00
Li Shuai
366d0a724a
light sleep: set wifi light sleep clock source to rtc slow clock
2021-08-04 21:31:47 +08:00
Zim Kalinowski
1fd56e0b87
Merge branch 'feature/systimer_generate_rtos_tick' into 'master'
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freertos(esp32s3): SysTick uses systimer
Closes IDF-2613
See merge request espressif/esp-idf!12246
2021-08-04 12:33:52 +00:00
Konstantin Kondrashov
29f581fc70
freertos(esp32s3): SysTick uses systimer
2021-08-04 20:33:44 +08:00
Armando (Dou Yiwen)
03fb3973a2
Merge branch 'feature/support_quad_flash_octal_psram_on_esp32s3' into 'master'
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mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3
Closes IDF-3603
See merge request espressif/esp-idf!14346
2021-08-04 03:57:16 +00:00
Armando
0f91a01a46
mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3
2021-08-03 16:54:00 +08:00
Konstantin Kondrashov
4972605b16
esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt
2021-08-03 14:35:29 +08:00
Armando (Dou Yiwen)
0dad76329f
Merge branch 'feature/support_noinit_section_in_psram_on_esp32' into 'master'
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memory: support noinit section in psram on esp32
Closes IDFGH-2621
See merge request espressif/esp-idf!14088
2021-07-31 09:58:59 +00:00
Jiang Jiang Jian
aebdaf08a6
Merge branch 'bugfix/esp32s3_app_core_clock_gate_invalid_issue' into 'master'
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fix app cpu core clock gate invalid issue
Closes WIFI-3899
See merge request espressif/esp-idf!14518
2021-07-31 03:00:58 +00:00
Cao Sen Miao
c29b3e2e36
spi_flash: move the unlock patch to bootloader and add support for GD
2021-07-29 10:46:33 +08:00
Armando
ad8e1a395c
memory: port SPIRAM noinit segment support to master
2021-07-29 10:28:39 +08:00
Devan Lai
b85011c15f
esp32: Add support for noinit variables in SPIRAM
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Add Kconfig option SPIRAM_ALLOW_NOINIT_EXTERNAL_MEMORY
When enabled, a new linker script rule (from esp32.extram.noinit.ld)
places any variables in the .ext_ram.noinit section in SPIRAM.
This section is exempted from the startup SPIRAM memory test and is
not zero-initialized or added to the malloc pool, making it usable
for noinit variables that persist across reset.
The EXT_RAM_NOINIT_ATTR macro places variables in this section.
2021-07-29 10:28:38 +08:00
Li Shuai
8a10ba4179
system: fix app cpu core clock gate invalid issue
2021-07-28 11:34:29 +08:00
Michael (XIAO Xufeng)
18bee2380a
Merge branch 'refactor/usb_device_driver' into 'master'
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tiny_usb: support on esp32-s3
Closes IDF-3234
See merge request espressif/esp-idf!14293
2021-07-26 16:21:55 +00:00
Martin Vychodil
ce28af2dd4
System/memprot: ESP32C3 IRAM section alignment fix (LD)
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IRAM section didn't contain sufficient padding for possible CPU instruction prefetch,
ie instruction fetch could happen in DRAM section which is prohibited by the Memprot module.
This is fixed by adding 16B to the end of IRAM section in LD script (C3 CPU prefetch buffer depth is 4 words)
Closes IDF-3554
* fix
2021-07-23 17:11:12 +02:00
Michael (XIAO Xufeng)
fbb6b1b11a
Merge branch 'bugfix/fix_uart_reset_issue_on_esp32c3' into 'master'
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bugfix(uart): reset uart0 core before uart apb reset
Closes IDF-3362
See merge request espressif/esp-idf!12749
2021-07-22 07:20:58 +00:00
morris
81448dcae8
tiny_usb: rename Kconfig name
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1. Renamed Kconfig file of tinyusb (distinguish tinyusb stack from usb
peripheral)
2. bugfix/typofix/doc update of tinyusb
2021-07-22 10:43:10 +08:00
KonstantinKondrashov
c19b37d2a9
esp_system: Adds sync of FRC & RTC counters in esp_restart
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In case when FRC and RTC counters are very different then
the need to sync them before to restart the ESP
to get the correct system time after reboot.
2021-07-21 10:23:24 +05:00
Wangjialin
2b986fbd49
For esp_restart API, reset uart0 core first, then reset uart0 apb side, so as to prevent uart output garbage after cpu reset. (UART0 RST bits will be cleared in ROM)
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Add UART0/1 core reset on esp32c3, in case uart driver would also reset uart hardwares.
2021-07-21 11:41:04 +08:00
morris
2058e89448
Merge branch 'feature/fpga_bootloader' into 'master'
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Boot ESP32 & ESP32-S2 apps on FPGA
See merge request espressif/esp-idf!8270
2021-07-18 08:06:38 +00:00
Angus Gratton
c1ca7a35b0
ldgen: Remove some remaining references to TARGET.project.ld.in
2021-07-16 20:14:27 +08:00
Angus Gratton
f0471b18b2
esp32h2: Move from target component to esp_hw_support (new structure)
2021-07-16 20:14:27 +08:00
Renz Bagaporo
b06dba7823
esp32: move app linker scripts
2021-07-16 20:14:27 +08:00
Renz Bagaporo
fddc0b6799
esp32: move remaining tests
2021-07-16 20:14:27 +08:00
Renz Bagaporo
7c22cccb9c
esp32: cleanup build script
2021-07-16 20:14:27 +08:00
Angus Gratton
1a626ef6ca
esp32: App can boot on FPGA image
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Includes fix for detecting ESP32 ECO3 on FPGA
2021-07-16 10:50:06 +10:00
Angus Gratton
bbbbd5cf0c
esp32s2: FPGA can boot to Hello World
2021-07-16 10:50:06 +10:00
Omar Chebib
0771bd1711
espsystem: Rearchitecture and fix eh_frame_parser bugs
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eh_frame_parser is architecture independent, thus the files have
been rearchitectured. Some bugs have been fixed in the test.
A README file has also been added to eh_frame_parser host test
directory.
eh_frame_parser is now able to detect empty gaps in .eh_frame_hdr
table (missing DWARF information).
Fix a bug occuring when parsing backtraces originated from abort().
Fix build missing dependencies issue.
2021-07-15 12:47:51 +08:00
Omar Chebib
b967dc0dbf
espsystem: add support for RISC-V panic backtrace
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Add .eh_frame and .eh_frame_hdr sections to the binary (can be
enabled/disabled within menuconfig). These sections are parsed
when a panic occurs. Their DWARF instructions are decoded and
executed at runtime, to retrieve the whole backtrace. This
parser has been tested on both RISC-V and x86 architectures.
This feature needs esptool's merge adjacent ELF sections feature.
2021-07-13 15:42:40 +08:00
morris
1560d6f1ba
soc: add reset reasons in soc component
2021-07-13 10:45:38 +08:00
Shu Chen
ee23a489b9
esp32h2: code clean up
2021-07-01 19:53:50 +08:00
Shu Chen
5e3689ae0f
esp32h2: update esp_system and esp_hw_support to support esp32h2
2021-07-01 19:53:11 +08:00
Shu Chen
7d4b2617e1
esp32h2: copy esp_system and esp_hw_support from esp32c3
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Copy the esp32c3 code without any change:
* components/esp_hw_support/include/soc/esp32h2
* components/esp_hw_support/port/esp32h2
* components/esp_system/port/soc/esp32h2
2021-07-01 19:53:11 +08:00
Angus Gratton
2f8debdde1
Merge branch 'feature/esp32s3_remove_rtc_apb_freq_reg' into 'master'
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esp32s3: Remove APB frequency RTC register
See merge request espressif/esp-idf!11137
2021-06-29 23:50:23 +00:00
Angus Gratton
1969e4b8e5
Merge branch 'bugfix/panic_handler_disable_wdts_early' into 'master'
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esp_system: Reconfigure the WDTs at the start of the panic handler
Closes IDFCI-361
See merge request espressif/esp-idf!14138
2021-06-29 23:48:40 +00:00
Angus Gratton
57fa883127
esp32s3: Remove APB frequency RTC register
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Usage of this register changed between ESP32-S3 beta2 and the
final chip.
2021-06-29 17:38:46 +10:00
Angus Gratton
14c7d4965b
esp_system: Reconfigure the WDTs at the start of the panic handler
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This is mostly important on ESP32 ECO3 with the
ESP32_ECO3_CACHE_LOCK_FIX, because when we stall the other CPU core
before we disable the TG1 WDT then the first CPU can get stuck
in WDT ISR handle_livelock_int routine waiting for the other CPU.
2021-06-28 17:24:39 +10:00
Ivan Grokhotkov
d7928bf1db
Merge branch 'feature/esp32c3_apptrace' into 'master'
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apptrace: refactoring & esp32c3 support
See merge request espressif/esp-idf!11702
2021-06-28 06:00:24 +00:00
Michael (XIAO Xufeng)
afc2bc94b3
Merge branch 'feature/add_opi_flash_psram_support' into 'master'
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spi flash: opi flash psram support and spi timing tuning support on 727
Closes IDF-3097
See merge request espressif/esp-idf!12946
2021-06-28 01:59:19 +00:00
Armando
bc248278f8
spiflash: add octal spi psram support on 727
2021-06-25 19:41:57 +08:00
Alexey Gerenkov
20fd09728f
apptrace: Adds ESP32-C3 support
2021-06-24 13:16:14 +03:00
Alexey Gerenkov
821869d98d
apptrace: Refactors apptrace for better support various tracing HW
2021-06-24 13:16:13 +03:00