Commit Graph

40 Commits

Author SHA1 Message Date
Guillaume Souchere
fd2b8b5eb3 fix(heap): Update the heap memory layout on esp32p4 target
- fix the value of SOC_ROM_STACK_START in soc.h
- Update the memory usage of ROM bootloader appendix in bootloader.ld
- Update the soc_memory_regions table to minimize the number of regions
  created after the startup stack is added back as a heap.
2023-11-10 07:29:22 +01:00
wuzhenghui
5926116644 change(heap): fix and clean memory caps defination in memory_layout
1. move startup_stack attr from soc_memory_type_desc_t to soc_memory_region_t and
   remove unused aliased_iram field
2. all of the last level of RAM is retention dma accessible on esp32c3
3. remove esp32c2 and later chips retention dma accessible memory caps
4. allow allocate memory from RTC_RAM with MALLOC_CAP_EXEC cap
2023-09-28 07:53:20 +00:00
Armando
712c0c0075 feat(psram): esp32p4 psram device driver support 2023-08-28 14:14:58 +08:00
Armando
706d684418 feat(esp32p4): introduced new target esp32p4, supported hello_world 2023-08-09 19:33:25 +08:00
Armando
101e6a18eb esp32p4: introduce the target
Add esp32p4 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32p4`
2023-06-13 15:16:11 +08:00
KonstantinKondrashov
cb6e2133f0 esp_hw_support: Fix invalid system time if s_esp_rtc_time_us & s_rtc_last_ticks were moved around
The commit fixes the case:
If variables in RTC RAM have been moved around by the linker,
they will be filled with garbage data. Any reset other than OTA would work fine
because the variables would still be initialized from the initial bootup.

So now system time will be valid even after OTA.

Closes https://github.com/espressif/esp-idf/issues/9448
2023-06-08 21:59:21 +08:00
laokaiyao
bf2a7b2df6 esp32h4: removed esp32h4 related codes 2023-04-23 12:03:07 +00:00
laokaiyao
b16ed57b2e esp32h4: removed esp32h4 related files 2023-04-23 12:03:07 +00:00
Marius Vikhammer
5cbd311ecf system: add kconfig option for using parts of SRAM1 for IRAM
Using parts of SRAM1 for IRAM allows apps with more statically allocated IRAM

Closes https://github.com/espressif/esp-idf/issues/9824
2023-04-07 07:12:58 +00:00
Guillaume Souchere
6382f28998 heap: Modify the memory type of the memory used as startup stack when memory protection is enabled
If memory protection is enabled on esp32c3 and esp32s3, we don't want to the heap component to see
the startup stack memory as D/IRAM but as DRAM only. Introduce a new type to make this possible in
the same fashion the regular D/IRAM regions are handled.
2023-01-26 10:52:34 +01:00
Guillaume Souchere
6dffac74e9 heap: Fix IRAM level 2 starting address
The IRAM level 2 address should start at the same address as DRAM level 2 and not DRAM level 3.
2023-01-06 09:30:36 +00:00
wuzhenghui
05e37ba214 esp32h2 memory: update esp32h2 memory layout 2023-01-06 05:30:24 +00:00
Cao Sen Miao
4713a9a7f2 ESP32H2: Introduce new chip target esp32h2, hello_world example supported 2022-12-29 12:29:14 +08:00
Cao Sen Miao
86aa4df5b5 ESP32-H2: Introduce new target for ESP32H2 2022-11-23 14:38:05 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
wuzhenghui
357490267a heap: update esp32c6 memory layout 2022-09-29 11:13:06 +08:00
wuzhenghui
4a86a6a258 esp32c6: add heap support 2022-09-26 20:32:13 +08:00
songruojing
304a8f142d esp32c6: introduce the target
Add esp32c6 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32c6`
2022-08-19 11:13:02 +08:00
wuzhenghui
65f0b1a821 bugfix: DCache data memory is dma accessible but not retention dma accessible 2022-08-03 20:07:39 +08:00
wuzhenghui
5e8ba9cea8 use enum and designated initializers in soc_memory_type define 2022-07-29 17:07:41 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wuzhenghui
65aea5d177 stack/dram is also IRAM0 accessible 2022-07-29 10:51:48 +08:00
wuzhenghui
21a4eda4d4 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-07-29 10:51:47 +08:00
FanhuaCloud
a1c04ad6fd
Add missing comma
Add missing comma when CONFIG_ESP32S3_DATA_CACHE_16KB is enabled
2022-07-27 17:12:17 +08:00
wuzhenghui
4652f77a7c esp32h2beta2:update rom layout table 2022-03-29 14:13:06 +08:00
Kevin (Lao Kaiyao)
bf8d4d55d0 Merge branch 'refactor/rename_esp8684_to_esp32c2' into 'master'
esp8684: rename esp8684 to esp32c2

Closes IDF-4530

See merge request espressif/esp-idf!16745
2022-01-19 09:08:58 +00:00
Wang Qi Xiang
41640e2e03 heap_init: Adjust the stack/DRAM region size for ESP8684 2022-01-19 08:57:54 +00:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Jing Li
a0e794b2ca heap: adjust the order of RTC memory heap caps and regions 2021-12-29 08:49:42 +00:00
Cao Sen Miao
a9f0a3531e ESP8684: add driver esp_pm heap support 2021-11-06 17:33:44 +08:00
wuzhenghui
ca1c4114bc heap: update esp32&s2&c3&h2 soc caps 2021-11-04 10:40:57 +08:00
Alexey Gerenkov
111ba5bbe6 trax: Adds ESP32-S3 support 2021-10-22 23:36:28 +03:00
Alexey Gerenkov
5911eb3f3e apptrace: Adds ESP32-S3 support 2021-10-22 23:24:00 +03:00
Li Shuai
e8188e5d8f ci: replacing old header with new SPDX header style 2021-10-20 11:36:23 +08:00
Li Shuai
44da7d27ef heap: add a new heap caps attribute for RTC fast memory 2021-10-20 11:36:22 +08:00
Li Shuai
9298db641e deep sleep: fix some rtc fast memory definition errors in esp32s3 2021-10-19 21:47:27 +08:00
gaoxiaojie
191a494e08 support dcache 64Byte and 16k 2021-09-02 02:27:40 +08:00
Michael (XIAO Xufeng)
064f12cb90 idf_size.py: fixed diram counted twice issue, and improve display
Currently static RAM usage are listed under corresponding physical
memory.

ld: fix linker script for C3 and S3
2021-08-11 17:51:50 +02:00
Omar Chebib
a7b6ec85b8 Merge branch 'feature/move_memory_layout_to_heap' into 'master'
G0: Memory layouts are now part of heap components

Closes IDF-1264

See merge request espressif/esp-idf!14028
2021-07-19 06:23:19 +00:00
Omar Chebib
c4f57af6c9 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00