alex/esp-idf
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Code Issues Actions 2 Packages Projects Releases Wiki Activity

Merge branch 'refactor/rename_esp8684_to_esp32c2' into 'master'

Browse Source 
esp8684: rename esp8684 to esp32c2

Closes IDF-4530

See merge request espressif/esp-idf!16745
This commit is contained in:
Kevin (Lao Kaiyao) 2022-01-19 09:08:58 +00:00
commit bf8d4d55d0
354 changed files with 893 additions and 896 deletions
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1
.gitlab/CODEOWNERS
View File

@ -75,7 +75,6 @@
/components/driver/ @esp-idf-codeowners/peripherals
/components/efuse/ @esp-idf-codeowners/system
/components/esp32*/ @esp-idf-codeowners/system
/components/esp8684/ @esp-idf-codeowners/system
/components/esp_adc_cal/ @esp-idf-codeowners/peripherals
/components/esp_common/ @esp-idf-codeowners/system
/components/esp_eth/ @esp-idf-codeowners/network

18
.gitlab/ci/build.yml
View File

@ -194,12 +194,12 @@ build_esp_idf_tests_cmake_esp32c3:
variables:
IDF_TARGET: esp32c3
build_esp_idf_tests_cmake_esp8684:
build_esp_idf_tests_cmake_esp32c2:
extends:
- .build_esp_idf_tests_cmake_template
- .rules:build:unit_test-esp8684
- .rules:build:unit_test-esp32c2
variables:
IDF_TARGET: esp8684
IDF_TARGET: esp32c2
.build_examples_template:
extends: .build_template
@ -323,13 +323,13 @@ build_test_apps_esp32c3:
variables:
IDF_TARGET: esp32c3
build_test_apps_esp8684:
build_test_apps_esp32c2:
extends:
- .build_test_apps_template
- .rules:build:custom_test-esp8684
- .rules:build:custom_test-esp32c2
parallel: 8
variables:
IDF_TARGET: esp8684
IDF_TARGET: esp32c2
.build_component_ut_template:
extends: .build_test_apps_template
@ -365,12 +365,12 @@ build_component_ut_esp32c3:
variables:
IDF_TARGET: esp32c3
build_component_ut_esp8684:
build_component_ut_esp32c2:
extends:
- .build_component_ut_template
- .rules:build:component_ut-esp8684
- .rules:build:component_ut-esp32c2
variables:
IDF_TARGET: esp8684
IDF_TARGET: esp32c2
.test_build_system_template:
stage: host_test

2
.gitlab/ci/dependencies/dependencies.yml
View File

@ -4,7 +4,7 @@
- esp32s3
- esp32c3
- esp32h2
- esp8684
- esp32c2
.target_test: &target_test
- example_test

2
.gitlab/ci/docs.yml
View File

@ -69,7 +69,7 @@ check_docs_lang_sync:
parallel:
matrix:
- DOCLANG: ["en", "zh_CN"]
DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp8684"]
DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3"] # TODO: temporary disable building docs for esp32c2, IDF-4551
check_docs_gh_links:
image: $ESP_IDF_DOC_ENV_IMAGE

280
.gitlab/ci/rules.yml
View File

@ -281,6 +281,9 @@
.if-label-component_ut_esp32: &if-label-component_ut_esp32
if: '$BOT_LABEL_COMPONENT_UT_ESP32 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32(?:,[^,\n\r]+)*$/i'
.if-label-component_ut_esp32c2: &if-label-component_ut_esp32c2
if: '$BOT_LABEL_COMPONENT_UT_ESP32C2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32c2(?:,[^,\n\r]+)*$/i'
.if-label-component_ut_esp32c3: &if-label-component_ut_esp32c3
if: '$BOT_LABEL_COMPONENT_UT_ESP32C3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32c3(?:,[^,\n\r]+)*$/i'
@ -293,15 +296,15 @@
.if-label-component_ut_esp32s3: &if-label-component_ut_esp32s3
if: '$BOT_LABEL_COMPONENT_UT_ESP32S3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32s3(?:,[^,\n\r]+)*$/i'
.if-label-component_ut_esp8684: &if-label-component_ut_esp8684
if: '$BOT_LABEL_COMPONENT_UT_ESP8684 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp8684(?:,[^,\n\r]+)*$/i'
.if-label-custom_test: &if-label-custom_test
if: '$BOT_LABEL_CUSTOM_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test(?:,[^,\n\r]+)*$/i'
.if-label-custom_test_esp32: &if-label-custom_test_esp32
if: '$BOT_LABEL_CUSTOM_TEST_ESP32 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32(?:,[^,\n\r]+)*$/i'
.if-label-custom_test_esp32c2: &if-label-custom_test_esp32c2
if: '$BOT_LABEL_CUSTOM_TEST_ESP32C2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32c2(?:,[^,\n\r]+)*$/i'
.if-label-custom_test_esp32c3: &if-label-custom_test_esp32c3
if: '$BOT_LABEL_CUSTOM_TEST_ESP32C3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32c3(?:,[^,\n\r]+)*$/i'
@ -314,9 +317,6 @@
.if-label-custom_test_esp32s3: &if-label-custom_test_esp32s3
if: '$BOT_LABEL_CUSTOM_TEST_ESP32S3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32s3(?:,[^,\n\r]+)*$/i'
.if-label-custom_test_esp8684: &if-label-custom_test_esp8684
if: '$BOT_LABEL_CUSTOM_TEST_ESP8684 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp8684(?:,[^,\n\r]+)*$/i'
.if-label-docker: &if-label-docker
if: '$BOT_LABEL_DOCKER || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*docker(?:,[^,\n\r]+)*$/i'
@ -326,6 +326,9 @@
.if-label-example_test_esp32: &if-label-example_test_esp32
if: '$BOT_LABEL_EXAMPLE_TEST_ESP32 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32(?:,[^,\n\r]+)*$/i'
.if-label-example_test_esp32c2: &if-label-example_test_esp32c2
if: '$BOT_LABEL_EXAMPLE_TEST_ESP32C2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32c2(?:,[^,\n\r]+)*$/i'
.if-label-example_test_esp32c3: &if-label-example_test_esp32c3
if: '$BOT_LABEL_EXAMPLE_TEST_ESP32C3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32c3(?:,[^,\n\r]+)*$/i'
@ -338,9 +341,6 @@
.if-label-example_test_esp32s3: &if-label-example_test_esp32s3
if: '$BOT_LABEL_EXAMPLE_TEST_ESP32S3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32s3(?:,[^,\n\r]+)*$/i'
.if-label-example_test_esp8684: &if-label-example_test_esp8684
if: '$BOT_LABEL_EXAMPLE_TEST_ESP8684 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp8684(?:,[^,\n\r]+)*$/i'
.if-label-fuzzer_test: &if-label-fuzzer_test
if: '$BOT_LABEL_FUZZER_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*fuzzer_test(?:,[^,\n\r]+)*$/i'
@ -371,6 +371,9 @@
.if-label-unit_test_esp32: &if-label-unit_test_esp32
if: '$BOT_LABEL_UNIT_TEST_ESP32 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32(?:,[^,\n\r]+)*$/i'
.if-label-unit_test_esp32c2: &if-label-unit_test_esp32c2
if: '$BOT_LABEL_UNIT_TEST_ESP32C2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32c2(?:,[^,\n\r]+)*$/i'
.if-label-unit_test_esp32c3: &if-label-unit_test_esp32c3
if: '$BOT_LABEL_UNIT_TEST_ESP32C3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32c3(?:,[^,\n\r]+)*$/i'
@ -383,9 +386,6 @@
.if-label-unit_test_esp32s3: &if-label-unit_test_esp32s3
if: '$BOT_LABEL_UNIT_TEST_ESP32S3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32s3(?:,[^,\n\r]+)*$/i'
.if-label-unit_test_esp8684: &if-label-unit_test_esp8684
if: '$BOT_LABEL_UNIT_TEST_ESP8684 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp8684(?:,[^,\n\r]+)*$/i'
.if-label-weekend_test: &if-label-weekend_test
if: '$BOT_LABEL_WEEKEND_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*weekend_test(?:,[^,\n\r]+)*$/i'
@ -420,6 +420,23 @@
- <<: *if-dev-push
changes: *patterns-component_ut
.rules:build:component_ut-esp32c2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-component_ut
- <<: *if-label-component_ut_esp32c2
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp32c2
- <<: *if-dev-push
changes: *patterns-build_components
- <<: *if-dev-push
changes: *patterns-build_system
- <<: *if-dev-push
changes: *patterns-component_ut
.rules:build:component_ut-esp32c3:
rules:
- <<: *if-revert-branch
@ -488,23 +505,6 @@
- <<: *if-dev-push
changes: *patterns-component_ut
.rules:build:component_ut-esp8684:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-component_ut
- <<: *if-label-component_ut_esp8684
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp8684
- <<: *if-dev-push
changes: *patterns-build_components
- <<: *if-dev-push
changes: *patterns-build_system
- <<: *if-dev-push
changes: *patterns-component_ut
.rules:build:custom_test-esp32:
rules:
- <<: *if-revert-branch
@ -521,6 +521,21 @@
- <<: *if-dev-push
changes: *patterns-custom_test
.rules:build:custom_test-esp32c2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-custom_test
- <<: *if-label-custom_test_esp32c2
- <<: *if-dev-push
changes: *patterns-build_components
- <<: *if-dev-push
changes: *patterns-build_system
- <<: *if-dev-push
changes: *patterns-custom_test
.rules:build:custom_test-esp32c3:
rules:
- <<: *if-revert-branch
@ -581,21 +596,6 @@
- <<: *if-dev-push
changes: *patterns-custom_test
.rules:build:custom_test-esp8684:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-custom_test
- <<: *if-label-custom_test_esp8684
- <<: *if-dev-push
changes: *patterns-build_components
- <<: *if-dev-push
changes: *patterns-build_system
- <<: *if-dev-push
changes: *patterns-custom_test
.rules:build:docker:
rules:
- <<: *if-revert-branch
@ -624,6 +624,23 @@
- <<: *if-dev-push
changes: *patterns-example_test
.rules:build:example_test-esp32c2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-example_test
- <<: *if-label-example_test_esp32c2
- <<: *if-dev-push
changes: *patterns-build-example_test
- <<: *if-dev-push
changes: *patterns-build_components
- <<: *if-dev-push
changes: *patterns-build_system
- <<: *if-dev-push
changes: *patterns-example_test
.rules:build:example_test-esp32c3:
rules:
- <<: *if-revert-branch
@ -692,23 +709,6 @@
- <<: *if-dev-push
changes: *patterns-example_test
.rules:build:example_test-esp8684:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-example_test
- <<: *if-label-example_test_esp8684
- <<: *if-dev-push
changes: *patterns-build-example_test
- <<: *if-dev-push
changes: *patterns-build_components
- <<: *if-dev-push
changes: *patterns-build_system
- <<: *if-dev-push
changes: *patterns-example_test
.rules:build:integration_test:
rules:
- <<: *if-revert-branch
@ -742,34 +742,34 @@
- <<: *if-label-build
- <<: *if-label-component_ut
- <<: *if-label-component_ut_esp32
- <<: *if-label-component_ut_esp32c2
- <<: *if-label-component_ut_esp32c3
- <<: *if-label-component_ut_esp32h2
- <<: *if-label-component_ut_esp32s2
- <<: *if-label-component_ut_esp32s3
- <<: *if-label-component_ut_esp8684
- <<: *if-label-custom_test
- <<: *if-label-custom_test_esp32
- <<: *if-label-custom_test_esp32c2
- <<: *if-label-custom_test_esp32c3
- <<: *if-label-custom_test_esp32h2
- <<: *if-label-custom_test_esp32s2
- <<: *if-label-custom_test_esp32s3
- <<: *if-label-custom_test_esp8684
- <<: *if-label-example_test
- <<: *if-label-example_test_esp32
- <<: *if-label-example_test_esp32c2
- <<: *if-label-example_test_esp32c3
- <<: *if-label-example_test_esp32h2
- <<: *if-label-example_test_esp32s2
- <<: *if-label-example_test_esp32s3
- <<: *if-label-example_test_esp8684
- <<: *if-label-integration_test
- <<: *if-label-iperf_stress_test
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp32
- <<: *if-label-unit_test_esp32c2
- <<: *if-label-unit_test_esp32c3
- <<: *if-label-unit_test_esp32h2
- <<: *if-label-unit_test_esp32s2
- <<: *if-label-unit_test_esp32s3
- <<: *if-label-unit_test_esp8684
- <<: *if-label-weekend_test
- <<: *if-dev-push
changes: *patterns-build-example_test
@ -803,6 +803,21 @@
- <<: *if-dev-push
changes: *patterns-unit_test
.rules:build:unit_test-esp32c2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp32c2
- <<: *if-dev-push
changes: *patterns-build_components
- <<: *if-dev-push
changes: *patterns-build_system
- <<: *if-dev-push
changes: *patterns-unit_test
.rules:build:unit_test-esp32c3:
rules:
- <<: *if-revert-branch
@ -863,21 +878,6 @@
- <<: *if-dev-push
changes: *patterns-unit_test
.rules:build:unit_test-esp8684:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp8684
- <<: *if-dev-push
changes: *patterns-build_components
- <<: *if-dev-push
changes: *patterns-build_system
- <<: *if-dev-push
changes: *patterns-unit_test
.rules:build:windows:
rules:
- <<: *if-revert-branch
@ -924,35 +924,35 @@
when: never
- <<: *if-label-component_ut
- <<: *if-label-component_ut_esp32
- <<: *if-label-component_ut_esp32c2
- <<: *if-label-component_ut_esp32c3
- <<: *if-label-component_ut_esp32h2
- <<: *if-label-component_ut_esp32s2
- <<: *if-label-component_ut_esp32s3
- <<: *if-label-component_ut_esp8684
- <<: *if-label-custom_test
- <<: *if-label-custom_test_esp32
- <<: *if-label-custom_test_esp32c2
- <<: *if-label-custom_test_esp32c3
- <<: *if-label-custom_test_esp32h2
- <<: *if-label-custom_test_esp32s2
- <<: *if-label-custom_test_esp32s3
- <<: *if-label-custom_test_esp8684
- <<: *if-label-example_test
- <<: *if-label-example_test_esp32
- <<: *if-label-example_test_esp32c2
- <<: *if-label-example_test_esp32c3
- <<: *if-label-example_test_esp32h2
- <<: *if-label-example_test_esp32s2
- <<: *if-label-example_test_esp32s3
- <<: *if-label-example_test_esp8684
- <<: *if-label-host_test
- <<: *if-label-integration_test
- <<: *if-label-iperf_stress_test
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp32
- <<: *if-label-unit_test_esp32c2
- <<: *if-label-unit_test_esp32c3
- <<: *if-label-unit_test_esp32h2
- <<: *if-label-unit_test_esp32s2
- <<: *if-label-unit_test_esp32s3
- <<: *if-label-unit_test_esp8684
- <<: *if-label-weekend_test
- <<: *if-dev-push
changes: *patterns-build-example_test
@ -983,6 +983,20 @@
- <<: *if-dev-push
changes: *patterns-component_ut
.rules:test:component_ut-esp32c2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
- <<: *if-label-component_ut
- <<: *if-label-component_ut_esp32c2
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp32c2
- <<: *if-dev-push
changes: *patterns-component_ut
.rules:test:component_ut-esp32c3:
rules:
- <<: *if-revert-branch
@ -1039,20 +1053,6 @@
- <<: *if-dev-push
changes: *patterns-component_ut
.rules:test:component_ut-esp8684:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
- <<: *if-label-component_ut
- <<: *if-label-component_ut_esp8684
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp8684
- <<: *if-dev-push
changes: *patterns-component_ut
.rules:test:custom_test-esp32:
rules:
- <<: *if-revert-branch
@ -1065,6 +1065,18 @@
- <<: *if-dev-push
changes: *patterns-custom_test
.rules:test:custom_test-esp32c2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
- <<: *if-label-custom_test
- <<: *if-label-custom_test_esp32c2
- <<: *if-dev-push
changes: *patterns-custom_test
.rules:test:custom_test-esp32c3:
rules:
- <<: *if-revert-branch
@ -1113,18 +1125,6 @@
- <<: *if-dev-push
changes: *patterns-custom_test
.rules:test:custom_test-esp8684:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
- <<: *if-label-custom_test
- <<: *if-label-custom_test_esp8684
- <<: *if-dev-push
changes: *patterns-custom_test
.rules:test:example_test-esp32:
rules:
- <<: *if-revert-branch
@ -1139,6 +1139,20 @@
- <<: *if-dev-push
changes: *patterns-example_test
.rules:test:example_test-esp32c2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
- <<: *if-label-example_test
- <<: *if-label-example_test_esp32c2
- <<: *if-dev-push
changes: *patterns-build-example_test
- <<: *if-dev-push
changes: *patterns-example_test
.rules:test:example_test-esp32c3:
rules:
- <<: *if-revert-branch
@ -1195,20 +1209,6 @@
- <<: *if-dev-push
changes: *patterns-example_test
.rules:test:example_test-esp8684:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
- <<: *if-label-example_test
- <<: *if-label-example_test_esp8684
- <<: *if-dev-push
changes: *patterns-build-example_test
- <<: *if-dev-push
changes: *patterns-example_test
.rules:test:host_test:
rules:
- <<: *if-revert-branch
@ -1251,33 +1251,33 @@
when: never
- <<: *if-label-component_ut
- <<: *if-label-component_ut_esp32
- <<: *if-label-component_ut_esp32c2
- <<: *if-label-component_ut_esp32c3
- <<: *if-label-component_ut_esp32h2
- <<: *if-label-component_ut_esp32s2
- <<: *if-label-component_ut_esp32s3
- <<: *if-label-component_ut_esp8684
- <<: *if-label-custom_test
- <<: *if-label-custom_test_esp32
- <<: *if-label-custom_test_esp32c2
- <<: *if-label-custom_test_esp32c3
- <<: *if-label-custom_test_esp32h2
- <<: *if-label-custom_test_esp32s2
- <<: *if-label-custom_test_esp32s3
- <<: *if-label-custom_test_esp8684
- <<: *if-label-example_test
- <<: *if-label-example_test_esp32
- <<: *if-label-example_test_esp32c2
- <<: *if-label-example_test_esp32c3
- <<: *if-label-example_test_esp32h2
- <<: *if-label-example_test_esp32s2
- <<: *if-label-example_test_esp32s3
- <<: *if-label-example_test_esp8684
- <<: *if-label-integration_test
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp32
- <<: *if-label-unit_test_esp32c2
- <<: *if-label-unit_test_esp32c3
- <<: *if-label-unit_test_esp32h2
- <<: *if-label-unit_test_esp32s2
- <<: *if-label-unit_test_esp32s3
- <<: *if-label-unit_test_esp8684
- <<: *if-dev-push
changes: *patterns-build-example_test
- <<: *if-dev-push
@ -1303,6 +1303,18 @@
- <<: *if-dev-push
changes: *patterns-unit_test
.rules:test:unit_test-esp32c2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp32c2
- <<: *if-dev-push
changes: *patterns-unit_test
.rules:test:unit_test-esp32c3:
rules:
- <<: *if-revert-branch
@ -1350,15 +1362,3 @@
- <<: *if-label-unit_test_esp32s3
- <<: *if-dev-push
changes: *patterns-unit_test
.rules:test:unit_test-esp8684:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
- <<: *if-label-unit_test
- <<: *if-label-unit_test_esp8684
- <<: *if-dev-push
changes: *patterns-unit_test

6
Kconfig
View File

@ -82,9 +82,9 @@ mainmenu "Espressif IoT Development Framework Configuration"
select ESPTOOLPY_NO_STUB # TODO: IDF-4288
endchoice
config IDF_TARGET_ESP8684
config IDF_TARGET_ESP32C2
bool
default "y" if IDF_TARGET="esp8684"
default "y" if IDF_TARGET="esp32c2"
select FREERTOS_UNICORE
select IDF_TARGET_ARCH_RISCV
select ESPTOOLPY_NO_STUB # remove if ESPTOOL-303
@ -99,7 +99,7 @@ mainmenu "Espressif IoT Development Framework Configuration"
default 0x0002 if IDF_TARGET_ESP32S2
default 0x0005 if IDF_TARGET_ESP32C3
default 0x0009 if IDF_TARGET_ESP32S3
default 0x000C if IDF_TARGET_ESP8684
default 0x000C if IDF_TARGET_ESP32C2
default 0x000A if IDF_TARGET_ESP32H2_BETA_VERSION_1
default 0x000E if IDF_TARGET_ESP32H2_BETA_VERSION_2 # ESP32H2-TODO: IDF-3475
default 0xFFFF

6
components/bootloader/Kconfig.projbuild
View File

@ -681,7 +681,7 @@ menu "Security features"
choice SECURE_FLASH_ENCRYPTION_KEYSIZE
bool "Size of generated AES-XTS key"
default SECURE_FLASH_ENCRYPTION_AES128
depends on (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP8684) && SECURE_FLASH_ENC_ENABLED
depends on (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2) && SECURE_FLASH_ENC_ENABLED
help
Size of generated AES-XTS key.
@ -693,11 +693,11 @@ menu "Security features"
config SECURE_FLASH_ENCRYPTION_AES128
bool "AES-128 (256-bit key)"
depends on !IDF_TARGET_ESP8684 # TODO: IDF-3899
depends on !IDF_TARGET_ESP32C2 # TODO: IDF-3899
config SECURE_FLASH_ENCRYPTION_AES256
bool "AES-256 (512-bit key)"
depends on !IDF_TARGET_ESP8684 # TODO: IDF-3899
depends on !IDF_TARGET_ESP32C2 # TODO: IDF-3899
endchoice
choice SECURE_FLASH_ENCRYPTION_MODE

4
components/bootloader/subproject/main/ld/esp8684/bootloader.ld → components/bootloader/subproject/main/ld/esp32c2/bootloader.ld
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -36,7 +36,7 @@ SECTIONS
*libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
*libbootloader_support.a:bootloader_efuse_esp8684.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_efuse_esp32c2.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)

6
components/bootloader/subproject/main/ld/esp32c2/bootloader.rom.ld Normal file
View File

@ -0,0 +1,6 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/* No definition for ESP32-C2 target */

6
components/bootloader/subproject/main/ld/esp8684/bootloader.rom.ld
View File

@ -1,6 +0,0 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/* No definition for ESP8684 target */

6
components/bootloader_support/bootloader_flash/src/bootloader_flash.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -128,8 +128,8 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/cache.h"
#include "soc/cache_memory.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/cache.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/cache.h"
#include "soc/cache_memory.h"
#endif
#include "esp_rom_spiflash.h"

8
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp8684.c → components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,9 +9,9 @@
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_log.h"
#include "esp8684/rom/gpio.h"
#include "esp8684/rom/spi_flash.h"
#include "esp8684/rom/efuse.h"
#include "esp32c2/rom/gpio.h"
#include "esp32c2/rom/spi_flash.h"
#include "esp32c2/rom/efuse.h"
#include "soc/gpio_periph.h"
#include "soc/efuse_reg.h"
#include "soc/spi_reg.h"

6
components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -138,7 +138,7 @@ static esp_err_t enable_qio_mode(bootloader_flash_read_status_fn_t read_status_f
esp_rom_spiflash_config_readmode(mode);
#if !CONFIG_IDF_TARGET_ESP8684
#if !CONFIG_IDF_TARGET_ESP32C2
//IDF-3914
const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
#endif
@ -146,7 +146,7 @@ static esp_err_t enable_qio_mode(bootloader_flash_read_status_fn_t read_status_f
#if CONFIG_IDF_TARGET_ESP32
int wp_pin = bootloader_flash_get_wp_pin();
esp_rom_spiflash_select_qio_pins(wp_pin, spiconfig);
#elif CONFIG_IDF_TARGET_ESP8684
#elif CONFIG_IDF_TARGET_ESP32C2
//IDF-3914
esp_rom_spiflash_select_qio_pins(0, 0);
#else

6
components/bootloader_support/include/bootloader_common.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -20,8 +20,8 @@
#include "esp32c3/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/rtc.h"
#endif
#ifdef __cplusplus

4
components/bootloader_support/include/esp_app_format.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -16,7 +16,7 @@ typedef enum {
ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */
ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
ESP_CHIP_ID_ESP8684 = 0x000C, /*!< chip ID: ESP32-8684 */
ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
ESP_CHIP_ID_ESP32H2 = 0x000E, /*!< chip ID: ESP32-H2 Beta2*/ // ESP32H2-TODO: IDF-3475
#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1

4
components/bootloader_support/include/esp_flash_encrypt.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -55,7 +55,7 @@ static inline /** @cond */ IRAM_ATTR /** @endcond */ bool esp_flash_encryption_e
#endif
#else
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
#if CONFIG_IDF_TARGET_ESP8684
#if CONFIG_IDF_TARGET_ESP32C2
// IDF-3899
#else
flash_crypt_cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT);

8
components/bootloader_support/include/esp_secure_boot.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -28,9 +28,9 @@
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/efuse.h"
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/efuse.h"
#include "esp8684/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/efuse.h"
#include "esp32c2/rom/secure_boot.h"
#endif
#ifdef CONFIG_SECURE_BOOT_V1_ENABLED

8
components/bootloader_support/src/bootloader_console.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -25,9 +25,9 @@
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/ets_sys.h"
#include "esp32h2/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/ets_sys.h"
#include "esp8684/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/ets_sys.h"
#include "esp32c2/rom/uart.h"
#endif
#include "esp_rom_gpio.h"
#include "esp_rom_uart.h"

2
components/bootloader_support/src/bootloader_efuse_esp8684.c → components/bootloader_support/src/bootloader_efuse_esp32c2.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/bootloader_support/src/bootloader_random_esp8684.c → components/bootloader_support/src/bootloader_random_esp32c2.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

20
components/bootloader_support/src/bootloader_utility.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -48,15 +48,15 @@
#include "esp32h2/rom/secure_boot.h"
#include "soc/extmem_reg.h"
#include "soc/cache_memory.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/cache.h"
#include "esp8684/rom/efuse.h"
#include "esp8684/rom/ets_sys.h"
#include "esp8684/rom/crc.h"
#include "esp8684/rom/rtc.h"
#include "esp8684/rom/uart.h"
#include "esp8684/rom/gpio.h"
#include "esp8684/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/cache.h"
#include "esp32c2/rom/efuse.h"
#include "esp32c2/rom/ets_sys.h"
#include "esp32c2/rom/crc.h"
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rom/uart.h"
#include "esp32c2/rom/gpio.h"
#include "esp32c2/rom/secure_boot.h"
#include "soc/extmem_reg.h"
#include "soc/cache_memory.h"
#else // CONFIG_IDF_TARGET_*

12
components/bootloader_support/src/esp8684/bootloader_esp8684.c → components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -24,10 +24,10 @@
#include "soc/extmem_reg.h"
#include "soc/io_mux_reg.h"
#include "soc/system_reg.h"
#include "esp8684/rom/efuse.h"
#include "esp8684/rom/cache.h"
#include "esp8684/rom/ets_sys.h"
#include "esp8684/rom/rtc.h"
#include "esp32c2/rom/efuse.h"
#include "esp32c2/rom/cache.h"
#include "esp32c2/rom/ets_sys.h"
#include "esp32c2/rom/rtc.h"
#include "bootloader_common.h"
#include "bootloader_init.h"
#include "bootloader_clock.h"
@ -38,7 +38,7 @@
#include "bootloader_flash_priv.h"
#include "esp_efuse.h"
static const char *TAG = "boot.esp8684";
static const char *TAG = "boot.esp32c2";
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{

4
components/bootloader_support/src/esp8684/bootloader_sha.c → components/bootloader_support/src/esp32c2/bootloader_sha.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,7 +9,7 @@
#include <assert.h>
#include <sys/param.h>
#include "esp8684/rom/sha.h"
#include "esp32c2/rom/sha.h"
static SHA_CTX ctx;

8
components/bootloader_support/src/esp8684/bootloader_soc.c → components/bootloader_support/src/esp32c2/bootloader_soc.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -7,15 +7,15 @@
void bootloader_ana_super_wdt_reset_config(bool enable)
{
(void)enable; // ESP8684 has none of these features.
(void)enable; // ESP32-C2 has none of these features.
}
void bootloader_ana_bod_reset_config(bool enable)
{
(void)enable; // ESP8684 has none of these features.
(void)enable; // ESP32-C2 has none of these features.
}
void bootloader_ana_clock_glitch_reset_config(bool enable)
{
(void)enable; // ESP8684 has none of these features.
(void)enable; // ESP32-C2 has none of these features.
}

2
components/bootloader_support/src/esp8684/flash_encryption_secure_features.c → components/bootloader_support/src/esp32c2/flash_encryption_secure_features.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/bootloader_support/src/esp8684/secure_boot_secure_features.c → components/bootloader_support/src/esp32c2/secure_boot_secure_features.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

8
components/bootloader_support/src/esp_image_format.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -30,9 +30,9 @@
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/rtc.h"
#include "esp8684/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rom/secure_boot.h"
#endif
/* Checking signatures as part of verifying images is necessary:

6
components/bootloader_support/src/flash_encryption/flash_encrypt.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -15,9 +15,9 @@
#include "esp_efuse_table.h"
#include "esp_log.h"
#include "hal/wdt_hal.h"
#ifdef CONFIG_IDF_TARGET_ESP8684
#ifdef CONFIG_IDF_TARGET_ESP32C2
// IDF-3899
#warning "Not support flash encryption on esp8684 yet."
#warning "Not support flash encryption on esp32c2 yet."
#endif
#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED

0
components/bt/controller/esp8684/Kconfig.in → components/bt/controller/esp32c2/Kconfig.in
View File

2
components/driver/CMakeLists.txt
View File

@ -108,7 +108,7 @@ if(IDF_TARGET STREQUAL "esp32h2")
"twai.c")
endif()
if(IDF_TARGET STREQUAL "esp8684")
if(IDF_TARGET STREQUAL "esp32c2")
list(APPEND srcs "spi_slave_hd.c")
endif()

2
components/driver/esp8684/include/driver/temp_sensor.h → components/driver/esp32c2/include/driver/temp_sensor.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

6
components/driver/include/driver/adc.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -45,7 +45,7 @@ typedef enum {
ADC1_CHANNEL_9, /*!< ADC1 channel 9 is GPIO10 */
ADC1_CHANNEL_MAX,
} adc1_channel_t;
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP8684
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
typedef enum {
ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
@ -72,7 +72,7 @@ typedef enum {
ADC2_CHANNEL_9, /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
ADC2_CHANNEL_MAX,
} adc2_channel_t;
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP8684
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
typedef enum {
ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */

2
components/driver/test/include/test/test_common_spi.h
View File

@ -86,7 +86,7 @@
#define ESP_SPI_SLAVE_TV 0
#define WIRE_DELAY 12.5
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP8684
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
//NOTE: On these chips, there is only 1 GPSPI controller, so master-slave test on single board should be disabled
#define TEST_SPI_HOST SPI2_HOST
#define TEST_SLAVE_HOST SPI2_HOST

6
components/driver/test/test_adc.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,7 +9,7 @@
#include <string.h>
#include "esp_log.h"
#include "test_utils.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
// TODO: Support ADC IDF-3908
#include "esp_adc_cal.h"
#include "driver/adc.h"
@ -400,4 +400,4 @@ TEST_CASE("test_adc_single_cali_time", "[adc][ignore][manual]")
}
}
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP8684)
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

4
components/driver/test/test_adc2_with_wifi.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -20,7 +20,7 @@
#include "freertos/task.h"
#include "driver/gpio.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3, ESP32S3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3, ESP32S3, ESP32C2)
static const char* TAG = "test_adc2";

4
components/driver/test/test_adc_common.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -19,7 +19,7 @@
#include "test_utils.h"
#include "soc/adc_periph.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3,ESP32C3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3,ESP32C3, ESP32C2)
#include "driver/dac.h"
static const char *TAG = "test_adc";

10
components/driver/test/test_gpio.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -63,7 +63,7 @@
#define TEST_GPIO_USB_DP_IO 19 // USB D+ GPIO
#define TEST_GPIO_INPUT_LEVEL_HIGH_PIN 10
#define TEST_GPIO_INPUT_LEVEL_LOW_PIN 1
#elif CONFIG_IDF_TARGET_ESP8684
#elif CONFIG_IDF_TARGET_ESP32C2
#define TEST_GPIO_EXT_OUT_IO 2 // default output GPIO
#define TEST_GPIO_EXT_IN_IO 3 // default input GPIO
#define TEST_GPIO_OUTPUT_PIN 1
@ -113,7 +113,7 @@ __attribute__((unused)) static void gpio_isr_edge_handler(void *arg)
edge_intr_times++;
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP32C2)
//No runners
// level interrupt event with "gpio_intr_disable"
static void gpio_isr_level_handler(void *arg)
@ -223,7 +223,7 @@ TEST_CASE("GPIO config parameters test", "[gpio]")
#endif // SOC_HAS_INPUT_ONLY_PIN
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP32C2)
//No runners
TEST_CASE("GPIO rising edge interrupt test", "[gpio][test_env=UT_T1_GPIO]")
{
@ -527,7 +527,7 @@ TEST_CASE("GPIO io pull up/down function", "[gpio]")
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "gpio_pullup_dis error, it can pull up");
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP32C2)
//No runners
TEST_CASE("GPIO output and input mode test", "[gpio][test_env=UT_T1_GPIO]")
{

6
components/driver/test/test_i2c.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -276,7 +276,7 @@ TEST_CASE("I2C driver memory leaking check", "[i2c]")
TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C2)
// print the reading buffer
static void disp_buf(uint8_t *buf, int len)
@ -657,7 +657,7 @@ TEST_CASE("I2C general API test", "[i2c]")
}
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3, ESP32C2)
//Init uart baud rate detection
static void uart_aut_baud_det_init(int rxd_io_num)
{

4
components/driver/test/test_rtcio.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -21,7 +21,7 @@
#include "esp_log.h"
#include "soc/rtc_io_periph.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3, ESP32C2)
#define RTCIO_CHECK(condition) TEST_ASSERT_MESSAGE((condition == ESP_OK), "ret is not ESP_OK")
#define RTCIO_VERIFY(condition, msg) TEST_ASSERT_MESSAGE((condition), msg)

4
components/driver/test/test_sigmadelta.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -67,4 +67,4 @@ TEST_CASE("SigmaDelta pin, duty, prescale set", "[sigma_delta][ignore]")
vTaskDelay(3000 / portTICK_PERIOD_MS);
}
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP8684)
#endif // SOC_SIGMADELTA_SUPPORTED

4
components/driver/test/test_spi_bus_lock.c
View File

@ -279,7 +279,7 @@ static void test_bus_lock(bool test_flash)
TEST_ESP_OK(spi_bus_free(TEST_SPI_HOST) );
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP8684)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP32C2)
//no runners
TEST_CASE("spi bus lock, with flash","[spi][test_env=UT_T1_ESP_FLASH]")
{
@ -293,7 +293,7 @@ TEST_CASE("spi bus lock","[spi]")
test_bus_lock(false);
}
#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP8684, ESP32H2)
#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP32C2, ESP32H2)
//disable, SPI1 is not available for GPSPI usage on chips later than ESP32
static IRAM_ATTR esp_err_t test_polling_send(spi_device_handle_t handle)
{

6
components/driver/test/test_spi_master.c
View File

@ -35,7 +35,7 @@
const static char TAG[] = "test_spi";
// There is no input-only pin on esp32c3 and esp32s3
#define TEST_SOC_HAS_INPUT_ONLY_PINS (!DISABLED_FOR_TARGETS(ESP32C3, ESP32S3, ESP8684))
#define TEST_SOC_HAS_INPUT_ONLY_PINS (!DISABLED_FOR_TARGETS(ESP32C3, ESP32S3, ESP32C2))
static void check_spi_pre_n_for(int clk, int pre, int n)
{
@ -1316,8 +1316,8 @@ TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test",
#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ)
#elif CONFIG_IDF_TARGET_ESP32C3
#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ)
#elif CONFIG_IDF_TARGET_ESP8684
#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP8684_DEFAULT_CPU_FREQ_MHZ)
#elif CONFIG_IDF_TARGET_ESP32C2
#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ)
#endif
static void speed_setup(spi_device_handle_t *spi, bool use_dma)

4
components/driver/test/test_spi_sio.c
View File

@ -144,7 +144,7 @@ TEST_CASE("SPI Single Board Test SIO", "[spi]")
//TODO IDF-4455
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP8684, ESP32H2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP32C2, ESP32H2)
//These tests are ESP32 only due to lack of runners
/********************************************************************************
* Test SIO Master & Slave
@ -262,4 +262,4 @@ void test_sio_slave(void)
}
TEST_CASE_MULTIPLE_DEVICES("sio mode", "[spi][test_env=Example_SPI_Multi_device]", test_sio_master, test_sio_slave);
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP8684, ESP32H2)
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32C2, ESP32H2)

4
components/efuse/efuse_table_gen.py
View File

@ -4,7 +4,7 @@
#
# Converts efuse table to header file efuse_table.h.
#
# SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
#
# SPDX-License-Identifier: Apache-2.0
from __future__ import division, print_function
@ -487,7 +487,7 @@ def main():
parser = argparse.ArgumentParser(description='ESP32 eFuse Manager')
parser.add_argument('--idf_target', '-t', help='Target chip type', choices=['esp32', 'esp32s2', 'esp32s3', 'esp32c3',
'esp32h2', 'esp8684'], default='esp32')
'esp32h2', 'esp32c2'], default='esp32')
parser.add_argument('--quiet', '-q', help="Don't print non-critical status messages to stderr", action='store_true')
parser.add_argument('--debug', help='Create header file with debug info', default=False, action='store_false')
parser.add_argument('--info', help='Print info about range of used bits', default=False, action='store_true')

4
components/efuse/esp8684/esp_efuse_fields.c → components/efuse/esp32c2/esp_efuse_fields.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,7 +9,7 @@
#include "esp_efuse_table.h"
#include "stdlib.h"
#include "esp_types.h"
#include "esp8684/rom/efuse.h"
#include "esp32c2/rom/efuse.h"
#include "assert.h"
#include "esp_err.h"
#include "esp_log.h"

2
components/efuse/esp8684/esp_efuse_table.c → components/efuse/esp32c2/esp_efuse_table.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

0
components/efuse/esp8684/esp_efuse_table.csv → components/efuse/esp32c2/esp_efuse_table.csv
View File

Can't render this file because it contains an unexpected character in line 7 and column 87.

4
components/efuse/esp8684/esp_efuse_utility.c → components/efuse/esp32c2/esp_efuse_utility.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -11,7 +11,7 @@
#include "esp_efuse_utility.h"
#include "soc/efuse_periph.h"
#include "esp_private/esp_clk.h"
#include "esp8684/rom/efuse.h"
#include "esp32c2/rom/efuse.h"
/*Range addresses to read blocks*/
const esp_efuse_range_addr_t range_read_addr_blocks[] = {

6
components/efuse/esp8684/include/esp_efuse.h → components/efuse/esp32c2/include/esp_efuse.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -11,7 +11,7 @@ extern "C" {
#endif
/**
* @brief Type of eFuse blocks ESP8684
* @brief Type of eFuse blocks ESP32C2
*/
typedef enum {
EFUSE_BLK0 = 0, /**< Number of eFuse BLOCK0. REPEAT_DATA */
@ -37,7 +37,7 @@ typedef enum {
EFUSE_CODING_SCHEME_RS = 3, /**< Reed-Solomon coding */
} esp_efuse_coding_scheme_t;
/** For ESP8684, there's no key purpose region for efuse keys, In order to maintain
/** For ESP32C2, there's no key purpose region for efuse keys, In order to maintain
* compatibility with the previous apis, we should set the parameter of 'ets_efuse_purpose_t'
* as default value ETS_EFUSE_KEY_PURPOSE_INVALID.
* (In fact, this parameter can be any value, the api in the rom will not process key_purpose region)

2
components/efuse/esp8684/include/esp_efuse_table.h → components/efuse/esp32c2/include/esp_efuse_table.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/efuse/esp8684/private_include/esp_efuse_utility.h → components/efuse/esp32c2/private_include/esp_efuse_utility.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

0
components/efuse/esp8684/sources.cmake → components/efuse/esp32c2/sources.cmake
View File

6
components/efuse/include/esp_efuse.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -25,8 +25,8 @@
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/secure_boot.h"
#endif
#ifdef __cplusplus

22
components/efuse/src/esp_efuse_api_key_esp32xx.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -31,7 +31,7 @@ typedef struct {
} esp_efuse_revokes_t;
const esp_efuse_keys_t s_table[EFUSE_BLK_KEY_MAX - EFUSE_BLK_KEY0] = {
#if CONFIG_IDF_TARGET_ESP8684
#if CONFIG_IDF_TARGET_ESP32C2
{ESP_EFUSE_KEY0, NULL, ESP_EFUSE_RD_DIS_KEY0, ESP_EFUSE_WR_DIS_KEY0, NULL},
#else
{ESP_EFUSE_KEY0, ESP_EFUSE_KEY_PURPOSE_0, ESP_EFUSE_RD_DIS_KEY0, ESP_EFUSE_WR_DIS_KEY0, ESP_EFUSE_WR_DIS_KEY0_PURPOSE},
@ -43,7 +43,7 @@ const esp_efuse_keys_t s_table[EFUSE_BLK_KEY_MAX - EFUSE_BLK_KEY0] = {
#if 0
{ESP_EFUSE_KEY6, ESP_EFUSE_KEY_PURPOSE_6, ESP_EFUSE_RD_DIS_KEY6, ESP_EFUSE_WR_DIS_KEY6, ESP_EFUSE_WR_DIS_KEY6_PURPOSE},
#endif
#endif //#if CONFIG_IDF_TARGET_ESP8684
#endif //#if CONFIG_IDF_TARGET_ESP32C2
};
#if SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY
@ -76,7 +76,7 @@ bool esp_efuse_block_is_empty(esp_efuse_block_t block)
// Sets a write protection for the whole block.
esp_err_t esp_efuse_set_write_protect(esp_efuse_block_t blk)
{
#if !CONFIG_IDF_TARGET_ESP8684
#if !CONFIG_IDF_TARGET_ESP32C2
if (blk == EFUSE_BLK1) {
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_BLK1, 1);
} else if (blk == EFUSE_BLK2) {
@ -100,7 +100,7 @@ esp_err_t esp_efuse_set_read_protect(esp_efuse_block_t blk)
unsigned idx = blk - EFUSE_BLK_KEY0;
return esp_efuse_write_field_cnt(s_table[idx].key_rd_dis, 1);
}
#if !CONFIG_IDF_TARGET_ESP8684 // IDF-3818
#if !CONFIG_IDF_TARGET_ESP32C2 // IDF-3818
else if (blk == EFUSE_BLK10) {
return esp_efuse_write_field_cnt(ESP_EFUSE_RD_DIS_SYS_DATA_PART2, 1);
}
@ -171,7 +171,7 @@ esp_err_t esp_efuse_set_key_dis_write(esp_efuse_block_t block)
return esp_efuse_write_field_bit(s_table[idx].key_wr_dis);
}
#if !CONFIG_IDF_TARGET_ESP8684 // cause esp8684 efuse has no purpose region
#if !CONFIG_IDF_TARGET_ESP32C2 // cause esp32c2 efuse has no purpose region
esp_efuse_purpose_t esp_efuse_get_key_purpose(esp_efuse_block_t block)
{
if (block < EFUSE_BLK_KEY0 || block >= EFUSE_BLK_KEY_MAX) {
@ -194,7 +194,7 @@ esp_err_t esp_efuse_set_key_purpose(esp_efuse_block_t block, esp_efuse_purpose_t
unsigned idx = block - EFUSE_BLK_KEY0;
return esp_efuse_write_field_blob(s_table[idx].keypurpose, &purpose, s_table[idx].keypurpose[0]->bit_count);
}
#endif //CONFIG_IDF_TARGET_ESP8684
#endif //CONFIG_IDF_TARGET_ESP32C2
bool esp_efuse_get_keypurpose_dis_write(esp_efuse_block_t block)
{
@ -257,7 +257,7 @@ bool esp_efuse_key_block_unused(esp_efuse_block_t block)
}
if (
#if !CONFIG_IDF_TARGET_ESP8684
#if !CONFIG_IDF_TARGET_ESP32C2
esp_efuse_get_key_purpose(block) != ESP_EFUSE_KEY_PURPOSE_USER ||
esp_efuse_get_keypurpose_dis_write(block) ||
#endif
@ -277,7 +277,7 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
{
esp_err_t err = ESP_OK;
#if CONFIG_IDF_TARGET_ESP8684
#if CONFIG_IDF_TARGET_ESP32C2
if (block != EFUSE_BLK_KEY0) {
return ESP_ERR_INVALID_ARG;
}
@ -296,7 +296,7 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
ESP_EFUSE_CHK(esp_efuse_write_field_blob(s_table[idx].key, key, key_size_bytes * 8));
ESP_EFUSE_CHK(esp_efuse_set_key_dis_write(block));
#if !CONFIG_IDF_TARGET_ESP8684
#if !CONFIG_IDF_TARGET_ESP32C2
if (purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY ||
#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
@ -310,7 +310,7 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
}
ESP_EFUSE_CHK(esp_efuse_set_key_purpose(block, purpose));
ESP_EFUSE_CHK(esp_efuse_set_keypurpose_dis_write(block));
#endif //#if !CONFIG_IDF_TARGET_ESP8684
#endif //#if !CONFIG_IDF_TARGET_ESP32C2
return esp_efuse_batch_write_commit();
}
err_exit:

4
components/efuse/src/esp_efuse_fields.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -33,7 +33,7 @@ void esp_efuse_reset(void)
esp_efuse_utility_reset();
}
#if !CONFIG_IDF_TARGET_ESP8684
#if !CONFIG_IDF_TARGET_ESP32C2
// IDF-3818
uint32_t esp_efuse_read_secure_version(void)
{

4
components/esp8684/CMakeLists.txt → components/esp32c2/CMakeLists.txt
View File

@ -1,5 +1,5 @@
idf_build_get_property(target IDF_TARGET)
if(NOT "${target}" STREQUAL "esp8684")
if(NOT "${target}" STREQUAL "esp32c2")
return()
endif()
@ -10,4 +10,4 @@ if(NOT BOOTLOADER_BUILD)
endif()
idf_component_register(REQUIRES riscv "${legacy_reqs}"
REQUIRED_IDF_TARGETS esp8684)
REQUIRED_IDF_TARGETS esp32c2)

126
components/esp8684/Kconfig → components/esp32c2/Kconfig
View File

@ -1,46 +1,46 @@
menu "ESP8684-Specific"
visible if IDF_TARGET_ESP8684
menu "ESP32C2-Specific"
visible if IDF_TARGET_ESP32C2
choice ESP8684_DEFAULT_CPU_FREQ_MHZ
choice ESP32C2_DEFAULT_CPU_FREQ_MHZ
prompt "CPU frequency"
default ESP8684_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
default ESP8684_DEFAULT_CPU_FREQ_120 if !IDF_ENV_FPGA
default ESP32C2_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
default ESP32C2_DEFAULT_CPU_FREQ_120 if !IDF_ENV_FPGA
help
CPU frequency to be set on application startup.
config ESP8684_DEFAULT_CPU_FREQ_40
config ESP32C2_DEFAULT_CPU_FREQ_40
bool "40 MHz"
depends on IDF_ENV_FPGA
config ESP8684_DEFAULT_CPU_FREQ_80
config ESP32C2_DEFAULT_CPU_FREQ_80
bool "80 MHz"
config ESP8684_DEFAULT_CPU_FREQ_120
config ESP32C2_DEFAULT_CPU_FREQ_120
bool "120 MHz"
endchoice
config ESP8684_DEFAULT_CPU_FREQ_MHZ
config ESP32C2_DEFAULT_CPU_FREQ_MHZ
int
default 40 if ESP8684_DEFAULT_CPU_FREQ_40
default 80 if ESP8684_DEFAULT_CPU_FREQ_80
default 120 if ESP8684_DEFAULT_CPU_FREQ_120
default 40 if ESP32C2_DEFAULT_CPU_FREQ_40
default 80 if ESP32C2_DEFAULT_CPU_FREQ_80
default 120 if ESP32C2_DEFAULT_CPU_FREQ_120
menu "Cache config"
choice ESP8684_MMU_PAGE_SIZE
choice ESP32C2_MMU_PAGE_SIZE
# TODO: IDF-3821
prompt "Cache page size"
default ESP8684_MMU_PAGE_SIZE_64KB
default ESP32C2_MMU_PAGE_SIZE_64KB
help
Cache page size to be set on application startup
config ESP8684_MMU_PAGE_SIZE_16KB
config ESP32C2_MMU_PAGE_SIZE_16KB
bool "16KB"
config ESP8684_MMU_PAGE_SIZE_32KB
config ESP32C2_MMU_PAGE_SIZE_32KB
bool "32KB"
config ESP8684_MMU_PAGE_SIZE_64KB
config ESP32C2_MMU_PAGE_SIZE_64KB
bool "64KB"
endchoice
config ESP8684_INSTRUCTION_CACHE_WRAP
config ESP32C2_INSTRUCTION_CACHE_WRAP
bool
prompt "Instruction cache wrap"
help
@ -48,15 +48,15 @@ menu "ESP8684-Specific"
The wrap length is fixed to 32B
config ESP8684_MMU_PAGE_MODE
config ESP32C2_MMU_PAGE_MODE
int
default 0 if ESP8684_MMU_PAGE_SIZE_16KB
default 1 if ESP8684_MMU_PAGE_SIZE_32KB
default 2 if ESP8684_MMU_PAGE_SIZE_64KB
default 0 if ESP32C2_MMU_PAGE_SIZE_16KB
default 1 if ESP32C2_MMU_PAGE_SIZE_32KB
default 2 if ESP32C2_MMU_PAGE_SIZE_64KB
endmenu
config ESP8684_DEBUG_OCDAWARE
config ESP32C2_DEBUG_OCDAWARE
bool "Make exception and panic handlers JTAG/OCD aware"
default y
select FREERTOS_DEBUG_OCDAWARE
@ -64,26 +64,26 @@ menu "ESP8684-Specific"
The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
instead of panicking, have the debugger stop on the offending instruction.
config ESP8684_DEBUG_STUBS_ENABLE
config ESP32C2_DEBUG_STUBS_ENABLE
bool "OpenOCD debug stubs"
default COMPILER_OPTIMIZATION_LEVEL_DEBUG
depends on !ESP8684_TRAX
depends on !ESP32C2_TRAX
help
Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
e.g. GCOV data dump.
config ESP8684_BROWNOUT_DET
config ESP32C2_BROWNOUT_DET
bool "Hardware brownout detect & reset"
default y
help
The ESP8684 has a built-in brownout detector which can detect if the voltage is lower than
The ESP32C2 has a built-in brownout detector which can detect if the voltage is lower than
a specific value. If this happens, it will reset the chip in order to prevent unintended
behaviour.
choice ESP8684_BROWNOUT_DET_LVL_SEL
choice ESP32C2_BROWNOUT_DET_LVL_SEL
prompt "Brownout voltage level"
depends on ESP8684_BROWNOUT_DET
default ESP8684_BROWNOUT_DET_LVL_SEL_7
depends on ESP32C2_BROWNOUT_DET
default ESP32C2_BROWNOUT_DET_LVL_SEL_7
help
The brownout detector will reset the chip when the supply voltage is approximately
below this level. Note that there may be some variation of brownout voltage level
@ -91,32 +91,32 @@ menu "ESP8684-Specific"
#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
#of the brownout threshold levels.
config ESP8684_BROWNOUT_DET_LVL_SEL_7
config ESP32C2_BROWNOUT_DET_LVL_SEL_7
bool "2.51V"
config ESP8684_BROWNOUT_DET_LVL_SEL_6
config ESP32C2_BROWNOUT_DET_LVL_SEL_6
bool "2.64V"
config ESP8684_BROWNOUT_DET_LVL_SEL_5
config ESP32C2_BROWNOUT_DET_LVL_SEL_5
bool "2.76V"
config ESP8684_BROWNOUT_DET_LVL_SEL_4
config ESP32C2_BROWNOUT_DET_LVL_SEL_4
bool "2.92V"
config ESP8684_BROWNOUT_DET_LVL_SEL_3
config ESP32C2_BROWNOUT_DET_LVL_SEL_3
bool "3.10V"
config ESP8684_BROWNOUT_DET_LVL_SEL_2
config ESP32C2_BROWNOUT_DET_LVL_SEL_2
bool "3.27V"
endchoice
config ESP8684_BROWNOUT_DET_LVL
config ESP32C2_BROWNOUT_DET_LVL
int
default 2 if ESP8684_BROWNOUT_DET_LVL_SEL_2
default 3 if ESP8684_BROWNOUT_DET_LVL_SEL_3
default 4 if ESP8684_BROWNOUT_DET_LVL_SEL_4
default 5 if ESP8684_BROWNOUT_DET_LVL_SEL_5
default 6 if ESP8684_BROWNOUT_DET_LVL_SEL_6
default 7 if ESP8684_BROWNOUT_DET_LVL_SEL_7
default 2 if ESP32C2_BROWNOUT_DET_LVL_SEL_2
default 3 if ESP32C2_BROWNOUT_DET_LVL_SEL_3
default 4 if ESP32C2_BROWNOUT_DET_LVL_SEL_4
default 5 if ESP32C2_BROWNOUT_DET_LVL_SEL_5
default 6 if ESP32C2_BROWNOUT_DET_LVL_SEL_6
default 7 if ESP32C2_BROWNOUT_DET_LVL_SEL_7
choice ESP8684_TIME_SYSCALL
choice ESP32C2_TIME_SYSCALL
prompt "Timers used for gettimeofday function"
default ESP8684_TIME_SYSCALL_USE_RTC_SYSTIMER
default ESP32C2_TIME_SYSCALL_USE_RTC_SYSTIMER
help
This setting defines which hardware timers are used to
implement 'gettimeofday' and 'time' functions in C library.
@ -136,41 +136,41 @@ menu "ESP8684-Specific"
- When RTC is used for timekeeping, two RTC_STORE registers are
used to keep time in deep sleep mode.
config ESP8684_TIME_SYSCALL_USE_RTC_SYSTIMER
config ESP32C2_TIME_SYSCALL_USE_RTC_SYSTIMER
bool "RTC and high-resolution timer"
select ESP_TIME_FUNCS_USE_RTC_TIMER
select ESP_TIME_FUNCS_USE_ESP_TIMER
config ESP8684_TIME_SYSCALL_USE_RTC
config ESP32C2_TIME_SYSCALL_USE_RTC
bool "RTC"
select ESP_TIME_FUNCS_USE_RTC_TIMER
config ESP8684_TIME_SYSCALL_USE_SYSTIMER
config ESP32C2_TIME_SYSCALL_USE_SYSTIMER
bool "High-resolution timer"
select ESP_TIME_FUNCS_USE_ESP_TIMER
config ESP8684_TIME_SYSCALL_USE_NONE
config ESP32C2_TIME_SYSCALL_USE_NONE
bool "None"
select ESP_TIME_FUNCS_USE_NONE
endchoice
choice ESP8684_RTC_CLK_SRC
choice ESP32C2_RTC_CLK_SRC
prompt "RTC clock source"
default ESP8684_RTC_CLK_SRC_INT_RC
default ESP32C2_RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
config ESP8684_RTC_CLK_SRC_INT_RC
config ESP32C2_RTC_CLK_SRC_INT_RC
bool "Internal 150kHz RC oscillator"
config ESP8684_RTC_CLK_SRC_EXT_OSC
config ESP32C2_RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XP pin"
config ESP8684_RTC_CLK_SRC_INT_8MD256
config ESP32C2_RTC_CLK_SRC_INT_8MD256
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
endchoice
config ESP8684_RTC_CLK_CAL_CYCLES
config ESP32C2_RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if ESP8684_RTC_CLK_SRC_EXT_CRYS || ESP8684_RTC_CLK_SRC_EXT_OSC || ESP8684_RTC_CLK_SRC_INT_8MD256
default 1024 if ESP8684_RTC_CLK_SRC_INT_RC
range 0 27000 if ESP8684_RTC_CLK_SRC_EXT_CRYS || ESP8684_RTC_CLK_SRC_EXT_OSC || ESP8684_RTC_CLK_SRC_INT_8MD256
range 0 32766 if ESP8684_RTC_CLK_SRC_INT_RC
default 3000 if ESP32C2_RTC_CLK_SRC_EXT_CRYS || ESP32C2_RTC_CLK_SRC_EXT_OSC || ESP32C2_RTC_CLK_SRC_INT_8MD256
default 1024 if ESP32C2_RTC_CLK_SRC_INT_RC
range 0 27000 if ESP32C2_RTC_CLK_SRC_EXT_CRYS || ESP32C2_RTC_CLK_SRC_EXT_OSC || ESP32C2_RTC_CLK_SRC_INT_8MD256
range 0 32766 if ESP32C2_RTC_CLK_SRC_INT_RC
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
@ -187,7 +187,7 @@ menu "ESP8684-Specific"
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
config ESP8684_NO_BLOBS
config ESP32C2_NO_BLOBS
bool "No Binary Blobs"
depends on !BT_ENABLED
default n
@ -195,12 +195,12 @@ menu "ESP8684-Specific"
If enabled, this disables the linking of binary libraries in the application build. Note
that after enabling this Wi-Fi/Bluetooth will not work.
config ESP8684_LIGHTSLEEP_GPIO_RESET_WORKAROUND # IDF-3904
config ESP32C2_LIGHTSLEEP_GPIO_RESET_WORKAROUND # IDF-3904
bool "light sleep GPIO reset workaround"
default y
select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
help
ESP8684 will reset at wake-up if GPIO is received a small electrostatic pulse during
ESP32C2 will reset at wake-up if GPIO is received a small electrostatic pulse during
light sleep, with specific condition
- GPIO needs to be configured as input-mode only
@ -214,4 +214,4 @@ menu "ESP8684-Specific"
This option provides a software workaround for this issue. Configure to isolate all
GPIO pins in sleep state.
endmenu # ESP8684-Specific
endmenu # ESP32C2-Specific

0
components/esp8684/project_include.cmake → components/esp32c2/project_include.cmake
View File

2
components/esp_gdbstub/CMakeLists.txt
View File

@ -1,6 +1,6 @@
idf_build_get_property(target IDF_TARGET)
if(NOT "${target}" STREQUAL "esp8684") # TODO: IDF-4135
if(NOT "${target}" STREQUAL "esp32c2") # TODO: IDF-4135
idf_component_register(SRCS "src/gdbstub.c" "src/packet.c"
INCLUDE_DIRS "include"
PRIV_INCLUDE_DIRS "private_include"

2
components/esp_gdbstub/esp8684/gdbstub_esp8684.c → components/esp_gdbstub/esp32c2/gdbstub_esp32c2.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_gdbstub/esp8684/gdbstub_target_config.h → components/esp_gdbstub/esp32c2/gdbstub_target_config.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

4
components/esp_hw_support/cpu_util.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -75,7 +75,7 @@ bool IRAM_ATTR esp_cpu_in_ocd_debug_mode(void)
CONFIG_ESP32S3_DEBUG_OCDAWARE || \
CONFIG_ESP32C3_DEBUG_OCDAWARE || \
CONFIG_ESP32H2_DEBUG_OCDAWARE || \
CONFIG_ESP8684_DEBUG_OCDAWARE
CONFIG_ESP32C2_DEBUG_OCDAWARE
return cpu_ll_is_debugger_attached();
#else
return false; // Always return false if "OCD aware" is disabled

10
components/esp_hw_support/esp_clk.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -30,9 +30,9 @@
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/rtc.h"
#include "esp32h2/rtc.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/rtc.h"
#include "esp8684/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rtc.h"
#endif
#define MHZ (1000000)
@ -74,7 +74,7 @@ int IRAM_ATTR esp_clk_xtal_freq(void)
return rtc_clk_xtal_freq_get() * MHZ;
}
#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP8684
#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C2
void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us)
{
/* Update scale factors used by esp_rom_delay_us */

4
components/esp_hw_support/include/esp_chip_info.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -25,7 +25,7 @@ typedef enum {
CHIP_ESP32S3 = 9, //!< ESP32-S3
CHIP_ESP32C3 = 5, //!< ESP32-C3
CHIP_ESP32H2 = 6, //!< ESP32-H2
CHIP_ESP8684 = 12, //!< ESP-8684
CHIP_ESP32C2 = 12, //!< ESP32-C2
} esp_chip_model_t;
/* Chip feature flags, used in esp_chip_info_t */

6
components/esp_hw_support/include/esp_mac.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -34,8 +34,8 @@ typedef enum {
#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES
#elif CONFIG_IDF_TARGET_ESP32H2
#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32H2_UNIVERSAL_MAC_ADDRESSES
#elif CONFIG_IDF_TARGET_ESP8684
#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP8684_UNIVERSAL_MAC_ADDRESSES
#elif CONFIG_IDF_TARGET_ESP32C2
#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C2_UNIVERSAL_MAC_ADDRESSES
#endif
/** @endcond */

2
components/esp_hw_support/include/soc/esp8684/dport_access.h → components/esp_hw_support/include/soc/esp32c2/dport_access.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_hw_support/include/soc/esp8684/esp_crypto_lock.h → components/esp_hw_support/include/soc/esp32c2/esp_crypto_lock.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

4
components/esp_hw_support/include/soc/esp8684/memprot.h → components/esp_hw_support/include/soc/esp32c2/memprot.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -237,7 +237,7 @@ bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
/**
* @brief Gets CPU ID for currently active PMS violation interrupt
*
* @return CPU ID (CPU_PRO for ESP8684)
* @return CPU ID (CPU_PRO for ESP32-C2)
*/
int IRAM_ATTR esp_memprot_intr_get_cpuid(void);

4
components/esp_hw_support/include/soc/esp8684/rtc.h → components/esp_hw_support/include/soc/esp32c2/rtc.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -13,7 +13,7 @@ extern "C" {
#endif
/**
* @file esp8684/rtc.h
* @file esp32c2/rtc.h
*
* This file contains declarations of rtc related functions.
*/

6
components/esp_hw_support/include/soc_log.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -35,8 +35,8 @@
#include "esp32c3/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/ets_sys.h"
#endif
#define SOC_LOGE(tag, fmt, ...) esp_rom_printf("%s(err): " fmt, tag, ##__VA_ARGS__)

2
components/esp_hw_support/linker.lf
View File

@ -9,7 +9,7 @@ entries:
rtc_pm (noflash_text)
rtc_sleep (noflash_text)
rtc_time (noflash_text)
if IDF_TARGET_ESP32C3 = n && IDF_TARGET_ESP32H2 = n && IDF_TARGET_ESP8684 = n:
if IDF_TARGET_ESP32C3 = n && IDF_TARGET_ESP32H2 = n && IDF_TARGET_ESP32C2 = n:
rtc_wdt (noflash_text)
if IDF_TARGET_ESP32S3 = y:
if SPIRAM_MODE_QUAD = y:

2
components/esp_hw_support/port/esp8684/CMakeLists.txt → components/esp_hw_support/port/esp32c2/CMakeLists.txt
View File

@ -1,4 +1,4 @@
set(srcs "cpu_util_esp8684.c"
set(srcs "cpu_util_esp32c2.c"
"rtc_clk_init.c"
"rtc_clk.c"
"rtc_init.c"

18
components/esp_hw_support/port/esp8684/Kconfig.mac → components/esp_hw_support/port/esp32c2/Kconfig.mac
View File

@ -1,6 +1,6 @@
choice ESP8684_UNIVERSAL_MAC_ADDRESSES
choice ESP32C2_UNIVERSAL_MAC_ADDRESSES
bool "Number of universally administered (by IEEE) MAC address"
default ESP8684_UNIVERSAL_MAC_ADDRESSES_FOUR
default ESP32C2_UNIVERSAL_MAC_ADDRESSES_FOUR
help
Configure the number of universally administered (by IEEE) MAC addresses.
@ -21,15 +21,15 @@ choice ESP8684_UNIVERSAL_MAC_ADDRESSES
a custom universal MAC address range, the correct setting will depend on the allocation of MAC
addresses in this range (either 2 or 4 per device.)
Note that ESP-8684 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac()
Note that ESP32-C2 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac()
API to return a MAC for Ethernet, this can only be used with an external MAC peripheral.
config ESP8684_UNIVERSAL_MAC_ADDRESSES_TWO
config ESP32C2_UNIVERSAL_MAC_ADDRESSES_TWO
bool "Two"
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
select ESP_MAC_ADDR_UNIVERSE_BT
config ESP8684_UNIVERSAL_MAC_ADDRESSES_FOUR
config ESP32C2_UNIVERSAL_MAC_ADDRESSES_FOUR
bool "Four"
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
@ -37,8 +37,8 @@ choice ESP8684_UNIVERSAL_MAC_ADDRESSES
select ESP_MAC_ADDR_UNIVERSE_ETH
endchoice
config ESP8684_UNIVERSAL_MAC_ADDRESSES
# TODO: check 8684 mac address WIFI-4134
config ESP32C2_UNIVERSAL_MAC_ADDRESSES
# TODO: check ESP32-C2 mac address WIFI-4134
int
default 2 if ESP8684_UNIVERSAL_MAC_ADDRESSES_TWO
default 4 if ESP8684_UNIVERSAL_MAC_ADDRESSES_FOUR
default 2 if ESP32C2_UNIVERSAL_MAC_ADDRESSES_TWO
default 4 if ESP32C2_UNIVERSAL_MAC_ADDRESSES_FOUR

4
components/esp_hw_support/port/esp8684/chip_info.c → components/esp_hw_support/port/esp32c2/chip_info.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2013-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2013-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -11,7 +11,7 @@
void esp_chip_info(esp_chip_info_t *out_info)
{
memset(out_info, 0, sizeof(*out_info));
out_info->model = CHIP_ESP8684;
out_info->model = CHIP_ESP32C2;
out_info->revision = esp_efuse_get_chip_ver();
out_info->cores = 1;
out_info->features = CHIP_FEATURE_WIFI_BGN | CHIP_FEATURE_BLE;

4
components/esp_hw_support/port/esp8684/cpu_util_esp8684.c → components/esp_hw_support/port/esp32c2/cpu_util_esp32c2.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -10,7 +10,7 @@ void esp_cpu_configure_region_protection(void)
{
/* Notes on implementation:
*
* 1) ESP-8684 CPU support overlapping PMP regions, configuration is based on static priority
* 1) ESP32-C2 CPU support overlapping PMP regions, configuration is based on static priority
* feature(lowest numbered entry has highest priority).
*
* 2) Therefore, we use TOR (top of range) and NAOPT entries to map the effective area.

2
components/esp_hw_support/port/esp8684/dport_access.c → components/esp_hw_support/port/esp32c2/dport_access.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_hw_support/port/esp8684/esp_crypto_lock.c → components/esp_hw_support/port/esp32c2/esp_crypto_lock.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_hw_support/port/esp8684/i2c_brownout.h → components/esp_hw_support/port/esp32c2/i2c_brownout.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_hw_support/port/esp8684/private_include/regi2c_bbpll.h → components/esp_hw_support/port/esp32c2/private_include/regi2c_bbpll.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

4
components/esp_hw_support/port/esp8684/private_include/regi2c_bias.h → components/esp_hw_support/port/esp32c2/private_include/regi2c_bias.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -11,7 +11,7 @@
* @brief Register definitions for bias
*
* This file lists register fields of BIAS. These definitions are used via macros defined in regi2c_ctrl.h, by
* bootloader_hardware_init function in bootloader_esp8684.c.
* bootloader_hardware_init function in bootloader_esp32c2.c.
*/
#define I2C_BIAS 0X6A

2
components/esp_hw_support/port/esp8684/private_include/regi2c_brownout.h → components/esp_hw_support/port/esp32c2/private_include/regi2c_brownout.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_hw_support/port/esp8684/private_include/regi2c_dig_reg.h → components/esp_hw_support/port/esp32c2/private_include/regi2c_dig_reg.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_hw_support/port/esp8684/private_include/regi2c_lp_bias.h → components/esp_hw_support/port/esp32c2/private_include/regi2c_lp_bias.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_hw_support/port/esp8684/private_include/regi2c_saradc.h → components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_hw_support/port/esp8684/regi2c_ctrl.h → components/esp_hw_support/port/esp32c2/regi2c_ctrl.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

16
components/esp_hw_support/port/esp8684/rtc_clk.c → components/esp_hw_support/port/esp32c2/rtc_clk.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -10,10 +10,10 @@
#include <assert.h>
#include <stdlib.h>
#include "sdkconfig.h"
#include "esp8684/rom/ets_sys.h"
#include "esp8684/rom/rtc.h"
#include "esp8684/rom/uart.h"
#include "esp8684/rom/gpio.h"
#include "esp32c2/rom/ets_sys.h"
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rom/uart.h"
#include "esp32c2/rom/gpio.h"
#include "soc/rtc.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/efuse_reg.h"
@ -37,7 +37,7 @@ static void rtc_clk_cpu_freq_to_8m(void);
void rtc_clk_32k_bootstrap(uint32_t cycle)
{
/* No special bootstrapping needed for ESP-8684, 'cycle' argument is to keep the signature
/* No special bootstrapping needed for ESP32-C2, 'cycle' argument is to keep the signature
* same as for the ESP32. Just enable the XTAL here.
*/
}
@ -137,7 +137,7 @@ static void rtc_clk_bbpll_enable(void)
void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq)
{
(void) xtal_freq;
// ESP8684 only support 40M XTAL, all the parameters are given as 40M XTAL directly.
// ESP32-C2 only support 40M XTAL, all the parameters are given as 40M XTAL directly.
uint8_t div_ref = 0;
uint8_t div7_0 = 8;
uint8_t dr1 = 0;
@ -270,7 +270,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config)
case DPORT_SOC_CLK_SEL_PLL: {
source = RTC_CPU_FREQ_SRC_PLL;
uint32_t cpuperiod_sel = REG_GET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL);
source_freq_mhz = RTC_PLL_FREQ_480M; // PLL clock on ESP8684 was fixed to 480MHz
source_freq_mhz = RTC_PLL_FREQ_480M; // PLL clock on ESP32-C2 was fixed to 480MHz
if (cpuperiod_sel == DPORT_CPUPERIOD_SEL_80) {
div = 6;
freq_mhz = 80;

2
components/esp_hw_support/port/esp8684/rtc_clk_common.h → components/esp_hw_support/port/esp32c2/rtc_clk_common.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

8
components/esp_hw_support/port/esp8684/rtc_clk_init.c → components/esp_hw_support/port/esp32c2/rtc_clk_init.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -8,9 +8,9 @@
#include <stdint.h>
#include <stddef.h>
#include <stdlib.h>
#include "esp8684/rom/ets_sys.h"
#include "esp8684/rom/rtc.h"
#include "esp8684/rom/uart.h"
#include "esp32c2/rom/ets_sys.h"
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rom/uart.h"
#include "soc/rtc.h"
#include "soc/rtc_periph.h"
#include "soc/efuse_periph.h"

8
components/esp_hw_support/port/esp8684/rtc_init.c → components/esp_hw_support/port/esp32c2/rtc_init.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -124,7 +124,7 @@ void rtc_vddsdio_set_config(rtc_vddsdio_config_t config)
static void set_ocode_by_efuse(int calib_version)
{
#if !CONFIG_IDF_TARGET_ESP8684 //TODO: Need check for esp8684
#if !CONFIG_IDF_TARGET_ESP32C2 //TODO: Need check for esp32c2
assert(calib_version == 1);
// use efuse ocode.
uint32_t ocode;
@ -190,7 +190,7 @@ static void calibrate_ocode(void)
static uint32_t get_dig_dbias_by_efuse(uint8_t chip_version)
{
#if CONFIG_IDF_TARGET_ESP8684 //TODO: Need check for esp8684
#if CONFIG_IDF_TARGET_ESP32C2 //TODO: Need check for esp32c2
return 0;
#else
assert(chip_version >= 3);
@ -206,7 +206,7 @@ static uint32_t get_dig_dbias_by_efuse(uint8_t chip_version)
uint32_t get_rtc_dbias_by_efuse(uint8_t chip_version, uint32_t dig_dbias)
{
#if CONFIG_IDF_TARGET_ESP8684 //TODO: Need check for esp8684
#if CONFIG_IDF_TARGET_ESP32C2 //TODO: Need check for esp32c2
return 0;
#else
assert(chip_version >= 3);

2
components/esp_hw_support/port/esp8684/rtc_pm.c → components/esp_hw_support/port/esp32c2/rtc_pm.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

6
components/esp_hw_support/port/esp8684/rtc_sleep.c → components/esp_hw_support/port/esp32c2/rtc_sleep.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -17,8 +17,8 @@
#include "soc/timer_group_reg.h"
#include "soc/system_reg.h"
#include "soc/rtc.h"
#include "esp8684/rom/ets_sys.h"
#include "esp8684/rom/rtc.h"
#include "esp32c2/rom/ets_sys.h"
#include "esp32c2/rom/rtc.h"
#include "regi2c_ctrl.h"
#include "esp_efuse.h"

6
components/esp_hw_support/port/esp8684/rtc_time.c → components/esp_hw_support/port/esp32c2/rtc_time.c
View File

@ -1,11 +1,11 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include "esp8684/rom/ets_sys.h"
#include "esp32c2/rom/ets_sys.h"
#include "soc/rtc.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/timer_group_reg.h"
@ -31,7 +31,7 @@
*/
uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles)
{
/* On ESP8684, choosing RTC_CAL_RTC_MUX results in calibration of
/* On ESP32-C2, choosing RTC_CAL_RTC_MUX results in calibration of
* the 150k RTC clock regardless of the currenlty selected SLOW_CLK.
* On the ESP32, it used the currently selected SLOW_CLK.
* The following code emulates ESP32 behavior:

12
components/esp_hw_support/sleep_modes.c
View File

@ -69,9 +69,9 @@
#include "esp32h2/rom/cache.h"
#include "esp32h2/rom/rtc.h"
#include "soc/extmem_reg.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/rom/cache.h"
#include "esp8684/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/cache.h"
#include "esp32c2/rom/rtc.h"
#include "soc/extmem_reg.h"
#endif
@ -104,8 +104,8 @@
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (105)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (37)
#elif CONFIG_IDF_TARGET_ESP8684
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP8684_DEFAULT_CPU_FREQ_MHZ
#elif CONFIG_IDF_TARGET_ESP32C2
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (105)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (37)
#endif
@ -462,7 +462,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
#else
#if !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
/* If not possible stack is in RTC FAST memory, use the ROM function to calculate the CRC and save ~140 bytes IRAM */
#if !CONFIG_IDF_TARGET_ESP8684
#if !CONFIG_IDF_TARGET_ESP32C2
// RTC has no rtc memory, IDF-3901
set_rtc_memory_crc();
#endif

2
components/esp_netif/test_apps/README.md
View File

@ -1,4 +1,4 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- | -------- |
Not support on ESP8684 yet, waiting esp_wifi supported. TODO: IDF-3905
Not support on ESP32-C2 yet, waiting esp_wifi supported. TODO: IDF-3905

2
components/esp_phy/CMakeLists.txt
View File

@ -1,6 +1,6 @@
idf_build_get_property(idf_target IDF_TARGET)
if(IDF_TARGET STREQUAL "esp8684")
if(IDF_TARGET STREQUAL "esp32c2")
# TODO : IDF-3906
return()
endif()

4
components/esp_pm/include/esp8684/pm.h → components/esp_pm/include/esp32c2/pm.h
View File

@ -16,7 +16,7 @@ extern "C" {
/**
* @brief Power management config for ESP8684
* @brief Power management config for ESP32-C2
*
* Pass a pointer to this structure as an argument to esp_pm_configure function.
*/
@ -24,7 +24,7 @@ typedef struct {
int max_freq_mhz; /*!< Maximum CPU frequency, in MHz */
int min_freq_mhz; /*!< Minimum CPU frequency to use when no locks are taken, in MHz */
bool light_sleep_enable; /*!< Enter light sleep when no locks are taken */
} esp_pm_config_esp8684_t;
} esp_pm_config_esp32c2_t;
#ifdef __cplusplus

6
components/esp_pm/include/esp_pm.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -19,8 +19,8 @@
#include "esp32c3/pm.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/pm.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/pm.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/pm.h"
#endif
#ifdef __cplusplus

22
components/esp_pm/pm_impl.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -52,8 +52,8 @@
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/pm.h"
#include "driver/gpio.h"
#elif CONFIG_IDF_TARGET_ESP8684
#include "esp8684/pm.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/pm.h"
#include "driver/gpio.h"
#endif
@ -94,9 +94,9 @@
#elif CONFIG_IDF_TARGET_ESP32H2
#define REF_CLK_DIV_MIN 2
#define DEFAULT_CPU_FREQ CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ
#elif CONFIG_IDF_TARGET_ESP8684
#elif CONFIG_IDF_TARGET_ESP32C2
#define REF_CLK_DIV_MIN 2
#define DEFAULT_CPU_FREQ CONFIG_ESP8684_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_CPU_FREQ CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ
#endif
#ifdef CONFIG_PM_PROFILING
@ -231,8 +231,8 @@ esp_err_t esp_pm_configure(const void* vconfig)
const esp_pm_config_esp32c3_t* config = (const esp_pm_config_esp32c3_t*) vconfig;
#elif CONFIG_IDF_TARGET_ESP32H2
const esp_pm_config_esp32h2_t* config = (const esp_pm_config_esp32h2_t*) vconfig;
#elif CONFIG_IDF_TARGET_ESP8684
const esp_pm_config_esp8684_t* config = (const esp_pm_config_esp8684_t*) vconfig;
#elif CONFIG_IDF_TARGET_ESP32C2
const esp_pm_config_esp32c2_t* config = (const esp_pm_config_esp32c2_t*) vconfig;
#endif
#ifndef CONFIG_FREERTOS_USE_TICKLESS_IDLE
@ -341,8 +341,8 @@ esp_err_t esp_pm_get_configuration(void* vconfig)
esp_pm_config_esp32c3_t* config = (esp_pm_config_esp32c3_t*) vconfig;
#elif CONFIG_IDF_TARGET_ESP32H2
esp_pm_config_esp32h2_t* config = (esp_pm_config_esp32h2_t*) vconfig;
#elif CONFIG_IDF_TARGET_ESP8684
esp_pm_config_esp8684_t* config = (esp_pm_config_esp8684_t*) vconfig;
#elif CONFIG_IDF_TARGET_ESP32C2
esp_pm_config_esp32c2_t* config = (esp_pm_config_esp32c2_t*) vconfig;
#endif
portENTER_CRITICAL(&s_switch_lock);
@ -779,8 +779,8 @@ void esp_pm_impl_init(void)
esp_pm_config_esp32c3_t cfg = {
#elif CONFIG_IDF_TARGET_ESP32H2
esp_pm_config_esp32h2_t cfg = {
#elif CONFIG_IDF_TARGET_ESP8684
esp_pm_config_esp8684_t cfg = {
#elif CONFIG_IDF_TARGET_ESP32C2
esp_pm_config_esp32c2_t cfg = {
#endif
.max_freq_mhz = DEFAULT_CPU_FREQ,
.min_freq_mhz = xtal_freq,

2
components/esp_pm/pm_trace.c
View File

@ -15,7 +15,7 @@
* Feel free to change when debugging.
*/
static const int DRAM_ATTR s_trace_io[] = {
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP8684)
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32C2)
BIT(4), BIT(5), // ESP_PM_TRACE_IDLE
BIT(16), BIT(17), // ESP_PM_TRACE_TICK
BIT(18), BIT(18), // ESP_PM_TRACE_FREQ_SWITCH

4
components/esp_rom/CMakeLists.txt
View File

@ -82,7 +82,7 @@ if(BOOTLOADER_BUILD)
elseif(target STREQUAL "esp32h2")
rom_linker_script("newlib")
elseif(target STREQUAL "esp8684")
elseif(target STREQUAL "esp32c2")
rom_linker_script("newlib")
rom_linker_script("mbedtls")
endif()
@ -181,7 +181,7 @@ else() # Regular app build
rom_linker_script("newlib-nano")
endif()
elseif(target STREQUAL "esp8684")
elseif(target STREQUAL "esp32c2")
rom_linker_script("newlib")
rom_linker_script("version")
rom_linker_script("mbedtls")

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