Commit Graph

797 Commits

Author SHA1 Message Date
morris
7faf1bee73 gptimer: add test with -O0 2022-08-02 22:53:36 +08:00
Wan Lei
1265a2db9d Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master'
Fix check_public_headers violations for soc component

Closes IDF-5397

See merge request espressif/esp-idf!19158
2022-08-01 10:14:04 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wanlei
bb5a95f1aa soc: fix register header files not self-contain 2022-07-29 11:18:06 +08:00
morris
ef02fb63dd Merge branch 'bugfix/fix_wrong_mmu_end_addr_check' into 'master'
mmu: fix wrong mmu end check in mmu_ll.h

See merge request espressif/esp-idf!19257
2022-07-28 12:00:35 +08:00
Armando
f325ad2211 mmu: fix wrong mmu end check
In mmu code, we follow the rule that the `end` address shouldn't be
touched. This commit fix wrong end address check in mmu_ll.h
2022-07-27 10:22:09 +00:00
laokaiyao
77a5c209d9 dac_ll: sync PR changes to esp32s2 2022-07-27 14:45:48 +08:00
Florian Loitsch
2f307b8b65 Feedback. 2022-07-27 14:45:48 +08:00
Florian Loitsch
3793e90790 Fix offset for cosine wave function generator 2022-07-27 14:45:48 +08:00
morris
783e1781bd esp_rom: patch systimer driver for esp32c2 2022-07-25 16:08:52 +08:00
morris
d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
morris
c4e84751a5 driver: fix public header exceptions for driver 2022-07-22 00:12:36 +00:00
morris
454d658309 rgb_lcd: workaround pclk polarity bug by setting mo>=2 2022-07-21 13:06:09 +00:00
laokaiyao
edee3ee3cd i2s: add slot sequence table
Closes: https://github.com/espressif/esp-idf/issues/9208

When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
2022-07-21 15:52:39 +08:00
laokaiyao
90866e99fb i2s: add basic examples for STD/TDM/PDM mode 2022-07-21 15:52:39 +08:00
morris
4154eaec93 sdm: clean up soc/hal/ll code 2022-07-20 14:59:50 +08:00
Song Ruo Jing
4734b1433b Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master'
gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report

Closes IDF-4901

See merge request espressif/esp-idf!18805
2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master'
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
songruojing
0c4b9a0101 gpio: Fix HAL bad bit shift operation on gpio_num_t reported from coverity
All gpio hal and ll functions input arguments gpio_num_t are changed to uint32_t type.
Validation of gpio num should be guaranteed from the driver layer.
2022-07-15 16:51:25 +08:00
Jiang Jiang Jian
b610b47a83 Merge branch 'feature/esp32s3_memprot_additional_improvements' into 'master'
[System/Security] Memprot after-merge improvements (v5.0)

Closes IDF-5263 and IDF-5208

See merge request espressif/esp-idf!18893
2022-07-13 15:48:20 +08:00
Cao Sen Miao
683d92bc88 flash_encryption: Fix issue that flash encryption cannot work when 8-line psram enabled,
Closes https://github.com/espressif/esp-idf/issues/9244,
                  Closes https://github.com/espressif/esp-idf/issues/9287
2022-07-12 16:08:57 +08:00
Song Ruo Jing
ea97cc93ea Merge branch 'feature/c2_systimer_26mhz' into 'master'
esp32c2: 26 MHz XTAL support: Kconfig option, systimer support

Closes IDF-5412 and IDF-5413

See merge request espressif/esp-idf!18835
2022-07-11 16:17:25 +08:00
Marius Vikhammer
6cc871d793 Merge branch 'feature/ulp_riscv_adc' into 'master'
ulp-riscv: add support for using ADC as well as an example show-casing it.

Closes IDFGH-7564 and IDF-1714

See merge request espressif/esp-idf!18767
2022-07-11 12:30:31 +08:00
songruojing
996fb0cce8 G0: hal/regi2c_ctrl.h now defines all REGI2C macros to pass g0_components build test 2022-07-11 12:24:58 +08:00
wuzhenghui
a9c8065030 Kconfig: Update dependencies to avoid invalid configurations
1. Since the baud rate in the ROM cannot be changed,
   set the default baud rate of the 26Mhz version
   of esp32c2 to 74800
2. Since the systimer configuration of the 26Mhz
   version requires a non-integer systimer frequency
   configuration, and this feature is not supported
   in the current ROM, this option is disabled for
   the 26Mhz version esp32c2
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
2e37218ce5 soc, hal: remove XTAL_CLK_FREQ
XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Marius Vikhammer
e8b5096f52 ulp-riscv: add support for using ADC as well as an example show-casing it. 2022-07-11 09:31:22 +08:00
Martin Vychodil
0c87ae2a91 System/Security: Memprot API unified (ESP32S3)
Added missing features and improvements
2022-07-09 22:57:51 +02:00
Jiang Jiang Jian
a7bf3af687 Merge branch 'bugfix/reset_ble_hw_on_inititalization' into 'master'
component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3

Closes BT-2402

See merge request espressif/esp-idf!18831
2022-07-08 16:21:41 +08:00
Michael (XIAO Xufeng)
a58362a429 Merge branch 'feature/efuse_rev_major_minor' into 'master'
efuse: Adds major and minor versions

See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
support c2 26M/32M xtal for bbpll

Closes IDF-5485

See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
morris
a92cce9861 Merge branch 'bugfix/calib_i2c_clk' into 'master'
I2C: Make I2C clock frequency accurate

Closes IDF-5363

See merge request espressif/esp-idf!18686
2022-07-06 20:52:31 +08:00
wangmengyang
1d55f12c2d component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
2022-07-06 16:23:48 +08:00
Cao Sen Miao
e218723e0e I2C: Make I2C clock frequency accurate 2022-07-06 11:58:08 +08:00
GengYuchao
d145c337e0 Enable rpa_moudle reset function 2022-07-05 20:50:31 +08:00
cje
e16165f263 support c2 26M/32M xtal for bbpll 2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
morris
7863c1bc45 Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
Bugfix/fix rtc freq err for h2 beta1

See merge request espressif/esp-idf!18682
2022-07-04 16:46:17 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
GengYuchao
10fd1daa10 Add ETM clk gate defines for h2 2022-06-30 17:02:00 +08:00
Armando (Dou Yiwen)
e13d7f8351 Merge branch 'bugfix/s2_ap64_psram_crash_issue' into 'master'
psram: fix esp32s2 module with APS6404 PSRAM crash issue

Closes IDF-5361

See merge request espressif/esp-idf!18699
2022-06-29 11:19:17 +08:00
Armando
c51c1a8651 mmu: fix wrong mmu entry id issue 2022-06-28 14:17:44 +08:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00
morris
7fd9a91034 dma: move from driver to hw_support 2022-06-28 14:17:12 +08:00
Mahavir Jain
dd24639215 Merge branch 'esp32h2/enable_ecc_accelerator' into 'master'
esp32h2: Enable ECC accelerator

Closes IDF-3397

See merge request espressif/esp-idf!18647
2022-06-23 20:06:26 +08:00
Cao Sen Miao
2c0651a671 Add regi2c enable/disable reference count 2022-06-23 15:36:44 +08:00
Cao Sen Miao
3a820462ac temperature_sensor: Add temperature sensor support for ESP32-C2 2022-06-23 15:36:43 +08:00
Sachin Parekh
6cfc9c365f esp32h2: Enable ECC accelerator 2022-06-23 12:59:13 +05:30
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Martin Vychodil
339fcbf14d System/Security: Memprot API unified (ESP32S3)
Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
Armando (Dou Yiwen)
0b80546f8e Merge branch 'feature/new_esp_psram_component' into 'master'
esp_psram: new esp psram component

Closes IDF-4318, IDF-4382, IDF-4841, and IDFGH-7192

See merge request espressif/esp-idf!18050
2022-06-15 19:16:56 +08:00
laokaiyao
28b8fc6a7e i2s: update documents for driver-NG 2022-06-15 10:30:04 +08:00
laokaiyao
0fe3bb8ab7 i2s: update examples and unit-tests 2022-06-15 10:29:06 +08:00
laokaiyao
621d0aa942 i2s: Introduced a brand new driver 2022-06-15 10:29:06 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master'
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
morris
919344547b Merge branch 'bugfix/rmt_register_file_s3' into 'master'
rmt: update register file after fixing csv of RMT peripheral (esp32s2/s3)

Closes IDFGH-7537

See merge request espressif/esp-idf!18392
2022-06-14 18:24:28 +08:00
Michael (XIAO Xufeng)
7b8e5888ca Merge branch 'refactor/add_clk_tree_ll' into 'master'
clk_tree: Stage3 - HAL for clock subsystem

Closes IDF-4334

See merge request espressif/esp-idf!18270
2022-06-14 17:16:29 +08:00
Jiang Jiang Jian
3cb6abee3c Merge branch 'bugfix/hal_assert_spelling' into 'master'
HAL: fix kconfig HAL_ASSERTION typo

See merge request espressif/esp-idf!18482
2022-06-14 16:24:25 +08:00
Jiang Jiang Jian
4e33239474 Merge branch 'feature/remove_back_compatible_with_s3beta_rom' into 'master'
spi_flash: remove back-compatible with caller function of S3Beta ROM

See merge request espressif/esp-idf!18492
2022-06-14 16:22:08 +08:00
Armando
38e5043ae8 esp_psram: new psram component 2022-06-14 15:44:27 +08:00
Omar Chebib
2fd784c97a G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h" 2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
a8a3756b38 hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:

- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead

Also updated soc_hal.h as follows:

- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.

This commit also updates the XCHAL_ERRATUM_572 workaround by

- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
2022-06-14 14:40:03 +08:00
Darian Leung
149872131a hal: Move dedicated GPIO LL and HAL
This commit moves the dedicated GPIO LL and HAL functions from
cpu_ll.h to dedic_gpio_cpu_ll.h.

- cpu_ll_enable_cycle_count() has also been removed due to lack of feasible usage scenarios
2022-06-14 14:38:29 +08:00
jiangguangming
0e8401e9b0 spi_flash: remove back-compatible with caller function of S3Beta ROM 2022-06-14 11:25:30 +08:00
morris
b2bb8fd3c4 rgb_lcd: support update pclk at runtime 2022-06-14 02:20:47 +00:00
morris
843279d287 rgb_lcd: support fractional clock divisor 2022-06-14 02:20:47 +00:00
songruojing
6f6251f369 hal: Limit the HAL_ASSERTION_LEVEL in bootloader to be no larger than 1 (i.e. silent) 2022-06-13 17:47:51 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
Marius Vikhammer
e18f381905 HAL: fix kconfig HAL_ASSERTION typo 2022-06-13 16:19:28 +08:00
morris
4094f13fd3 rmt: fix error in rmt register file
Closes https://github.com/espressif/esp-idf/issues/9100
2022-06-10 18:38:42 +08:00
morris
5daa73d236 Merge branch 'refactor/mcpwm_hal_driver_doc' into 'master'
mcpwm: don't support disable carrier one-shot pulse

Closes IDFGH-7406

See merge request espressif/esp-idf!18295
2022-06-10 10:28:59 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
Michael (XIAO Xufeng)
773715d900 Merge branch 'feature/support_refresh_brownout_v1' into 'master'
spi_flash: send reset when brownout detected on XMC flash

Closes IDF-3882

See merge request espressif/esp-idf!16873
2022-06-06 16:27:58 +08:00
Geng Yuchao
c1505d045c Add periph_module needed for BT 2022-06-03 21:47:58 +08:00
morris
f7ff7ac4d0 mcpwm: clean up hal driver and add doc 2022-06-02 15:01:18 +08:00
Michael (XIAO Xufeng)
6a8aed12ee ci: partially enable ut tests for esp32c2
Disabled test cases are tracked in:

 IDF-4465, IDF-5045, IDF-5057, IDF-5058, IDF-5059, IDF-5060, IDF-5061, IDF-5131

- test_fatfs: IDF-5136

- test_pm: IDF-5053

- test_cache_mmu: IDF-5138

- test_partitions: IDF-5137

- test_vfs: IDF-5139

- test_freertos: IDF-5140

- test_wpa_supplicant: IDF-5046

- test_mbedtls: IDF-5141

- test_pthread: IDF-5142

- test_protocomm: IDF-5143

- test_lightsleep: IDF-5053

- test_taskwdt: IDF-5055

- test_tcp_transport: IDF-5144

- test_app_update: IDF-5145

- test_timer: IDF-5052

- test_spi: IDF-5146

- test_rtc_clk: IDF-5060

- test_heap: IDF-5167

ci: fixed issues for tests of libgcc, ets_timer, newlib

test_pm: support on C2
2022-06-02 14:23:35 +08:00
Cao Sen Miao
6a2d3509dc spi_flash: Making XMC flash works more stable when brownout detected 2022-06-02 10:38:55 +08:00
Konstantin Kondrashov
b824f68b35 Merge branch 'feature/move_dport_workaround_to_g0' into 'master'
dport_access: Move DPORT workaround to G0

Closes IDF-2177

See merge request espressif/esp-idf!17961
2022-06-01 12:11:12 +08:00
Konstantin Kondrashov
f1d3332eea Merge branch 'bugfix/c3_efuse_fail_bits' into 'master'
soc: Fix efuse fail bits

See merge request espressif/esp-idf!18321
2022-05-31 21:11:30 +08:00
KonstantinKondrashov
c5a4ab39a7 soc: Fix description of efuse fail bits 2022-05-31 11:21:24 +00:00
KonstantinKondrashov
0b22839925 hal(ecp32c2): Adds spi_flash_encrypted_ll 2022-05-31 11:12:21 +00:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Anton Maklakov
d1aa08eefb Merge branch 'bugfix/periph-warnings' into 'master'
peripherals: minor warning fixes

See merge request espressif/esp-idf!18312
2022-05-31 13:32:55 +08:00
Anton Maklakov
c82d8532d3 hal: explicit initialization 2022-05-30 12:57:52 +07:00
morris
4352c39e3e Merge branch 'feature/cache_c2_support' into 'master'
cache: access error & illegal error ll functions

Closes IDF-3820

See merge request espressif/esp-idf!18203
2022-05-30 11:40:11 +08:00
Jiang Jiang Jian
f3922f1b7f Merge branch 'feature/flash_mmap_refactor' into 'master'
flash mmap: abstract R/W of MMU table instead of reg access

See merge request espressif/esp-idf!16882
2022-05-29 13:56:37 +08:00
Darian
f3d06ad78d Merge branch 'bugfix/fix_SysTickIsrHandler_casting' into 'master'
HAL: Fix systimer counter value bit field

Closes IDF-5132

See merge request espressif/esp-idf!18252
2022-05-28 18:31:03 +08:00
Marius Vikhammer
9177e9fb37 Merge branch 'bugfix/cpu_cycle_count_not_iram' into 'master'
HAL: place cpu_ll_get_cycle_count in IRAM

Closes IDFGH-7431

See merge request espressif/esp-idf!18260
2022-05-27 10:40:50 +08:00
Zim Kalinowski
2c9cd8e307 Merge branch 'feature/remove_target_cmake' into 'master'
build-system: remove target component

Closes IDF-3091 and IDF-3581

See merge request espressif/esp-idf!18131
2022-05-27 06:55:25 +08:00
Darian Leung
c45784b8c4 hal: Fix systimer counter value bit field
This commit fixes the systimer_counter_value_t by adding a resreved field so that the
type fills 64-bits.

Without the reserved field, when compiling with -O0 optimization, the unoccupied high
bits would not be initalized by the compiler, leading to systimer_hal_get_counter_value()
returning a garbage value.
2022-05-26 12:56:25 +00:00
Marius Vikhammer
415ab25a49 HAL: place cpu_ll_get_cycle_count in IRAM
Closes https://github.com/espressif/esp-idf/issues/9008
2022-05-26 14:42:41 +08:00
Song Ruo Jing
cf32e49aeb Merge branch 'refactor/cleanup_rtc_h' into 'master'
clk_tree: Prework2 of introducing clock subsystem control

Closes IDF-4934

See merge request espressif/esp-idf!17861
2022-05-26 09:16:47 +08:00
morris
7642be45ef Merge branch 'bugfix/c2_efuse_fix_error_reg' into 'master'
efuse_hal(esp32c2): Fix error bits for BLOCK0

See merge request espressif/esp-idf!18219
2022-05-25 04:24:55 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
morris
64604dcfe0 Merge branch 'bugfix/s3_spi_pre' into 'master'
hal: Fix max value for clkdiv_pre in ESP32-S3 SPI master clock config

See merge request espressif/esp-idf!18213
2022-05-24 16:18:48 +08:00