esp-idf/components/soc
2024-04-01 07:09:11 +05:30
..
esp32 Merge branch 'fix/unused_interrupts' into 'master' 2024-03-28 11:27:20 +08:00
esp32c2 fix(uart): correct C2 UART_BITRATE_MAX value 2024-03-22 16:24:24 +08:00
esp32c3 feat(uhci): add reset and clock control functions 2024-03-29 10:41:17 +08:00
esp32c5 feat: enabled aes and sha support for esp32c5 2024-03-26 14:52:06 +05:30
esp32c6 change(hal): control PAU bus clock by hal layer 2024-03-29 00:36:46 +08:00
esp32c61 change(hal): control PAU bus clock by hal layer 2024-03-29 00:36:46 +08:00
esp32h2 change(hal): control PAU bus clock by hal layer 2024-03-29 00:36:46 +08:00
esp32p4 feat(esp_hw_support): brought up RNG on ESP32-P4 2024-04-01 07:09:11 +05:30
esp32s2 fix(esp_hw_support): clear reserved interrupts that are not applicable for each target 2024-03-27 16:21:25 +08:00
esp32s3 feat(uhci): add reset and clock control functions 2024-03-29 10:41:17 +08:00
include/soc feat(esp_hw_support): support esp32p4 sleep peripheral retention 2024-03-28 19:18:25 +08:00
linux/include/soc feat(esp32c5): support esp32c5 g0 components 2023-12-08 15:12:24 +08:00
CMakeLists.txt refactor(esp32c5): change beta3 path in soc 2024-03-01 10:16:14 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Kconfig mmu: support configurable mmu page size 2023-03-04 02:48:40 +00:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware