Michael (XIAO Xufeng)
14944b181e
Merge branch 'fix/soc_caps_spi_dummy_output_esp32' into 'master'
...
soc_caps.h: remove spi cap that is defined to 0
See merge request espressif/esp-idf!11203
2020-11-16 10:39:27 +08:00
Michael (XIAO Xufeng)
099fca515d
Merge branch 'bugfix/move_crypto_caps' into 'master'
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SHA/RSA: moved all caps to soc_caps.h
Closes IDF-2300
See merge request espressif/esp-idf!11032
2020-11-13 11:06:44 +08:00
Angus Gratton
935e4b4d62
Merge branch 'feature/riscv_arch' into 'master'
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Add RISC-V support
Closes IDF-2359
See merge request espressif/esp-idf!11140
2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe
Updates for riscv support
...
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
longer signed/unsigned int).
Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Cao Sen Miao
6eee601cf6
i2c: Add supports on esp32s3
2020-11-12 11:32:45 +08:00
Michael (XIAO Xufeng)
5b6c965e99
soc_caps.h: remove spi cap that is defined to 0
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According to the caps rule, for unsupported feature we don't define anything.
Remove the define 0 that violates this rule.
2020-11-12 10:29:42 +08:00
Marius Vikhammer
488f46acf5
SHA/RSA: moved all caps to soc_caps.h
2020-11-12 02:15:46 +00:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
morris
ff976867b3
rmt: split TX and RX in LL driver
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Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
chenjianqiang
9465af0066
rmt: support esp32s3
2020-11-05 19:00:55 +08:00
morris
e4c8ec6174
timergroup: move interrupt index into peripheral description file
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1. Added timer_group_periph.c file, describing module global signals
(e.g. interrupt index)
2. Added more caps in soc_caps.h
2020-11-03 18:16:50 +08:00
Michael (XIAO Xufeng)
35faecea1d
Merge branch 'feature/support_sigma_delta_on_s3' into 'master'
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sigma_delta: add periph signal list and support esp32-s3
See merge request espressif/esp-idf!10945
2020-10-30 17:22:02 +08:00
Michael (XIAO Xufeng)
3bacf35310
esp_flash: support high capacity flash chips (32-bit address)
2020-10-29 18:20:11 +08:00
morris
17808b3ff8
sigma_delta: add periph signal list and support esp32-s3
2020-10-29 11:06:28 +08:00
Renz Bagaporo
79887fdc6c
soc: descriptive part occupy whole component
2020-10-28 07:21:29 +08:00
Renz Christian Bagaporo
1f2e2fe8af
soc: separate abstraction, description and implementation
2020-02-11 14:30:42 +05:00
Wangjialin
aaf119e930
flash(esp32s2): fix setting address field in spi user mode.
2020-02-07 16:10:51 +01:00
Ivan Grokhotkov
70752baba4
esp32s2: add brownout detector support
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1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
2020-01-23 13:44:19 +01:00
Angus Gratton
c7738f24fc
Merge branch 'bugfix/ledc_driver_enums' into 'master'
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driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum
See merge request espressif/esp-idf!7021
2020-01-10 15:34:43 +08:00
Darian Leung
a049e02d96
can: Refactor CAN to use HAL and LowLevel layers
...
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:
- Added bit field members to can_message_t as alternative
to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
2020-01-09 16:13:51 +08:00
michael
f676a3b190
driver, soc: update multichip support headers
2020-01-06 17:13:54 +08:00
Ivan Grokhotkov
52f8aa2adb
Merge branch 'feature/heap_non_os_build' into 'master'
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heap: make compatible with non-OS builds, remove target dependence
Closes IDF-1236
See merge request espressif/esp-idf!7051
2020-01-03 17:12:51 +08:00
Ivan Grokhotkov
d9534b3d6a
soc: fix backtraces containing ROM functions
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esp_ptr_executable would return false for pointers to ROM, which would
interrupt the backtrace. This makes ROM ranges recognized as
executable.
2020-01-02 18:42:46 +01:00
Ivan Grokhotkov
4bbfa6e494
Merge branch 'feature/soc_ledc_caps' into 'master'
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soc: add ledc_caps.h, replace target-based ifdefs with caps-based
See merge request espressif/esp-idf!6858
2019-12-30 18:47:11 +08:00
Ivan Grokhotkov
e4d45608d3
soc: add ledc_caps.h, replace target-based ifdefs with caps-based
2019-12-28 20:33:21 +00:00
Ivan Grokhotkov
3285ed116d
heap: make compatible with non-OS builds, remove target dependence
2019-12-27 12:40:06 +01:00
morris
7baf7ce273
ethernet: optimise tx and rx
2019-12-24 11:18:31 +08:00
michael
11fa11000f
spi: re-enable the unit tests for esp32s2beta
2019-12-23 10:22:59 +08:00
Mahavir Jain
e8db1c4da0
Merge branch 'feature/enable_i2s_tests_on_esp32s2beta' into 'master'
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Enable i2s and freertos test/s on esp32s2beta
See merge request espressif/esp-idf!6790
2019-12-18 17:51:54 +08:00
kewal shah
eec8212237
add simplified API to set UART threshold values for RX FIFO full and TX FIFO empty
2019-12-16 20:26:04 +00:00
Angus Gratton
435dd546cc
driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum
...
ledc_types.h includes two similar enums, ledc_clk_src_t & ledc_clk_cfg_t. Latter was added in
ESP-IDF v4.0.
The two enums do different things but there are two similar names: LEDC_REF_TICK / LEDC_USE_REF_TICK
and LEDC_APB_CLK / LEDC_USE_APB_CLK.
Because C will accept any enum or integer value for an enum argument, there's no easy way to check
the correct enum is passed without using static analysis.
To avoid accidental errors, make the numeric values for the two similarly named enums the same.,
Noticed when looking into https://github.com/espressif/esp-idf/issues/4476
2019-12-16 19:43:11 +11:00
Mahavir Jain
8b05cf41ad
i2s: enable tests for esp32s2beta
2019-12-16 11:53:33 +05:30
Wang Jia Lin
f5e60524ac
Merge branch 'bugfix/fix_i2c_driver_breakingchange_issue' into 'master'
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bugfix(i2c): fix I2C driver breaking change issue
See merge request espressif/esp-idf!6809
2019-12-06 16:50:16 +08:00
houwenxiang
aac935ec81
bugfix(i2c): fix I2C driver breaking change issue.
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1. Fixed I2C driver breaking change issue.
2. Add I2C UT test case.
2019-12-04 15:51:36 +08:00
houwenxiang
e4230d11ca
bugfix(UART): fix uart driver spinlock misused bug
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1. fix uart driver spinlock misused bug
2. add uart driver ut test case
3. undo the change in light_sleep_example_main.c
2019-12-03 16:06:31 +08:00
Wang Jia Lin
1ffcb54444
Merge branch 'bugfix/fix_esp32-s2_rtc_io_issue' into 'master'
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bugfix(gpio): fix esp32 s2 rtc io issue and gpio testcase issues
See merge request espressif/esp-idf!6832
2019-12-03 11:17:41 +08:00
Renz Christian Bagaporo
e6ad330018
ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation
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Otherwise IRAM usage is too high in this example.
2019-11-28 09:20:00 +08:00
Fu Zhi Bo
3a468a1ffd
Refactor the touch sensor driver
2019-11-27 20:08:44 +08:00
xiongyu
af4c455417
bugfix(gpio):fix esp32 s2 rtc io issue
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* Modify the function implementation of ESP32-S2 RTC GPIO
On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register.
On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
* Add ESP32-S2 support of unit test
* Modify the pull-up test of unit test
* Modify the interrupt test of unit test
* Modify input and output mode test of unit test
2019-11-27 17:18:20 +08:00
Angus Gratton
91b7a7beaf
Merge branch 'bugfix/timer_intr_status_get' into 'master'
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bugfix(timer): fix get intr status function
See merge request espressif/esp-idf!6807
2019-11-27 09:13:16 +08:00
Angus Gratton
64c8b640a1
Merge branch 'feature/log_component_noos' into 'master'
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log: make compatible with non-OS builds
See merge request espressif/esp-idf!6787
2019-11-27 08:34:22 +08:00
chenjianqiang
bcfe684951
bugfix(timer): add a macro to control making the XTAL related functions
2019-11-26 12:39:46 +00:00
chenjianqiang
856d9f7d89
bugfix(timer): recover get raw interrupt status function
2019-11-26 12:39:46 +00:00
houwenxiang
f27ae9b0e2
feature: Add uart hal support.
2019-11-26 20:01:50 +08:00
Angus Gratton
f2a1a6105a
Merge branch 'feat/mcpwm_hal'
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Manual merge of !6626
2019-11-25 17:18:48 +11:00
Angus Gratton
6dd36fd571
Merge branch 'refactor/hal_gpio_driver'
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Manual merge of !5597
2019-11-25 10:49:40 +11:00
Angus Gratton
f34edba8f3
Merge branch 'feature/adc_driver_hal_support'
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Manual merge of !6044
2019-11-25 10:22:06 +11:00
michael
538540ce21
mcpwm: add HAL layer support
...
Also improved the unit tests a bit.
2019-11-25 00:36:30 +08:00
xiongyu
a3b79e9202
refactor(gpio): add hal gpio driver
2019-11-22 17:24:53 +08:00
fuzhibo
f49b192a5e
refactor the adc driver
2019-11-22 15:42:16 +08:00
Mahavir Jain
25c0752682
i2s: fix regression in retrieval of chip revision causing apll test to fail
2019-11-22 11:46:38 +05:30
fuzhibo
03ac1aaafd
dac: refactor driver add hal
2019-11-22 11:44:46 +08:00
Ivan Grokhotkov
951ed739f7
soc/cpu: add non-xtensa-specific replacement of xthal_get_ccount
2019-11-21 19:22:35 +01:00
houwenxiang
28286183d1
feature(I2C): Add i2c hal support.
2019-11-21 20:34:07 +08:00
chenjianqiang
857dec108d
feat(ledc): refactor ledc driver
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1. add hal and low-level layer for ledc driver
2. support esp32s2beta ledc
2019-11-21 16:25:22 +08:00
chenjianqiang
9f9da9ec96
feat(timer): refator timer group driver
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1. add hal and low-level layer for timer group
2. add callback functions to handle interrupt
3. add timer deinit function
4. add timer spinlock take function
2019-11-21 14:14:19 +08:00
xiongyu
e62b831867
refactor(sigmadelta): add hal sigmadelta driver
2019-11-21 11:53:07 +08:00
fuzhibo
0c2bf7c8bc
rtcio: add hal for driver
2019-11-21 10:40:49 +08:00
Angus Gratton
b30b0e59fa
Merge branch 'feature/add_rmt_hal' into 'master'
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rmt: add hal layer and new examples
Closes IDF-841, IDF-844, and IDF-857
See merge request espressif/esp-idf!5649
2019-11-21 09:53:54 +08:00
morris
8fd8695ea1
rmt: add HAL layer
2019-11-20 10:54:21 +08:00
xiongyu
8c76a3c10d
refactor(i2s): add hal i2s driver
2019-11-19 22:19:19 +08:00
xiongyu
b1a72866ca
refactor(pcnt): add hal pcnt driver
2019-11-18 14:35:46 +08:00
Angus Gratton
8675a818f9
Merge branch 'master' into feature/esp32s2beta_merge
2019-10-22 13:51:49 +11:00
Ivan Grokhotkov
c7d8ef52ca
Merge branch 'fix/esp_flash_no_qe' into 'master'
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esp_flash: fix the QE write issue in high freq, and support UT for external chips
Closes IDF-888
See merge request espressif/esp-idf!5736
2019-10-20 13:59:30 +08:00
Angus Gratton
ae21d669b9
Merge branch 'master' into feature/esp32s2beta_merge
2019-10-17 18:22:08 +11:00
Darian
820fd6447d
can: Add support for lower bit rates
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This commit adds support for lower bit rates in the CAN Driver for
ESP32 Rev 2 or later chips.
2019-10-17 12:33:17 +08:00
Angus Gratton
496ede9bcd
Merge branch 'master' into feature/esp32s2beta_merge
2019-10-15 14:59:27 +11:00
Michael (XIAO Xufeng)
571864e8ae
esp_flash: fix set qe bit and write command issues
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There used to be dummy phase before out phase in common command
transactions. This corrupts the data.
The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.
This commit:
1. Cancel the dummy phase
2. Set and clear the QE bit according to chip settings, allowing tests
for QE bits. However for some chips (Winbond for example), it's not
forced to clear the QE bit if not able to.
3. Also refactor to allow chip_generic and other chips to share the same
code to read and write qe bit; let common command and read command share
configure_host_io_mode.
4. Rename read mode to io mode since maybe we will write data with quad
mode one day.
2019-10-14 17:25:58 +08:00
suda-morris
13c128fd31
Ethernet: optimize and bugfix
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1. simplify deallocate in esp_eth_mac_new_esp32, esp_eth_mac_new_dm9051
2. remove blocking operation in os timer callback
3. check buffer size in ethernet receive function
2019-10-11 12:15:17 +08:00
Angus Gratton
adfc06a530
Merge branch 'master' into feature/esp32s2beta_merge
2019-09-20 10:28:37 +10:00
Jack
95ec36afd4
dport: remove clock_en and reset bitname which is not suitable
2019-09-13 09:44:07 +10:00
Angus Gratton
33a186f630
soc: Remove deprecated LEDC struct register names (bit_num, div_num)
...
Deprecated since ESP-IDF V3.0
2019-09-13 09:44:07 +10:00
Angus Gratton
6195c69701
soc: remove deprecated io_mux PIN_PULLxxx_yyy macros
...
Deprecated before ESP-IDF V1.0!
2019-09-13 09:44:07 +10:00
Angus Gratton
11c1da5276
soc/pm: Remove deprecated use of rtc_cpu_freq_t enum
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Removes deprecated ways of setting/getting CPU freq, light sleep freqs.
Deprecated since ESP-IDF V3.2
2019-09-13 09:44:07 +10:00
Angus Gratton
35147119f1
Merge branch 'feature/support_ut_esp32s2beta' into 'feature/esp32s2beta'
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ci: support build and run UT for esp32s2beta
See merge request espressif/esp-idf!5702
2019-09-09 08:34:16 +08:00
Li Shuai
bd29202520
1. Fix backtrace is incomplete
...
2. Optimization code style
2019-09-05 18:40:33 +08:00
Michael (XIAO Xufeng)
43135dc348
spi: convenient LL macro
2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
05739798c3
soc: s2beta support
2019-09-04 10:53:25 +10:00
Angus Gratton
6990a7cd54
Merge branch 'master' into feature/esp32s2beta_update
2019-08-19 15:03:43 +10:00
Angus Gratton
367ecc2d60
Merge branch 'refactor/timerg_in_test' into 'master'
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timer_group: refactoring to avoid direct register access in the ISR
See merge request espressif/esp-idf!5656
2019-08-14 15:32:16 +08:00
suda-morris
f86e82cb63
efuse: update the scheme of getting chip revision
2019-08-13 10:59:02 +08:00
Michael (XIAO Xufeng)
feea477023
timer_group: add LL functions for WDT
2019-08-09 13:46:30 +08:00
Michael (XIAO Xufeng)
c02981a99b
timer_group: support interrupt LL and some utility functions in ISR
2019-08-09 13:46:30 +08:00
chenjianqiang
a97fe5615f
feat(timer): refator timer group driver (partly pick)
2019-08-09 13:46:29 +08:00
Angus Gratton
04ae56806c
Merge branch 'master' into feature/esp32s2beta_update
2019-08-08 15:26:58 +10:00
Angus Gratton
24d26fccde
Merge branch 'master' into feature/esp32s2beta_update
2019-08-08 13:44:24 +10:00
kooho
2139ca668d
Update I2S driver for esp32s2beta.
2019-08-05 16:05:16 +08:00
Anton Maklakov
afbaf74007
tools: Mass fixing of empty prototypes (for -Wstrict-prototypes)
2019-08-01 16:28:56 +07:00
chenjianqiang
91ae40e2ff
uart: multichip support
2019-07-18 15:57:00 +08:00
chenjianqiang
4cc962353c
feat(uart): update uart driver for esp32s2beta
2019-07-18 15:57:00 +08:00
boarchuz
b0168310db
Typo correction
...
Merges https://github.com/espressif/esp-idf/pull/3604
2019-07-02 17:49:49 +08:00
Ivan Grokhotkov
d7d91225d3
Merge branch 'feature/refactor_etherent_driver' into 'master'
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add esp_eth component
Closes IDF-324, IDF-637, and IDFGH-1139
See merge request idf/esp-idf!5111
2019-06-28 03:44:44 +08:00
Michael (XIAO Xufeng)
d6bd24ca67
esp_flash: add initialization interface for SPI devices
2019-06-27 13:27:27 +08:00
suda-morris
90c4827bd2
add esp_eth component
2019-06-26 10:19:23 +08:00
Michael (XIAO Xufeng)
17378fd4c2
spi: support new chip esp32s2beta
2019-06-23 12:17:27 +08:00
Michael (XIAO Xufeng)
9b13a04abf
spi: multichip support
...
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.
(MINOR CHANGE)
2019-06-22 19:08:47 +08:00
Angus Gratton
bd9590502c
Merge branch 'bugfix/spi_flash_remove_include_chain_in_host_drv' into 'master'
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esp_flash: support C++ and improve the document
See merge request idf/esp-idf!5287
2019-06-21 13:12:09 +08:00
Angus Gratton
126b687c75
Merge branch 'refactor/vfs_uart_multichip_support' into 'master'
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vfs_uart & uart: add multichip support
See merge request idf/esp-idf!5298
2019-06-20 18:31:24 +08:00
chenjianqiang
cf2ba210ef
uart: multichip support
2019-06-20 11:32:22 +08:00
Michael (XIAO Xufeng)
caf121e4b6
esp_flash: break the inappropriate include chain in spi_flash_host_drv.h
2019-06-20 10:55:12 +08:00