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Code Issues Actions 3 Packages Projects Releases Wiki Activity

i2s: fix regression in retrieval of chip revision causing apll test to fail

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This commit is contained in:
Mahavir Jain 2019-11-21 18:40:46 +05:30
parent a8d3e3ab4a
commit 25c0752682
5 changed files with 11 additions and 39 deletions
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1
components/driver/CMakeLists.txt
View File

@ -40,6 +40,7 @@ endif()
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS ${includes}
PRIV_INCLUDE_DIRS "include/driver"
PRIV_REQUIRES efuse
REQUIRES esp_ringbuf soc) #cannot totally hide soc headers, since there are a lot arguments in the driver are chip-dependent
# uses C11 atomic feature

11
components/driver/i2s.c
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@ -31,6 +31,7 @@
#include "esp_err.h"
#include "esp_log.h"
#include "esp_pm.h"
#include "esp_efuse.h"
static const char* I2S_TAG = "I2S";
@ -180,12 +181,14 @@ static esp_err_t i2s_isr_register(i2s_port_t i2s_num, int intr_alloc_flags, void
static float i2s_apll_get_fi2s(int bits_per_sample, int sdm0, int sdm1, int sdm2, int odir)
{
int f_xtal = (int)rtc_clk_xtal_freq_get() * 1000000;
uint32_t rev;
i2s_hal_get_rev(&(p_i2s_obj[0]->hal), &rev); // I2S hardware instance address will not be used
if (rev) {
#if CONFIG_IDF_TARGET_ESP32
/* ESP32 rev0 silicon issue for APLL range/accuracy, please see ESP32 ECO document for more information on this */
if (esp_efuse_get_chip_ver() == 0) {
sdm0 = 0;
sdm1 = 0;
}
#endif
float fout = f_xtal * (sdm2 + sdm1 / 256.0f + sdm0 / 65536.0f + 4);
if (fout < APLL_MIN_FREQ || fout > APLL_MAX_FREQ) {
return APLL_MAX_FREQ;
@ -1149,4 +1152,4 @@ esp_err_t i2s_read(i2s_port_t i2s_num, void *dest, size_t size, size_t *bytes_re
#endif
xSemaphoreGive(p_i2s_obj[i2s_num]->rx->mux);
return ESP_OK;
}
}

15
components/soc/esp32/include/hal/i2s_ll.h
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@ -246,19 +246,6 @@ static inline void i2s_ll_enable_dma(i2s_dev_t *hw)
hw->lc_conf.val = lc_conf.val;
}
/**
* @brief Get I2S revision
*
* @param hw Peripheral I2S hardware instance address.
* @param val value to get revision
*/
static inline void i2s_ll_get_rev(i2s_dev_t *hw, uint32_t *val)
{
if (GET_PERI_REG_BITS2(EFUSE_BLK0_RDATA3_REG, 1, 15) == 0) {
*val = 1;
}
}
/**
* @brief Get I2S interrupt status
*
@ -834,4 +821,4 @@ static inline void i2s_ll_set_sig_loopback(i2s_dev_t *hw, uint32_t val)
#ifdef __cplusplus
}
#endif
#endif

13
components/soc/esp32s2beta/include/hal/i2s_ll.h
View File

@ -243,17 +243,6 @@ static inline void i2s_ll_enable_dma(i2s_dev_t *hw)
hw->lc_conf.val = lc_conf.val;
}
/**
* @brief Get I2S revision
*
* @param hw Peripheral I2S hardware instance address.
* @param val value to get revision
*/
static inline void i2s_ll_get_rev(i2s_dev_t *hw, uint32_t *val)
{
*val = 1;
}
/**
* @brief Get I2S interrupt status
*
@ -828,4 +817,4 @@ static inline void i2s_ll_set_sig_loopback(i2s_dev_t *hw, uint32_t val)
#ifdef __cplusplus
}
#endif
#endif

10
components/soc/include/hal/i2s_hal.h
View File

@ -47,14 +47,6 @@ typedef struct {
*/
void i2s_hal_reset_fifo(i2s_hal_context_t *hal);
/**
* @brief Get I2S revision
*
* @param hal Context of the HAL layer
* @param rev I2S revision
*/
#define i2s_hal_get_rev(hal, rev) i2s_ll_get_rev((hal)->dev, rev)
/**
* @brief Get I2S interrupt status
*
@ -301,4 +293,4 @@ void i2s_hal_init(i2s_hal_context_t *hal, int i2s_num);
#ifdef __cplusplus
}
#endif
#endif