Commit Graph

30 Commits

Author SHA1 Message Date
Guillaume Souchere
6dffac74e9 heap: Fix IRAM level 2 starting address
The IRAM level 2 address should start at the same address as DRAM level 2 and not DRAM level 3.
2023-01-06 09:30:36 +00:00
wuzhenghui
05e37ba214 esp32h2 memory: update esp32h2 memory layout 2023-01-06 05:30:24 +00:00
Cao Sen Miao
4713a9a7f2 ESP32H2: Introduce new chip target esp32h2, hello_world example supported 2022-12-29 12:29:14 +08:00
Cao Sen Miao
86aa4df5b5 ESP32-H2: Introduce new target for ESP32H2 2022-11-23 14:38:05 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
wuzhenghui
357490267a heap: update esp32c6 memory layout 2022-09-29 11:13:06 +08:00
wuzhenghui
4a86a6a258 esp32c6: add heap support 2022-09-26 20:32:13 +08:00
songruojing
304a8f142d esp32c6: introduce the target
Add esp32c6 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32c6`
2022-08-19 11:13:02 +08:00
wuzhenghui
65f0b1a821 bugfix: DCache data memory is dma accessible but not retention dma accessible 2022-08-03 20:07:39 +08:00
wuzhenghui
5e8ba9cea8 use enum and designated initializers in soc_memory_type define 2022-07-29 17:07:41 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wuzhenghui
65aea5d177 stack/dram is also IRAM0 accessible 2022-07-29 10:51:48 +08:00
wuzhenghui
21a4eda4d4 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-07-29 10:51:47 +08:00
FanhuaCloud
a1c04ad6fd
Add missing comma
Add missing comma when CONFIG_ESP32S3_DATA_CACHE_16KB is enabled
2022-07-27 17:12:17 +08:00
wuzhenghui
4652f77a7c esp32h2beta2:update rom layout table 2022-03-29 14:13:06 +08:00
Kevin (Lao Kaiyao)
bf8d4d55d0 Merge branch 'refactor/rename_esp8684_to_esp32c2' into 'master'
esp8684: rename esp8684 to esp32c2

Closes IDF-4530

See merge request espressif/esp-idf!16745
2022-01-19 09:08:58 +00:00
Wang Qi Xiang
41640e2e03 heap_init: Adjust the stack/DRAM region size for ESP8684 2022-01-19 08:57:54 +00:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Jing Li
a0e794b2ca heap: adjust the order of RTC memory heap caps and regions 2021-12-29 08:49:42 +00:00
Cao Sen Miao
a9f0a3531e ESP8684: add driver esp_pm heap support 2021-11-06 17:33:44 +08:00
wuzhenghui
ca1c4114bc heap: update esp32&s2&c3&h2 soc caps 2021-11-04 10:40:57 +08:00
Alexey Gerenkov
111ba5bbe6 trax: Adds ESP32-S3 support 2021-10-22 23:36:28 +03:00
Alexey Gerenkov
5911eb3f3e apptrace: Adds ESP32-S3 support 2021-10-22 23:24:00 +03:00
Li Shuai
e8188e5d8f ci: replacing old header with new SPDX header style 2021-10-20 11:36:23 +08:00
Li Shuai
44da7d27ef heap: add a new heap caps attribute for RTC fast memory 2021-10-20 11:36:22 +08:00
Li Shuai
9298db641e deep sleep: fix some rtc fast memory definition errors in esp32s3 2021-10-19 21:47:27 +08:00
gaoxiaojie
191a494e08 support dcache 64Byte and 16k 2021-09-02 02:27:40 +08:00
Michael (XIAO Xufeng)
064f12cb90 idf_size.py: fixed diram counted twice issue, and improve display
Currently static RAM usage are listed under corresponding physical
memory.

ld: fix linker script for C3 and S3
2021-08-11 17:51:50 +02:00
Omar Chebib
a7b6ec85b8 Merge branch 'feature/move_memory_layout_to_heap' into 'master'
G0: Memory layouts are now part of heap components

Closes IDF-1264

See merge request espressif/esp-idf!14028
2021-07-19 06:23:19 +00:00
Omar Chebib
c4f57af6c9 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00