Cao Sen Miao
a690a87829
spi_flash: Remove legacy spi_flash drivers
2022-07-01 11:01:34 +08:00
Marius Vikhammer
0687daf2c8
kconfig: move remaining kconfig options out of target component
...
The kconfig options are moved to the component where they are used,
mostly esp_hw_support and esp_system.
2022-05-23 17:57:45 +08:00
Michael (XIAO Xufeng)
e2ecdfc0a7
spi_flash: update def header of MXIC
2022-03-28 16:40:02 +00:00
Cao Sen Miao
12e050b38c
opi_flash: Add new 16MB opi flash (MXIC25UW12345G) support,
...
Closes https://github.com/espressif/esp-idf/issues/7996
2022-03-08 11:02:49 +08:00
Cao Sen Miao
d397464fc4
spi_flash: refactor spi_flash.h to esp_rom_spiflash.h but keep the content in spi_flash.h
2021-12-30 14:12:31 +08:00
Cao Sen Miao
b0decda1e3
bootloader: move bootloader flash support to isolate folders
2021-12-30 14:05:12 +08:00
Cao Sen Miao
3a4db97cec
spi_flash: move patch files to common rom patch folder
2021-12-30 14:05:12 +08:00
Cao Sen Miao
3dd1cfea18
spi_flash: refactor spi_flash.h to decline duplicated code
2021-12-30 14:05:12 +08:00
Cao Sen Miao
32cdfb36ec
opi_flash: Add a function pointer for opi required registers
2021-12-09 09:57:59 +08:00
Armando
c331c85318
mspi: make cpu clock source switch safe
...
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
2021-10-19 21:47:27 +08:00
Armando
2655a506c9
mspi: support auto detect octal flash vendor
2021-10-08 15:59:57 +08:00
Cao Sen Miao
6c0aebe279
esp_flash: add opi flash support in esp_flash chip driver, for MXIC
2021-09-07 14:44:40 +08:00
Armando
a3dc625da6
mspi: support 120MHz Quad Flash and PSRAM on ESP32S3
2021-08-31 16:06:44 +08:00
Armando
d325f4d557
mspi: support octal flash 120M STR mode on esp32s3
2021-08-19 10:44:30 +08:00
Armando
2b52f7f696
mspi: fix no buffer reset before each psram read issue
...
In psram timing tuning driver, we rely on psram read and write functions
defined in `spi_timing_config.c`. If we don't do buffer reset (clear to
0), the function may untouch the buffer, which will keep last time value
(since we reuse the buffer). Therefore, if the first read is expected,
but next few reads didn't modify the buffer content, we will still see
the expected data.
These functions relies on `esp_rom_opiflash_exec_cmd`.
2021-08-03 16:54:01 +08:00
Armando
3cbf202267
mspi: cancel oct flash 40m dtr, oct flash 80m str, oct psram 40m tuning
2021-08-03 16:54:01 +08:00
Armando
038b7b1fa9
mspi: update 80MHz DTR tuning algorithm and Oct PSRAM 80M DTR tuning parameters
2021-08-03 16:54:00 +08:00
Armando
0f91a01a46
mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3
2021-08-03 16:54:00 +08:00
Renz Bagaporo
844af01eb4
esp32: move spiram, himem
2021-07-16 20:14:26 +08:00
Armando
bc248278f8
spiflash: add octal spi psram support on 727
2021-06-25 19:41:57 +08:00
Marius Vikhammer
2aead8ba57
Support ESP32S3 Beta 3 target
...
Update ROM API. Port changes from bringup branch.
2021-03-18 10:24:22 +08:00
Cao Sen Miao
6fbf61493c
ota: fix ota with flash encryption
2021-03-01 14:11:55 +08:00
Cao Sen Miao
11188d2143
esp_flash:fix bug about clearing WLE automatically after actions
2020-11-12 16:44:29 +08:00
morris
61f89b97c6
bringup esp32-s3 on FPGA
2020-09-22 15:15:03 +08:00
