Commit Graph

463 Commits

Author SHA1 Message Date
Lou Tianhao
d8b1f7207a change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-15 15:04:06 +08:00
laokaiyao
2b44d62e43 feat(esp32c5): support esp32c5 g0 components 2023-12-08 15:12:24 +08:00
Armando
2c32bd209a change(fpga): added bypass rng configuration 2023-12-05 11:38:35 +08:00
Gao Xu
b9a3dd1b37 Merge branch 'bugfix/fix_adc_cali_error_after_light_sleep_wake_on_h2' into 'master'
adc: fix calibration error when waking up from light sleep on H2 and enable test

Closes IDF-8569

See merge request espressif/esp-idf!27242
2023-11-24 18:25:35 +08:00
Jakob Hasse
5f4865e838 Merge branch 'doc/soc_cap_tool' into 'master'
Doc/soc cap tool

See merge request espressif/esp-idf!27154
2023-11-23 10:47:01 +08:00
gaoxu
4f81883ccf fix(adc): restore cali registers after light sleep wake up on H2 and enable test 2023-11-20 17:38:34 +08:00
morris
72e414105d Merge branch 'contrib/github_pr_12559' into 'master'
fix(spi): correct macro REG_SPI_BASE(i) for all targets (GitHub PR)

Closes IDFGH-11421 and IDFGH-11424

See merge request espressif/esp-idf!27085
2023-11-20 15:55:41 +08:00
Mahavir Jain
9fb38d82a3 Merge branch 'fix/rng_register_prefix_discrepency_newer_targets' into 'master'
Fix: RNG register prefix discrepancy for ESP32C6 and ESP32H2

Closes DOC-5161 and DOC-5175

See merge request espressif/esp-idf!27212
2023-11-20 10:53:09 +08:00
Mahavir Jain
7505667e7d Merge branch 'bugfix/esp32h2_ecdsa_hardware_k' into 'master'
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose

Closes IDF-8508 and IDF-8506

See merge request espressif/esp-idf!26918
2023-11-17 15:10:12 +08:00
Jakob Hasse
46e44ee154 docs(soc): improved soc caps generation documentation 2023-11-17 10:43:59 +08:00
wanlei
4dcd6d7913 fix(spi): correct some signals and dummy bits docs 2023-11-17 02:39:28 +00:00
TD-er
90eada6993 fix(spi): Correct REG_SPI_BASE(i) macro for all targets
The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
2023-11-17 02:39:28 +00:00
harshal.patil
91af44d6e8
fix(soc/esp32h2): Fix llperi_rng_data field discrepancy 2023-11-16 17:49:26 +05:30
wuzhenghui
161bd8bfed change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 2023-11-16 18:11:57 +08:00
Mahavir Jain
94bf4710fa
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose
In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.

In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
2023-11-15 09:42:26 +05:30
Song Ruo Jing
46d33e46ef fix(console): enable to select UART1 port for console output
This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
2023-11-09 22:32:49 +08:00
gaoxu
0ea0b39725 feat(adc_cali): Add ADC calibration support for ESP32H2 2023-10-31 11:29:30 +08:00
C.S.M
4111b07076 Merge branch 'bugfix/flash_enc_plaintext' into 'master'
fix(flash_encryption): Fix the issue that XTS_AES Plain text memory size wrong

See merge request espressif/esp-idf!26640
2023-10-27 18:23:00 +08:00
Cao Sen Miao
420ac840ff fix(flash_encryption): Fix the issue that XTS_AES Plain text memory size wrong 2023-10-26 19:38:42 +08:00
morris
418494800c fix(i2c): read write FIFO memory by volatile 2023-10-26 14:40:07 +08:00
Konstantin Kondrashov
a304cc230e Merge branch 'feature/esp32h2_adds_adc_calib_efuses' into 'master'
feat(efuse): Adds efuse ADC calibration data for ESP32H2

See merge request espressif/esp-idf!26305
2023-10-25 15:58:24 +08:00
Cao Sen Miao
8d639492f2 feat(i2c_slave): Add new implementation and API for I2C slave 2023-10-24 18:44:49 +08:00
wuzhenghui
6a436286dc feat(esp_hw_support): add api to gpio driver to support output internal clock on GPIO 2023-10-20 14:35:26 +08:00
Mahavir Jain
2407813a67 Merge branch 'feature/update_esp32c6-h2_apm_api' into 'master'
apm: updated APM HAL/LL APIs.

See merge request espressif/esp-idf!26368
2023-10-18 12:26:38 +08:00
Sachin Billore
c106f5caf6 apm: updated APM HAL/LL APIs. 2023-10-17 18:20:36 +05:30
Armando
17063b51e0 feat(soc): added flash operation range macros in ext_mem_defs.h 2023-10-16 17:19:04 +08:00
Michael (XIAO Xufeng)
2308292ca3 Merge branch 'bugfix/revert_pvt' into 'master'
Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2"

See merge request espressif/esp-idf!26425
2023-10-16 12:53:07 +08:00
Song Ruo Jing
d73bf72885 Merge branch 'feature/gpio_dump_io_info' into 'master'
feat(gpio): add a dump API to dump IO configurations

Closes IDFGH-10987

See merge request espressif/esp-idf!26158
2023-10-13 22:35:59 +08:00
Song Ruo Jing
321f628ff5 feat(gpio): add a dump API to dump IO configurations
Closes https://github.com/espressif/esp-idf/issues/12176
2023-10-12 17:34:20 +08:00
zlq
9c2d470465 feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64
MHz
2023-10-12 14:51:54 +08:00
Xiao Xufeng
28ba080c5e Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2"
This reverts commit b221f87e00.
2023-10-12 14:51:54 +08:00
morris
66497af276 feat(hal): enable hal host test 2023-10-11 11:23:24 +08:00
KonstantinKondrashov
071d1cf865 feat(efuse): Adds efuse ADC calibration data for ESP32H2 2023-10-04 16:00:01 +08:00
wuzhenghui
c8083b07bf feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe 2023-09-28 17:41:42 +00:00
Kevin (Lao Kaiyao)
4c6f4b39f1 Merge branch 'feature/support_i2s_on_p4' into 'master'
feat(i2s): support i2s on esp32p4

Closes IDF-6508

See merge request espressif/esp-idf!24280
2023-09-29 00:50:04 +08:00
laokaiyao
cf889f3c6d feat(i2s): support i2s on esp32p4 2023-09-28 15:03:27 +08:00
zlq
b221f87e00 feat(volt): chip auto adjust volt for esp32c6 & esp32h2 2023-09-28 05:55:42 +00:00
Kevin (Lao Kaiyao)
9a239b8367 Merge branch 'feature/support_analog_comparator_on_p4' into 'master'
feat(ana_cmpr): supported analog comparator on esp32p4

Closes IDF-7479

See merge request espressif/esp-idf!24873
2023-09-27 04:24:09 +08:00
Jiang Jiang Jian
17ae394fd1 Merge branch 'feature/update_esp32h2_sleep_logic' into 'master'
feat(pm): remove SOC_PM_RETENTION_HAS_CLOCK_BUG for esp32h2

See merge request espressif/esp-idf!26081
2023-09-26 16:11:25 +08:00
laokaiyao
ff7a11e539 feat(ana_cmpr): supported etm in analog comparator example 2023-09-25 19:57:34 +08:00
Ivan Grokhotkov
2ac972e2c7
fix(soc): update SOC_IROM_MASK_HIGH for esp32, c6, h2 for consistency 2023-09-22 16:13:41 +02:00
cjin
40996f804a change: remove has clock bug macro for esp32h2 2023-09-21 11:31:53 +08:00
Planck (Lu Zeyu)
255d499884 fix(ll): fix cpp compile error
Merges https://github.com/espressif/esp-idf/pull/12093

fix(ll): remove FLAG_ATTR macro

Such kind of operator overload will not work because C++ thinks such overload is ambiguous and it still prefer the built-in one which accepts and returns integer. Manually force type conversion seems to be unavoidable.
2023-09-14 14:48:12 +08:00
Konstantin Kondrashov
054d4943c5 Merge branch 'feature/esp32p4_update_systimer' into 'master'
feat(esp_timer): Support systimer for ESP32P4

Closes IDF-7486 and IDF-7487

See merge request espressif/esp-idf!25688
2023-09-13 19:13:39 +08:00
Konstantin Kondrashov
cbdb799b6f feat(esp_timer): Support systimer for ESP32P4 2023-09-13 19:13:38 +08:00
Marius Vikhammer
573404b328 Merge branch 'bugfix/use_xtal_for_c3_wdt' into 'master'
fix(wdt): changed ESP32-C3 WDT to use XTAL as clock

Closes IDF-6729

See merge request espressif/esp-idf!25867
2023-09-13 10:44:38 +08:00
Marius Vikhammer
7a71454930 fix(wdt): changed WDT clock source to XTAL for C6/H2
Previously it used PLL, but PLL could potentially be powered down by power-management
when CPU frequency changed.
2023-09-12 09:41:24 +08:00
Marius Vikhammer
ca99f55316 fix(wdt): changed ESP32-C3 WDT to use XTAL as clock
This clock is unchanged even when CPU/APB frequency changes (e.g. due to esp_pm),
which means timeout period is correct even after such a change.
2023-09-08 15:12:21 +08:00
KonstantinKondrashov
25c7a59e31 fix(freertos): Use INTERRUPT_CURRENT_CORE_INT_THRESH_REG for esp32p4 2023-09-07 15:25:35 +08:00
Armando (Dou Yiwen)
bdfa91ab66 Merge branch 'change/delete_not_used_mmu_macros' into 'master'
mm: delete not used mmu macros and added soc_ prefix

Closes IDF-7686

See merge request espressif/esp-idf!25663
2023-09-06 11:59:03 +08:00