Commit Graph

146 Commits

Author SHA1 Message Date
Jakob Hasse
fc22e3c645 [system]: Made longjmp save for context switch
* Patched longjmp to be context-switch safe
  longjmp modifies the windowbase and windowstart
  registers, which isn't safe if a context switch
  occurs during the modification. After a context
  switch, windowstart and windowbase will be
  different, leading to a wrongly set windowstart
  bit due to longjmp writing it based on the
  windowbase before the context switch. This
  corrupts the registers at the next window
  overflow reaching that wrongly set bit.

  The solution is to disable interrupts during
  this code. It is only 6 instructions long,
  the impact shouldn't be significant.

  The fix is implemented as a wrapper which
  replaces the original first instructions of
  longjmp which are buggy. Then, it jumps back
  to execute the rest of the original longjmp
  function.

  Added a comparably reliable test to the
  test apps.
2021-04-23 15:55:31 +08:00
KonstantinKondrashov
fd867a11df bootloader: Suppress a Cmake warning - variables were not used by the project
Manually-specified variables were not used by the project: SECURE_BOOT_SIGNING_KEY
2021-04-13 11:28:13 +00:00
Marius Vikhammer
8ac74082f1 soc: add dummy bytes to ensure instr prefetch always valid
The CPU might prefetch instructions, which means it in some cases
will try to fetch instruction located after the last instruction in
flash.text.

Add dummy bytes to ensure fetching these wont result in an error,
 e.g. MMU exceptions
2021-03-29 13:50:03 +08:00
Angus Gratton
1581744c10 Merge branch 'feature/main_task_affinity_pr6627' into 'master'
Allow selection of different core for main task

Closes IDFGH-4828

See merge request espressif/esp-idf!12654
2021-03-22 06:46:24 +00:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot)
- ESP32 ECO3, ESP32-S2/C3/S3
2021-03-15 12:30:20 +00:00
0xFEEDC0DE64
6928db7670 Allow selection of different core for main task
Closes https://github.com/espressif/esp-idf/pull/6627
2021-03-09 10:13:28 +11:00
Angus Gratton
90ec0b0327 bootloader: Allow 'silent assert' config to work in bootloader
Requires adding the 'newlib' component to the bootloader project, for
platform_include header.
2021-03-03 10:26:57 +11:00
Renz Bagaporo
5e8799bbfe esp_common: move some headers 2021-02-24 12:16:37 +08:00
Angus Gratton
fe8a891de9 Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master'
bootloader/esp32c3: Support secure boot

Closes IDF-2115

See merge request espressif/esp-idf!11797
2021-01-21 08:42:49 +08:00
Li Shuai
6ef2a7def0 bootloader: fix external 32k xtal not found error 2021-01-20 16:51:20 +08:00
KonstantinKondrashov
98f726fa4b bootloader/esp32c3: Adds secure boot (not yet supported) 2021-01-19 20:51:13 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
morris
65aebef596 esp32c3: added 2nd bootloader project linker file 2020-12-11 11:44:01 +08:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
e82eac4354 cmake: Apply cmakelint fixes 2020-11-11 07:36:35 +00:00
Renz Bagaporo
6b0a5af73e soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
Renz Bagaporo
988be69466 esp_hw_support: create component 2020-10-28 07:21:29 +08:00
morris
9de6cba434 ci: add more build test for esp32-s3 2020-10-27 17:22:17 +08:00
Angus Gratton
c51dca618a Merge branch 'feature/update_key_name_of_secure_boot' into 'master'
bootloader: Secure_boot name replaced by secure_boot_v1 & secure_boot_v2

Closes ESPTOOL-55

See merge request espressif/esp-idf!10849
2020-10-22 13:41:13 +08:00
Angus Gratton
b35cb43caf bootloader_support: Add dummy ESP32-S3 RNG support 2020-10-16 18:48:26 +11:00
Angus Gratton
699742acc6 esp32s2: Support bootloader_random_enable() 2020-10-16 18:48:26 +11:00
KonstantinKondrashov
b19c4739c3 bootloader: Secure_boot name replaced by secure_boot_v1 & secure_boot_v2
- espefuse.py burn_key secure_boot is no longer used.
- Secure boot V1: espefuse.py burn_key secure_boot_v1 file.bin
- Secure boot V2: espefuse.py burn_key secure_boot_v2 file.bin
2020-10-15 16:48:23 +08:00
fuzhibo
6773df88f2 feature(rtc): rename i2c_xxx to regi2c_xxx 2020-10-14 21:15:24 +08:00
Michael (XIAO Xufeng)
953c046550 esp32s3/bootloader: extend IRAM usage to 0x6000
The bootloader cannot fit in the size of iram_loader_seg when built under -O0. Extend the IRAM size to fix this.
2020-10-09 17:50:17 +08:00
fuzhibo
247789bb2e rtc: support access internal i2c register 2020-09-27 12:12:17 +08:00
Ivan Grokhotkov
7a9d2c3fb4 bootloader: fix section placement of wdt_hal
Regression from moving HAL and LL code into the new "hal" component.
2020-09-03 18:14:17 +02:00
Ivan Grokhotkov
66a32c1707 bootloader: fix section placement issues found by the check script
Summary of changes:

- bootloader_clock split into *_clock_init and *_clock_loader.
  Only esp_clk_apb_freq is in *_clock_loader.
- bootloader_common moved out of loader; functions needed in loader
  (or, referenced from bootloader_utility) were moved into
  bootloader_common_loader.c.
- assert and abort moved into bootloader_panic, made part of the
  loader
- rtc_clk and rtc_time made part of loader
2020-09-03 18:14:17 +02:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
Angus Gratton
abdb657926 bootloader esp32s2: Increase bootloader DRAM & IRAM allowance
Bootloader DRAM now ends at 0x3FFEAB00 which is the start of ROM
static RAM (reclaimable after app is running).

IRAM loader segment increased by 8KB.

Available total static RAM for the app is now reduced by 16KB.
2020-07-27 00:01:10 +00:00
Supreet Deshpande
e640e148cf Secure boot v2 support for ESP32-S2 2020-07-27 00:01:10 +00:00
Angus Gratton
442736c5d6 Merge branch 'refactor/common_rom_uart_apis' into 'master'
esp_rom: extract common uart apis into esp_rom_uart.h

See merge request espressif/esp-idf!9313
2020-07-21 15:24:21 +08:00
morris
3a8f5e45f0 bootloader: add linker script for esp32s3 2020-07-20 10:51:05 +08:00
morris
345606e7f3 esp_rom: extract common uart apis into esp_rom_uart.h 2020-07-17 16:00:59 +08:00
Supreet Deshpande
954c580548 Add platform independent CMake signing
Closes https://github.com/espressif/esp-idf/issues/5557
2020-07-09 12:24:50 +05:30
Ivan Grokhotkov
6dfb2d83a7 bootloader: combine console code for ESP32 and S2, add USB support 2020-06-26 15:38:49 +02:00
morris
a34409cffc esp_rom: extract common CRC apis into esp_rom_crc.h 2020-06-23 16:40:14 +08:00
Darian Leung
91841a53ff WDT: Add LL and HAL for watchdog timers
This commit updates the watchdog timers (MWDT and RWDT)
in the following ways:

- Add seprate LL for MWDT and RWDT.
- Add a combined WDT HAL for all Watchdog Timers
- Update int_wdt.c and task_wdt.c to use WDT HAL
- Remove most dependencies on LL or direct register access
  in other components. They will now use the WDT HAL
- Update use of watchdogs (including RTC WDT) in bootloader and
  startup code to use the HAL layer.
2020-03-26 02:14:02 +08:00
Angus Gratton
f2d310fea7 secure boot: Fix anti-fault value if hash is shorter than curve
(Not actually a problem with SBV1 anti-fault as hash size == curve size in this case.)
2020-03-11 17:17:20 +11:00
Angus Gratton
d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Supreet Deshpande
a9ccc5e5c8 feat/secure_boot_v2: Adding secure boot v2 support for ESP32-ECO3 2020-02-25 01:28:22 +05:30
Supreet Deshpande
2bf329eb2c Fixes accessing some files from 2nd part of the bootloader. 2020-02-10 12:34:18 +05:30
Ivan Grokhotkov
fd15acb50f esp32s2: bootloader: move iram_loader segment higher
This gives extra 16kB for the application's static .data/.bss
2020-01-24 10:48:20 +01:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Ivan Grokhotkov
c11f77cb1a Merge branch 'feature/use_underlying_cmake_targets_for_idf_py' into 'master'
CMake: Use underlying flash targets for idf.py

See merge request espressif/esp-idf!7067
2020-01-21 17:05:47 +08:00
duyi
18a05e2ee0 update ld file for esp32-s2 2020-01-16 17:43:59 +08:00
morris
1c2cc5430e global: bring up esp32s2(not beta) 2020-01-16 17:41:31 +08:00
Renz Christian Bagaporo
cc8bff703e esptool_py: create flash target functions 2020-01-15 03:36:47 +00:00
Angus Gratton
e890137ad3 Merge branch 'bugfix/cmake_reflashable_build_targets' into 'master'
secure boot: Fix bootloader build system target for bootloader digest

Closes IDFGH-2396

See merge request espressif/esp-idf!7069
2020-01-07 06:40:33 +08:00