Commit Graph

215 Commits

Author SHA1 Message Date
Omar Chebib
e7cb672624 Heap: fix typos in test and component 2022-04-11 11:36:52 +08:00
Armando
c4bcf1117c esp_hw_support: move soc_memory_types.h helper functions into esp_hw_support 2022-04-08 11:46:10 +08:00
wuzhenghui
4652f77a7c esp32h2beta2:update rom layout table 2022-03-29 14:13:06 +08:00
Mahavir Jain
98b8ca6475
heap: add test case for region overlap check condition 2022-03-25 09:36:48 +05:30
Mahavir Jain
f13e25d156
heap: Fix regression in heap_caps_add_region API related to address range checks
Regression was introduced in 32408b718f, which disallowed
addition of heap region with following condition:

`new_start < start && new_end == start`

This caused issues in Bluetooth APIs `esp_bt_mem_release` or `esp_bt_controller_mem_release`.

This commit fixes the problem and also adds API documentation for supported memory address
ranges in heap add region APIs.
2022-03-25 09:36:48 +05:30
Anton Maklakov
118d39c8fe Merge branch 'bugfix/remove-IRAM_ATTR-from-decls' into 'master'
Remove IRAM_ATTR from any function declarations

Closes GCC-223

See merge request espressif/esp-idf!17440
2022-03-23 11:49:22 +08:00
Armando
32408b718f heap: fix wrong memory region check
A memory region starts from REGION_START and ends at
(REGION_START+SIZE-1).

Prior to this change, the check assumes a to-be-added region starting from REGION_START is invalid. Let's take an easy example:

A memory region:  0x1000~0x10ff
new added region: 0x1000~0x1020

This will be valid.

Valid conditions and invalid conditions are illustrated in the code comment
2022-03-22 18:51:40 +08:00
Anton Maklakov
68e5d9d585 Remove IRAM_ATTR from any function declarations
IRAM_ATTR expands to a unique section attribute. Applying it to both
declaration and definition results in a section conflict.
2022-03-22 09:58:50 +00:00
Marius Vikhammer
934a3951b8 Merge branch 'feature/s2_s3_support_ext_mem_stack' into 'master'
soc: support placing task stacks in external memory for S2 and S3

Closes IDF-2797 and IDF-1805

See merge request espressif/esp-idf!16186
2022-03-09 11:57:31 +08:00
Omar Chebib
4ce4c5a68a Heap: fix free bytes calculation for TLSF heap
* Closes https://github.com/espressif/esp-idf/issues/8270
2022-03-08 11:42:23 +08:00
Marius Vikhammer
374712921a CI: add configs for running S2, S3 unit tests with PSRAM
Fixed various minor failures detected with these configs.
2022-03-04 15:29:17 +08:00
jingli
6c25dd4ec1 fix param passed to assert_valid_block, should be block not ptr 2022-02-24 13:50:16 +08:00
morris
ef00bd59dc esp_rom: extract int matrix route and cpu ticks getter 2022-02-09 13:52:20 +08:00
Kevin (Lao Kaiyao)
bf8d4d55d0 Merge branch 'refactor/rename_esp8684_to_esp32c2' into 'master'
esp8684: rename esp8684 to esp32c2

Closes IDF-4530

See merge request espressif/esp-idf!16745
2022-01-19 09:08:58 +00:00
Wang Qi Xiang
41640e2e03 heap_init: Adjust the stack/DRAM region size for ESP8684 2022-01-19 08:57:54 +00:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
morris
869bed1bb5 soc: don't expose unstable soc header files in public api 2022-01-06 23:10:22 +08:00
Jing Li
a0e794b2ca heap: adjust the order of RTC memory heap caps and regions 2021-12-29 08:49:42 +00:00
Omar Chebib
95d0514c57 Heap: Add a target test to check that TLFS allocates the requested size 2021-12-20 11:10:16 +08:00
Omar Chebib
9516fd09c2 Heap: Fix a possible bug in the TLSF allocator
Fix a bug that could return a chunk of memory smaller than requested,
easily leading to a memory corruption, when the required memory alignment
passed to the allocator is 4.
2021-12-20 10:57:43 +08:00
Sudeep Mohanty
722a6b7cf4 docs: update programming guide for esp32s3 chip independent system chapters
This commit updates the chip independent system chapters of the
programming guide for esp32s3.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-11-23 12:48:10 +05:30
Darian Leung
9b3796d2f1 freertos: Add portTRY_ENTRY_CRITICAL() and deprecate legacy spinlock fucntions
Add TRY_ENTRY_CRITICAL() API to all for timeouts when entering critical sections.
The following port API were added:
- portTRY_ENTER_CRITICAL()
- portTRY_ENTER_CRITICAL_ISR()
- portTRY_ENTER_CRITICAL_SAFE()

Deprecated legacy spinlock API in favor of spinlock.h. The following API were deprecated:
- vPortCPUInitializeMutex()
- vPortCPUAcquireMutex()
- vPortCPUAcquireMutexTimeout()
- vPortCPUReleaseMutex()

Other Changes:
- Added portMUX_INITIALIZE() to replace vPortCPUInitializeMutex()
- The assembly of the critical section functions ends up being about 50 instructions longer,
  thus the spinlock test pass threshold had to be increased to account for the extra runtime.

Closes https://github.com/espressif/esp-idf/issues/5301
2021-11-22 13:28:39 +08:00
Roland Dobai
766aa57084 Build & config: Remove leftover files from the unsupported "make" build system 2021-11-11 15:32:36 +01:00
Cao Sen Miao
a9f0a3531e ESP8684: add driver esp_pm heap support 2021-11-06 17:33:44 +08:00
wuzhenghui
ca1c4114bc heap: update esp32&s2&c3&h2 soc caps 2021-11-04 10:40:57 +08:00
Zim Kalinowski
13ab2cd9f9 Merge branch 'bugfix/spiram_abort_allocation_failure' into 'master'
SPIRAM: 'Abort on allocation failure' should not trigger when there is available SPI ram

Closes IDFGH-5870

See merge request espressif/esp-idf!15454
2021-11-02 05:36:18 +00:00
Omar Chebib
96391ef62b SPIRAM: 'Abort on allocation failure' should not trigger when there is available SPI ram 2021-11-02 05:36:18 +00:00
gaoxiaojie
0028e2c23c heap: fix multi_heap_get_info_impl 2021-11-01 16:08:07 +00:00
Alexey Gerenkov
111ba5bbe6 trax: Adds ESP32-S3 support 2021-10-22 23:36:28 +03:00
Alexey Gerenkov
5911eb3f3e apptrace: Adds ESP32-S3 support 2021-10-22 23:24:00 +03:00
Li Shuai
e8188e5d8f ci: replacing old header with new SPDX header style 2021-10-20 11:36:23 +08:00
Li Shuai
44da7d27ef heap: add a new heap caps attribute for RTC fast memory 2021-10-20 11:36:22 +08:00
Li Shuai
9298db641e deep sleep: fix some rtc fast memory definition errors in esp32s3 2021-10-19 21:47:27 +08:00
gaoxiaojie
191a494e08 support dcache 64Byte and 16k 2021-09-02 02:27:40 +08:00
Michael (XIAO Xufeng)
064f12cb90 idf_size.py: fixed diram counted twice issue, and improve display
Currently static RAM usage are listed under corresponding physical
memory.

ld: fix linker script for C3 and S3
2021-08-11 17:51:50 +02:00
Omar Chebib
a7b6ec85b8 Merge branch 'feature/move_memory_layout_to_heap' into 'master'
G0: Memory layouts are now part of heap components

Closes IDF-1264

See merge request espressif/esp-idf!14028
2021-07-19 06:23:19 +00:00
Omar Chebib
c4f57af6c9 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
Mahavir Jain
9ac9b69087 heap: use hal specific API to get cpu cycles count
This fixes compilation issue of heap tracing feature for RISC-V
architecture.
2021-06-22 14:14:10 +08:00
Angus Gratton
d6f4d99d93 core system: Fix warnings in compilation when assertions are disabled
Adds a CI config for hello world that sets this, to catch future regressions
2021-03-03 10:26:57 +11:00
Omar Chebib
c4dc3acba9 heap: add light poisoning configuration to the tests.
Relates to IDF-2653
2021-02-01 11:58:42 +08:00
Omar Chebib
d902b4e7db heap: fix unaligned memory bug when poisoning is enabled.
Poisoned memory is now aligned as requested by the user.
Closes IDF-2653
2021-02-01 11:58:42 +08:00
Martin Vychodil
69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
Renz Bagaporo
d1c800fbbb components: fix ldgen check errors 2021-01-19 11:17:18 +08:00
jiangguangming
47f469b238 heap: support aligned_alloc for retention memory on ESP32-C3 2021-01-13 14:41:22 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
Marius Vikhammer
9c8e4fd4c5 C3: build and run unit tests
Enable building and running of unit tests in CI for C3 as well as fix
related compile errors

Also enables building of C3 test apps
2021-01-11 11:34:37 +08:00
Felipe Neves
89d461df2a heap: increase the sl to reduce the fragmentation to acceptable level. 2020-12-17 12:52:56 -03:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Angus Gratton
935e4b4d62 Merge branch 'feature/riscv_arch' into 'master'
Add RISC-V support

Closes IDF-2359

See merge request espressif/esp-idf!11140
2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00