Commit Graph

91 Commits

Author SHA1 Message Date
Omar Chebib
aa2ca7dd94 LEDC: improved support for ESP32-C3 and refactored divisor calculation
As ESP32C3 does not have support for REF_TICK source clock, it is now not
possible to select it anymore.
Auto cfg clock has been improved for all boards.
2021-11-11 12:21:15 +08:00
morris
83d16aa00c gdma: support IRAM interrupt 2021-11-08 16:14:51 +08:00
Cao Sen Miao
09487761cf ESP8684: add freertos, hal, esp_system support 2021-11-06 17:33:44 +08:00
Alexey Gerenkov
bb9cd84cdc debug_stubs: Refactor and add support for RISCV 2021-11-04 01:33:24 +03:00
laokaiyao
f37595dee9 i2s: fix ws signal polarity in tdm mode 2021-10-26 11:12:30 +08:00
morris
e2275b1f63 gptimer: clean up hal and ll for driver-ng 2021-10-20 18:40:08 +08:00
Zim Kalinowski
a7c9949dd9 Fixed build problem when icluding gpio_ll.h from cpp file 2021-10-17 14:29:31 +08:00
laokaiyao
7264c0e59a i2s_rec_example: add support for esp32s3 2021-10-01 16:05:04 +01:00
SalimTerryLi
bd89dcc683
RMT: add loop_autostop driver support for esp32s3 2021-09-24 15:24:45 +08:00
morris
20ef511d0a Merge branch 'bugfix/fix_reg_name_charactor_err' into 'master'
bugfix: fix reg name character error

See merge request espressif/esp-idf!14169
2021-09-18 07:10:57 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON
save
2021-09-16 20:57:57 +08:00
wuzhenghui
b2c028085a fix reg name character error 2021-09-15 21:51:20 +08:00
morris
502e132e5d Merge branch 'feature/fast_gpio_c3' into 'master'
fast gpio support on esp32-c3

Closes IDF-3783

See merge request espressif/esp-idf!14986
2021-09-14 06:09:34 +00:00
Wang Meng Yang
a885c42cda Merge branch 'example/controller_hci_uart_for_esp32s3' into 'master'
examples: added support of ESP32-S3 chip in controller_hci_uart example

Closes BT-1906

See merge request espressif/esp-idf!14935
2021-09-08 06:02:18 +00:00
morris
6cec256a34 fast_gpio: driver support on esp32c3 2021-09-06 19:39:09 +08:00
laokaiyao
c5afd7ce34 i2s: fix write failure on ESP32 in 32bit slave mode 2021-09-03 17:36:44 +08:00
laokaiyao
0ff3dd9778 i2s: fix mono support issue 2021-09-02 14:33:36 +08:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
2021-08-30 13:50:58 +08:00
wangmengyang
c053ef0541 examples: added support of ESP32-S3 chip in controller_hci_uart example 2021-08-26 14:24:32 +08:00
Marius Vikhammer
3907634d20 aes: fix potential unaligned access of buffers
https://github.com/espressif/esp-idf/issues/7236
2021-08-25 10:48:26 +08:00
morris
0c41837b06 Merge branch 'refactor/timer_group-reg_file-update' into 'master'
refactor/timer_group update reg headers for c3 and s2

Closes IDF-3690

See merge request espressif/esp-idf!14761
2021-08-23 04:30:59 +00:00
SalimTerryLi
443845fd54
timer_group: update reg headers for c3&s2&h2 and fix direct 8/16bit reg access 2021-08-19 18:56:32 +08:00
morris
71d475149d lcd: update doc unit test and example to support 8-line spi 2021-08-19 16:40:22 +08:00
bizhuangyang
8143832041 spi_master:support octal mode for esp32s2 and esp32s3
Add support for 8-line spi for lcd on esp32s2 and esp32s3

Closes https://github.com/espressif/esp-idf/issues/6371
2021-08-19 16:40:22 +08:00
morris
1656cee69d i2s: correct soc info
1. remove non-exist I2S instance
2. update soc_caps.h, i2s_ll.h
2021-08-10 21:06:59 +08:00
Zim Kalinowski
1fd56e0b87 Merge branch 'feature/systimer_generate_rtos_tick' into 'master'
freertos(esp32s3): SysTick uses systimer

Closes IDF-2613

See merge request espressif/esp-idf!12246
2021-08-04 12:33:52 +00:00
Konstantin Kondrashov
29f581fc70 freertos(esp32s3): SysTick uses systimer 2021-08-04 20:33:44 +08:00
laokaiyao
f863998e90 driver/i2s: support mclk 2021-08-04 10:20:03 +08:00
laokaiyao
3c57a6ac36 driver/i2s: refactor ll and hal 2021-08-04 10:20:03 +08:00
laokaiyao
d51b85989b doc/i2s: update i2s programming guide on s3 & c3 2021-08-04 10:20:03 +08:00
Cao Sen Miao
992de2750e spi_flash: add support for ext flash 2021-07-31 14:11:35 +08:00
Michael (XIAO Xufeng)
5569dedd7f Merge branch 'bugfix/i2c_example_esp32s3' into 'master'
i2c: bringup on ESP32-S3

Closes IDF-3232 and IDF-3292

See merge request espressif/esp-idf!13985
2021-07-29 07:01:38 +00:00
Michael (XIAO Xufeng)
fbb6b1b11a Merge branch 'bugfix/fix_uart_reset_issue_on_esp32c3' into 'master'
bugfix(uart): reset uart0 core before uart apb reset

Closes IDF-3362

See merge request espressif/esp-idf!12749
2021-07-22 07:20:58 +00:00
Chen Yi Qun
6317f5b481 add uart core reset in uart_module_enable() 2021-07-21 11:41:04 +08:00
Omar Chebib
b8c6c5334f i2c: modify examples to work out of the box on ESP32S3
On ESP32S3, the default I2C pins of the examples are already used by USB.
This commit changes the default pins.
2021-07-21 11:04:16 +08:00
Omar Chebib
a6e14c37b2 SPI: chip select can now be kept active if the bus has been acquired
The user can now request the chip select to remain active after the current
transfer. In order to do so, he MUST acquire the bus first with `spi_device_acquire_bus()`
function, else, an error is returned.
2021-07-21 10:39:45 +08:00
Shu Chen
75bd02bd46 esp32h2: add some more fixes and TODOs 2021-07-01 20:36:39 +08:00
Shu Chen
2df4ddf998 esp32h2: fixes after rebase 2021-07-01 19:53:50 +08:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
205cd469e9 esp32h2: update driver/hal/soc components to support esp32h2 2021-07-01 19:53:11 +08:00
Shu Chen
983cca8b27 esp32h2: copy driver/hal/soc components from esp32c3
Copy the esp32c3 code without any change:
 * components/driver/esp32h2
 * components/esp32h2
 * components/hal/esp32h2
 * components/soc/esp32h2
2021-07-01 19:53:11 +08:00