Commit Graph

1504 Commits

Author SHA1 Message Date
Jiang Jiang Jian
5e319c6760 Merge branch 'bugfix/fix_onebyte_watchpoint_setting_v5.0' into 'release/v5.0'
fix(riscv): supports 1 byte and larger than 64byte range watchpoint setting (v5.0 )

See merge request espressif/esp-idf!27216
2023-12-15 19:29:57 +08:00
Aditya Patwardhan
d9aab654c4
fix(soc): esp32s3/Fix the DROM_DROM_HIGH limit
Previously the DROM_HIGH_ADDR for esp32s3 was 0x3D000000, which
    convers only 16 MB of address range. But esp32s3 supports 32 MB
    external memory. So this address should be 0x3E000000
2023-12-11 12:22:48 +05:30
wuzhenghui
ead822e6ee
fix(esp_hw_support): fix lightsleep current leakage on usb-phy controlled pad 2023-11-23 10:21:02 +08:00
wuzhenghui
0a17593a7f change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 2023-11-22 03:12:06 +00:00
Ivan Grokhotkov
3fd3848932 fix(soc): update SOC_IROM_MASK_HIGH for esp32 for consistency 2023-11-22 03:03:35 +00:00
Ivan Grokhotkov
207996eb68 fix(soc): correct SOC_IROM_MASK_HIGH for esp32s3
Fixes corrupted backtraces on S3 when a function is in ROM.

Closes https://github.com/espressif/esp-idf/issues/11512
2023-11-22 03:03:35 +00:00
muhaidong
4ee958df57 fix(wifi): fix deinit init wifi scan fail issue 2023-11-10 11:18:12 +08:00
Jiang Jiang Jian
4ba42edafc Merge branch 'bugfix/fix_cpu_switches_freq_bug_s2s3_to_v5.0' into 'release/v5.0'
EspS2/S3: fixed the bug of insufficient voltage when the CPU switches frequency(V5.0)

See merge request espressif/esp-idf!26281
2023-10-25 10:25:14 +08:00
Erhan Kurubas
9fc58a706d fix(interrupts): reorder esp32s3 irq names to align with the respective irq numbers 2023-10-17 09:02:31 +02:00
hongshuqing
6ae027eb8b s2s3 cpu sw freq 2023-09-28 15:02:30 +08:00
morris
d6df3b7758 Merge branch 'feature/add_mcpwm_carrier_clk_source_v5.0' into 'release/v5.0'
feat(MCPWM): Add mcpwm carrier clk source(v5.0)

See merge request espressif/esp-idf!25523
2023-09-19 10:24:25 +08:00
Armando
6183b555aa fix(flash_mmap): fixed limited free I/D pages on ESP32S3, C2, C3 2023-08-25 10:37:48 +08:00
Chen Jichang
2a88fb9e81 feat(MCPWM): Add mcpwm carrier clk source
The MCPWM carrier is part of the operator and can work independently
without the MCPWM timer being enabled. This commit add the MCPWM
carrier clk source.
2023-08-24 11:45:28 +08:00
Roland Dobai
2ab2d8dce7 Merge branch 'fix/esp32s3_sysview_trace_corrupt_v5.0' into 'release/v5.0'
fix(app_trace): Fix apptrace data corruption on ESP32-S3 (v5.0)

See merge request espressif/esp-idf!24681
2023-08-09 00:05:20 +08:00
morris
a55ab7cb5d Merge branch 'feature/usb_host_restrict_ahb_errata_workaround_to_esp32s2_eco0_v5.0' into 'release/v5.0'
USB Host: Restrict ESP32-S2 AHB errata workaround to only ECO0 chips (v5.0)

See merge request espressif/esp-idf!25053
2023-08-08 10:12:42 +08:00
Alexey Gerenkov
ea3f68824f fix(app_trace): Fix apptrace data corruption on ESP32-S3
Close https://github.com/espressif/esp-idf/issues/10604
diff --git a/components/soc/esp32s3/include/soc/tracemem_config.h b/components/soc/esp32s3/include/soc/tracemem_config.h
index 55c9b907dd..75fd87419b 100644
--- a/components/soc/esp32s3/include/soc/tracemem_config.h
+++ b/components/soc/esp32s3/include/soc/tracemem_config.h
@@ -10,7 +10,7 @@ extern "C" {
 #endif

 #define TRACEMEM_MUX_BLK0_NUM                   22
-#define TRACEMEM_MUX_BLK1_NUM                   23
+#define TRACEMEM_MUX_BLK1_NUM                   26

 #if (TRACEMEM_MUX_BLK0_NUM < 6) || (TRACEMEM_MUX_BLK0_NUM > 29)
 #error Invalid TRAX block 0 num!
2023-07-31 11:20:44 +03:00
wanlei
68e07d90ba cache: fix cache suspended/resumed twice on S3 2023-07-31 15:08:18 +08:00
Darian Leung
70dde52e91 soc: Move revision MAX/MIN static assert to esp_hw_support
Previously, "soc/chip_revision.h" contained a static assert to check that the
CONFIG_ESP_REV_MIN_FULL <= CONFIG_ESP_REV_MAX_FULL. There are two issues with
this assert:

- Contained in a header file, so it is only compiled if the "chip_revision.h"
is included somewhere
- CONFIG_ESP_REV_MIN_FULL and CONFIG_ESP_REV_MAX_FULL are defined in
"esp_hw_support", which is a G0 component. This creates a reverse dependency
of G0 on G1.

This commit moves the static assert "revision.c" in "esp_hw_support".
2023-07-28 11:36:20 +02:00
Nachiket Kukade
0148546df3 fix(esp_wifi): Enable FTM for ESP32C2, fix other FTM issues
Enable FTM for ESP32C2 and update wifi libs with below fixes -

1. Bugfixes in Initiator and Responder mode
2. Fix wrong RTT value in first FTM procedure without connection
3. Update FTM calibration values for ESP32S2, S3, C3 and C2
4. Update distance estimation logic
5. Add some useful command parameters in FTM example
6. Fix bug when number of FTM measurement frames received is more
   than (number_of_brusts * FTMs per brust).

Co-authored-by: Sarvesh Bodakhe <sarvesh.bodakhe@espressif.com>
2023-07-21 16:30:47 +05:30
harshal.patil
3a73b1bf9b fix(mbedtls): Fix the port for the mbedtls_internal_shaX_process API
- Also added the fix to update intermediate SHA state in the mbedtls_shaX_update API
2023-07-14 14:18:10 +05:30
laokaiyao
a2cf3ae4df i2s: fixed i2s_ll compiling failure under C++ evironment
Closes: https://github.com/espressif/esp-idf/issues/11625
2023-06-27 10:39:43 +08:00
Michael (XIAO Xufeng)
1b04acf68f Merge branch 'bugfix/fix_chip_broken_bug_in_monitor_mode_c2c3s2s3_to_v5.0' into 'release/v5.0'
ESP32S2/C3/C2: fixed S2 dangerous power parameters in sleep modes and support S2/C3/C2 different sleep mode(v5.0)

See merge request espressif/esp-idf!23754
2023-06-13 17:50:21 +08:00
Jiang Jiang Jian
c82d9ca887 Merge branch 'bugfix/bod_glitch_reset_c6_v5.0' into 'release/v5.0'
bootloader: fix BOD and glitch reset on C6 and H2 (v5.0)

See merge request espressif/esp-idf!23407
2023-06-13 10:25:47 +08:00
hongshuqing
d82af7f54a fix chip broken bug in monitor mode for c2 c3 s2 s3 to v5.0 2023-06-13 10:22:40 +08:00
chenjianxing
cdb11885f5 esp_phy: update esp32c2 phy lib to fix some issues
1. improve Wi-Fi rx 11b pkts for AC-DC power supply modules.
2. fix Wi-Fi disconnect in low temperature.
3. fix RTC_SW_CPU_RST occur in Wi-Fi start and stop process.
2023-06-12 11:54:11 +08:00
morris
839d1a831d drivers: fix issue reported by coverity 2023-06-07 11:43:17 +08:00
Cao Sen Miao
0229619e16 i2c: fix fifo length on esp32c2,
Closes https://github.com/espressif/esp-idf/issues/11413
2023-05-17 11:31:21 +08:00
Jiang Jiang Jian
c323399520 Merge branch 'bugfix/fix_hw_ralunderrun_assert_v5.0' into 'release/v5.0'
Fixed BLE HW RAL_UNDERRUN assert and backport some bug fix 23-03-30 (back port v5.0)

See merge request espressif/esp-idf!22989
2023-05-11 17:27:32 +08:00
Mahavir Jain
3ac5d6a2dd Merge branch 'fix/esp32s3_ununsed_dcache_as_dram_v5.0' into 'release/v5.0'
esp_hw_support: Update the memory ptr location/property checks to include the unused DCACHE added to DRAM (v5.0)

See merge request espressif/esp-idf!23268
2023-05-11 16:48:32 +08:00
Mahavir Jain
3d36df31cf Merge branch 'bugfix/block9_can_not_be_used_for_fe_v5.0' into 'release/v5.0'
efuse: Prevent burning XTS_AES and ECDSA keys into BLOCK9 (BLOCK_KEY5) (v5.0)

See merge request espressif/esp-idf!23290
2023-05-11 12:07:39 +08:00
zwj
45a72222d6 If it is not esp32 chips, hide the configuration item: BT_BLE_RPA_SUPPORTED 2023-05-11 02:45:56 +00:00
Laukik Hase
841e033de8
soc/esp32s3: Fix the SOC_MEM_INTERNAL_HIGH value
- As per the memory block diagram for ESP32-S3, the
  internal memory address ranges as follows:
  DRAM: 0x3FC88000 (== SOC_MEM_INTERNAL_LOW) <-> 0x3FCF0000
  IRAM: 0x40378000 <-> 0x403E0000 (== SOC_MEM_INTERNAL_HIGH)
2023-05-04 10:54:35 +05:30
KonstantinKondrashov
94ae902d78 efuse: Prevent burning XTS_AES and ECDSA keys into BLOCK9 (BLOCK_KEY5)
eFuse module has a hardware bug.
It is related to ESP32-C3, C6, S3, H2 chips:
    - BLOCK9 (BLOCK_KEY5) can not be used by XTS_AES keys.
For H2 chips, the BLOCK9 (BLOCK_KEY5) can not be used by ECDSA keys.
S2 does not have such a hardware bug.
2023-05-01 06:23:23 +00:00
Xiao Xufeng
8227ca97bd bootloader: enable super WDT and BOD reset on C2 2023-04-24 11:44:53 +08:00
Xiao Xufeng
d43934f32d bootloader: fixed super watchdog not enabled issue on C3, S3, H4 2023-04-24 11:44:52 +08:00
Armando
1ebeea7763 sdmmc: I/O phase adjustments
1. Fix incorrect meaning of SDMMC.clock bits, synchronize the names
   with the TRM.
2. Choose input and output phases to satisfy typical timing
   requirements.
3. Move use_hold_reg setting into the host driver, since it is related
   to timing.

Closes https://github.com/espressif/esp-idf/issues/8521
Related to https://github.com/espressif/esp-idf/issues/8257
2023-04-19 15:38:57 +08:00
liuning
6b5bc6304a rtc_sleep: workaround systimer stall issue during lightsleep on ESP32C3 2023-03-29 21:19:21 +08:00
Jiang Jiang Jian
763e369858 Merge branch 'feature/support_7.2.8_soc/pvt_dig_v5.0' into 'release/v5.0'
ESP32S3:support auto adjust LDO voltage based on pvt-dig(backport 5.0)

See merge request espressif/esp-idf!19774
2023-03-20 14:06:48 +08:00
Michael (XIAO Xufeng)
55e040b54b Merge branch 'bugfix/wakeup_io_hold_unhold_in_sleep_v5.0' into 'release/v5.0'
gpio: Fix deep sleep wakeup IOs unable to unhold after wakeup (v5.0)

See merge request espressif/esp-idf!22665
2023-03-20 12:49:56 +08:00
zlq
135381943a 1.add ldo parameters in efuse table; 2.set ldo based on pvt-efuse; 3.ldo voltage is changed based on cpu freq 2023-03-17 11:14:01 +00:00
Song Ruo Jing
27f9ee66d5 gpio: Fix IO hold function related problems
1. Fix deep sleep wakeup IOs can not be unhold issue
2. Correct hold related APIs' description
3. Fix gpio_force_hold_all API

docs: Add GPIO wakeup source to sleep_modes doc for ESP32C3 and C2
2023-03-17 14:44:29 +08:00
Rahul Tank
32a02459dc Nimble: Update example configuration to enable ext adv feature only for BLE5.0 supported chips 2023-03-16 12:08:58 +05:30
jingli
833f201610 soc/soc_caps: update soc caps for chips that support power-down of modem hardware 2023-03-13 13:33:18 +08:00
Laukik Hase
a2dd95434f memprot: Fix incorrect faulting address reported for esp32c3 & esp32s3
Co-authored-by: Mahavir Jain <mahavir@espressif.com>
2023-03-06 12:39:12 +00:00
Jiang Jiang Jian
4abb6efb36 Merge branch 'bugfix/fix_gpio_wakeup_related_issues_in_ssc_sleep_test_backport_v5.0' into 'release/v5.0'
sleep: fix gpio wakeup related issues(backport v5.0)

See merge request espressif/esp-idf!22332
2023-02-27 15:12:13 +08:00
Jiang Jiang Jian
809aeb77b7 Merge branch 'bugfix/update_esp_rom_rtc_header_v5.0' into 'release/v5.0'
update esp rom rtc header (backport to v5.0)

See merge request espressif/esp-idf!21915
2023-02-27 15:09:19 +08:00
Jiang Jiang Jian
335ad04cba Merge branch 'feature/support_feature_depend_on_rtc_fast_mem_for_esp32c2_backport_v5.0' into 'release/v5.0'
esp32c2: support feature(rtc time) depend on rtc fast mem(backport v5.0)

See merge request espressif/esp-idf!22224
2023-02-27 15:06:31 +08:00
morris
491800f144 Merge branch 'refactor/resolve_mmu_soc_dependency_to_sdkconfig_h_v5.0' into 'release/v5.0'
g0: resolve MMU_PAGE_SIZE not defined in g0 build issue (v5.0)

See merge request espressif/esp-idf!22488
2023-02-25 17:30:47 +08:00
Armando
866d727477 soc: remove unused macro in ext_mem_defs.h
ESP_CACHE_TEMP_ADDR is not used in IDF
2023-02-23 12:40:43 +08:00
Armando
86b331b40f soc: update iram/dram addr range in ext_mem_defs.h
IRAM0/DRAM0 addr range update, on s3, c3, c2, h4, c6:

IRAM0_ADDRESS_LOW ~ IRAM0_ADDRESS_HIGH
DRAM0_ADDRESS_LOW ~ DRAM0_ADDRESS_HIGH

now are for the real IRAM0 and DRAM0
2023-02-23 12:39:54 +08:00