esp-idf/components/soc
Armando 1ebeea7763 sdmmc: I/O phase adjustments
1. Fix incorrect meaning of SDMMC.clock bits, synchronize the names
   with the TRM.
2. Choose input and output phases to satisfy typical timing
   requirements.
3. Move use_hold_reg setting into the host driver, since it is related
   to timing.

Closes https://github.com/espressif/esp-idf/issues/8521
Related to https://github.com/espressif/esp-idf/issues/8257
2023-04-19 15:38:57 +08:00
..
esp32 sdmmc: I/O phase adjustments 2023-04-19 15:38:57 +08:00
esp32c2 Nimble: Update example configuration to enable ext adv feature only for BLE5.0 supported chips 2023-03-16 12:08:58 +05:30
esp32c3 rtc_sleep: workaround systimer stall issue during lightsleep on ESP32C3 2023-03-29 21:19:21 +08:00
esp32h2 Nimble: Update example configuration to enable ext adv feature only for BLE5.0 supported chips 2023-03-16 12:08:58 +05:30
esp32s2 soc/soc_caps: update soc caps for chips that support power-down of modem hardware 2023-03-13 13:33:18 +08:00
esp32s3 sdmmc: I/O phase adjustments 2023-04-19 15:38:57 +08:00
include/soc all: Apply new version logic (major * 100 + minor) 2023-01-06 02:00:52 +08:00
linux/include/soc build-system: include soc_caps defines into kconfig 2021-12-06 12:37:07 +08:00
CMakeLists.txt g0: resolve MMU_PAGE_SIZE not defined in g0 build issue 2023-02-23 12:35:52 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Kconfig g0: resolve MMU_PAGE_SIZE not defined in g0 build issue 2023-02-23 12:35:52 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware