Song Ruo Jing
2c9aa4559c
clk_tree: Add a general API to get the frequency of different clocks
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Add basic clk_tree driver and hal implementation.
2023-01-17 11:30:24 +08:00
Armando (Dou Yiwen)
d1b8da74d8
Merge branch 'refactor/improve_adc_power_maintanance' into 'master'
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adc: improve adc power maintanance
Closes IDF-6114 and IDF-6318
See merge request espressif/esp-idf!21151
2023-01-12 20:30:36 +08:00
jiangguangming
4b4491e736
rtc_time.c: simplify the rtc_time_get with LL function
2023-01-10 17:03:54 +08:00
Armando
5be3c21cfc
adc: improve power logic
2023-01-09 17:10:04 +08:00
Armando
f9da48d94f
rtc: add pwdet and sar adc power related low level func
2023-01-09 17:09:01 +08:00
morris
672ac58ad5
io_mux: can set different clock source
2022-12-29 14:46:16 +08:00
Michael (XIAO Xufeng)
9aec53e83f
esp32c2: fixed chip revision of ECO2
2022-12-21 15:28:50 +08:00
Song Ruo Jing
182e937c5a
clk_tree: Add basic clock support for esp32c6
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- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
Remove FPGA build for esp32c6
2022-12-13 19:18:34 +08:00
KonstantinKondrashov
741e89cbaa
esp_hw_support: Removes efuse dependency
2022-11-25 19:27:33 +08:00
Konstantin Kondrashov
55578295db
Merge branch 'feature/api_to_define_user_mac_addres' into 'master'
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esp_hw_support: Adds APIs to define user own MAC addresses without generation from the base MAC address
Closes IDFGH-5534 and IDFGH-8022
See merge request espressif/esp-idf!21036
2022-11-17 15:26:35 +08:00
KonstantinKondrashov
244cf14ea8
esp_hw_support: Adds APIs to define user own MAC addresses without generation from the base MAC address
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Closes https://github.com/espressif/esp-idf/pull/7261
Closes https://github.com/espressif/esp-idf/issues/9531
2022-11-16 19:23:10 +08:00
Marius Vikhammer
beeef9df2c
hw-support: update C2 chip info to reflect that esp8684 has embedded flash
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Closes https://github.com/espressif/esp-idf/issues/10175
2022-11-14 10:12:32 +08:00
Michael (XIAO Xufeng)
f2aa736c7b
esp32c2: put v2.0 back to development stage
2022-11-03 08:36:23 +00:00
KonstantinKondrashov
1f9260d790
all: Apply new version logic (major * 100 + minor)
2022-11-03 08:36:23 +00:00
Armando
260ee86c37
rtc: united sar peripheral control
2022-10-27 16:51:25 +08:00
jingli
05a2fbe810
esp_hw_support/clk_cali: fix xtal32k error detect
2022-09-21 03:03:25 +00:00
jingli
c70094f64a
esp32c2/clk_cali: fix rtc slow clk cali logic
2022-08-15 16:31:54 +08:00
Jing Li
c25c254666
Merge branch 'feature/further_support_esp32c2_sleep' into 'master'
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esp32c2/sleep: further support sleep for esp32c2 with 26MHz XTAL
Closes IDF-5544
See merge request espressif/esp-idf!19017
2022-08-08 13:26:15 +08:00
jingli
ee3423834e
kconfig: refactor xtal freq kconfig to common configuration item
2022-08-05 19:12:29 +08:00
zlq
7d8f10423e
1.add ldo parameters in efuse table; 2.set ldo dbias based on pvt-efuse; 3.add pll cali stop function; 4. add efuse_ocode
2022-08-05 14:24:51 +08:00
morris
031adc01c4
gpio: add test with -O0
2022-08-02 23:07:06 +08:00
morris
5e50ec1d66
systimer: add helper functions to convert between tick and us
2022-07-25 16:08:52 +08:00
Guillaume Souchere
6005cc9163
hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces
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This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
2022-07-22 00:06:06 +08:00
songruojing
ef813b23fa
rtc: esp32c2 support 26MHz xtal in startup code and rtc_clk.c
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
672e70a023
esp_hw_support: add 26 MHz XTAL option for esp32c2
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Some esp32c2 boards will be produced with a 26 MHz XTAL. This commit
adds the basic Kconfig option for this type of hardware.
Support for CONFIG_ESP32C2_XTAL_FREQ_26 in other areas of IDF will be
implemented in subsequent commits.
2022-07-08 15:04:17 +08:00
Michael (XIAO Xufeng)
a58362a429
Merge branch 'feature/efuse_rev_major_minor' into 'master'
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efuse: Adds major and minor versions
See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f
Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
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support c2 26M/32M xtal for bbpll
Closes IDF-5485
See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
cje
e16165f263
support c2 26M/32M xtal for bbpll
2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
morris
7fd9a91034
dma: move from driver to hw_support
2022-06-28 14:17:12 +08:00
Omar Chebib
8fae0f0753
G0: Support Xtensa targets for G0-only compilation
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G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Omar Chebib
752026a174
Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
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G0: RISC-V targets have now an independent G0 layer
See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
Darian
e213e66ba3
Merge branch 'refactor/esp_hw_support_cpu' into 'master'
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esp_hw_support: Add new esp_cpu.h abstraction
Closes IDF-4769
See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
2fd784c97a
G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h"
2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
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G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b
esp_hw_support: Add esp_cpu.h abstraction and API
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This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:
- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)
Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Darian Leung
556ec30457
esp_hw_support: Rename cpu_util.c to cpu.c
2022-06-14 14:30:57 +08:00
songruojing
03477a59db
rtc_clk: Fix rtc8m calibration failure after cpu/core reset
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1. make sure 8md256 clk is enabled before calibration
2. improve bootloader and application startup 8m, 8md256 enable logic
2022-06-13 17:47:51 +08:00
songruojing
c8752cee6a
clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem
2022-06-13 17:47:50 +08:00
KonstantinKondrashov
ac4c7d99fe
dport: Move DPORT workaround to G0
2022-05-31 13:44:18 +08:00
jingli
9eec740a16
enable external 32k osc for esp32c2
2022-05-27 19:29:29 +08:00
Song Ruo Jing
cf32e49aeb
Merge branch 'refactor/cleanup_rtc_h' into 'master'
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clk_tree: Prework2 of introducing clock subsystem control
Closes IDF-4934
See merge request espressif/esp-idf!17861
2022-05-26 09:16:47 +08:00
Sachin Parekh
9a763f4ff2
esp32c2: Enable IRAM/DRAM split using PMP
2022-05-24 21:36:06 +05:30
songruojing
729d70129a
clk_tree: add initial docs for clock tree
2022-05-24 22:59:51 +08:00
songruojing
a5b09cf015
rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
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soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
songruojing
436085de51
rtc_clk: fix potential "division by zero" in rtc_clk_cpu_freq_mhz_to_config (found by coverity scan)
2022-05-23 13:38:41 +08:00
songruojing
87b917c04a
rtc_clk: Remove the ck8m fpu logic when setting rtc slow clock source, ck8m fpu in sleep logic is now completely handled in sleep_modes.c
2022-05-21 13:13:52 +00:00
Michael (XIAO Xufeng)
adcdcbaa0e
Merge branch 'feat/pm_dbias_refactoring' into 'master'
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pm: refactoring dbias related code
See merge request espressif/esp-idf!17994
2022-05-17 14:42:16 +08:00
Michael (XIAO Xufeng)
6f507d527c
rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
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Sync configuration from other chips
Closes: https://github.com/espressif/esp-idf/issues/8007 , https://github.com/espressif/esp-idf/pull/8089
2022-05-14 22:35:41 +08:00