alex/esp-idf
alex/esp-idf
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21,261 Commits 20 Branches 148 Tags 384 MiB
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83 Commits

Author SHA1 Message Date
Michael (XIAO Xufeng)
d0361a32d7 test: fix the IRAM type conflict issue using heap_caps_malloc 2018-10-25 12:31:44 +08:00
michael
6b180f70ac test: modify the command/address test a bit to test the LSBFIRST feature 2018-10-04 15:03:26 +08:00
Michael (Xiao Xufeng)
4af51833f3 spi_master: add new polling mode to decrease time cost each transaction 2018-09-20 19:46:46 +08:00
Ivan Grokhotkov
fc0c110efd driver: test: fix memset out of bounds in spi_master test 2018-08-29 12:49:15 +08:00
michael
404e99965d spi_master: change high part config to allow transactions of 64 bytes 2018-08-16 18:55:09 +08:00
Michael (XIAO Xufeng)
0aa52057ed spi_master: enable 2 tests in CI 
The test is previously disabled for the requirement of external
connection. Now the signals are connected by internal connections.
Also change the failure logic of the test.
 2018-07-31 18:04:51 +08:00
Michael (XIAO Xufeng)
fb15f970d2 spi_master: change test to test DMA tx/rx in regions like psram 2018-07-31 18:04:50 +08:00
Ivan Grokhotkov
253930acd1 spi_master, ulp: fix aliasing errors in unit tests 2018-07-24 09:54:55 +03:00
Konstantin Kondrashov
32da455384 soc: Fix check_long_hold_gpio and move def to soc 
Fix factory_reset_pin init as input
Move definition a structure rtc_gpio_desc to soc

Closes https://github.com/espressif/esp-idf/issues/2030
 2018-06-22 09:20:27 +05:00
Michael (XIAO Xufeng)
ebfda40b7c refactor(spi): move pin information into soc folder 2018-06-14 11:29:15 +08:00
Angus Gratton
87077a5478 test: Tweaks to reduce variation in CI unit tests 
spi test: Prime the flash cache before each test to minimise flash cache misses.

VFS performance test: Increase the number of runs to minimise influence of an isolated bad run.
 2018-06-08 14:42:44 +10:00
Michael (XIAO Xufeng)
939e5693a5 chore(spi): fix the terms of native to iomux 2018-06-06 06:08:39 +00:00
michael
75cdbcefc7 test(spi): add test for SPI timing 2018-06-06 06:08:39 +00:00
michael
208d993de1 test(spi_master): slightly modify the test 2018-06-06 06:08:39 +00:00
Michael (Xiao Xufeng)
45f8bcf3f8 fix(spi): allow using MISO on GPIO34-39 
Breaking Changes: arguments of ``spicommon_bus_initialize_io`` are changed.

Closes https://github.com/espressif/esp-idf/issues/1736.
 2018-04-12 17:01:38 +08:00
Michael (Xiao Xufeng)
15be0829fa test(spi_master): test spi master speed performance by median value. 
also increase the boundary of SPI limit by a little.
 2018-03-16 16:37:19 +08:00
Michael (Xiao Xufeng)
a151767426 test(spi_master): add performance display for spi master. 2018-02-07 17:50:13 +08:00
michael
13d38f10ee test(spi): internal connection test master with slave for address and command field. 2017-11-17 12:15:19 +08:00
michael
fcd0f52e21 test(spi_master): add test case for 3 DMA issues with internal connection by gpio mux. 
3 issues are:
1. RX buffer not aligned (start and end)
2. not setting rx_buffer
3. setting rx_length != length

also add spi release code here.
 2017-09-27 10:44:28 +08:00
michael
4c9754726f fix(spi_master): fix the command field to make it more intuitive to use. 2017-08-21 20:37:57 +08:00
Ivan Grokhotkov
159a2d01d1 Merge branch 'bugfix/spi_dma' into 'master' 
bugfix(spi_master): fix several issues when using RX DMA

See merge request !1006
 2017-08-16 18:55:25 +08:00
michael
ed1d084aea fix(spi_master): make the address field more intuitive to use. 
The address field should be placed at the highest bits of address and slv_wr_status registers. Instead of breaking the address into two parts and fill in each register, move the address to the highest bits and write to the registers respectively.

Breaking change: if you fill-in the SPI address filed in a previous version in some way and it works correctly, you still have to rewrite the address, in a more intuitive way.
 2017-08-15 14:49:31 +08:00
michael
227b011f6a fix(spi_master): fix SPI master, now able to transfer more than 32 bytes in non-DMA-accessable area. 
apply for internal space to hold these data.
use DMA when it's enabled, no matter long or short.

TW#12226, github#551
 2017-08-14 17:19:57 +08:00
michael
99769f0b00 fix(spi_master): fix the bug that VSPI no respond when host changed 
from HSPI to VSPI, and vice versa.

fix the SPI control bits written wrong in the headers.

TW#12123, Github#477
 2017-07-21 14:50:17 +08:00
Angus Gratton
71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS 
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
 2017-07-10 17:46:03 +08:00
Jeroen Domburg
9134c13c73 Fix SPI master CI test 2017-04-27 14:50:02 +08:00
Jeroen Domburg
4c06dca15c SPI: Small fixes according to MR comments 2017-04-27 11:49:04 +08:00
Jeroen Domburg
e9c372bc2d SPI: Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue. 2017-04-27 11:49:04 +08:00
Jeroen Domburg
76295c7a13 Fix timing adjustment needed for higher speeds of SPI master bus. 2017-03-28 11:31:59 +08:00
antti
f8b5c29346 esp32: add [ignore] tag to some unit test cases for CI 
Add ignore tag on unit test cases that are not supported in CI yet
 2017-01-18 17:08:20 +08:00
Jeroen Domburg
356e01545c Add test for spi clock, fix corner cases) 2017-01-11 16:13:33 +08:00
Jeroen Domburg
ee59fa75f4 Rename SPI Master IO pins to more common terminology, add better explanation to queue_length initialization value 2017-01-11 11:25:56 +08:00
Jeroen Domburg
23455de4c2 Add SPI Master driver, example, test and docs 2017-01-06 14:20:32 +08:00