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test(spi_master): add test case for 3 DMA issues with internal connection by gpio mux.

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3 issues are:
1. RX buffer not aligned (start and end)
2. not setting rx_buffer
3. setting rx_length != length

also add spi release code here.
This commit is contained in:
michael 2017-09-01 18:49:45 +08:00
parent 7d436c9a44
commit fcd0f52e21
1 changed files with 134 additions and 51 deletions
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185
components/driver/test/test_spi_master.c
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@ -261,62 +261,62 @@ TEST_CASE("SPI Master test, interaction of multiple devs", "[spi][ignore]") {
TEST_CASE("SPI Master no response when switch from host1 (HSPI) to host2 (VSPI)", "[spi]")
{
//spi config
spi_bus_config_t bus_config;
spi_device_interface_config_t device_config;
spi_device_handle_t spi;
spi_host_device_t host;
int dma = 1;
//spi config
spi_bus_config_t bus_config;
spi_device_interface_config_t device_config;
spi_device_handle_t spi;
spi_host_device_t host;
int dma = 1;
memset(&bus_config, 0, sizeof(spi_bus_config_t));
memset(&device_config, 0, sizeof(spi_device_interface_config_t));
memset(&bus_config, 0, sizeof(spi_bus_config_t));
memset(&device_config, 0, sizeof(spi_device_interface_config_t));
bus_config.miso_io_num = -1;
bus_config.mosi_io_num = 26;
bus_config.sclk_io_num = 25;
bus_config.quadwp_io_num = -1;
bus_config.quadhd_io_num = -1;
bus_config.miso_io_num = -1;
bus_config.mosi_io_num = 26;
bus_config.sclk_io_num = 25;
bus_config.quadwp_io_num = -1;
bus_config.quadhd_io_num = -1;
device_config.clock_speed_hz = 50000;
device_config.mode = 0;
device_config.spics_io_num = -1;
device_config.queue_size = 1;
device_config.flags = SPI_DEVICE_TXBIT_LSBFIRST | SPI_DEVICE_RXBIT_LSBFIRST;
device_config.clock_speed_hz = 50000;
device_config.mode = 0;
device_config.spics_io_num = -1;
device_config.queue_size = 1;
device_config.flags = SPI_DEVICE_TXBIT_LSBFIRST | SPI_DEVICE_RXBIT_LSBFIRST;
struct spi_transaction_t transaction = {
.flags = SPI_TRANS_USE_TXDATA | SPI_TRANS_USE_RXDATA,
.length = 16,
.tx_buffer = NULL,
.rx_buffer = NULL,
.tx_data = {0x04, 0x00}
};
struct spi_transaction_t transaction = {
.flags = SPI_TRANS_USE_TXDATA | SPI_TRANS_USE_RXDATA,
.length = 16,
.rx_buffer = NULL,
.tx_data = {0x04, 0x00}
};
//initialize for first host
host = 1;
//initialize for first host
host = 1;
TEST_ASSERT(spi_bus_initialize(host, &bus_config, dma) == ESP_OK);
TEST_ASSERT(spi_bus_add_device(host, &device_config, &spi) == ESP_OK);
assert(spi_bus_initialize(host, &bus_config, dma) == ESP_OK);
assert(spi_bus_add_device(host, &device_config, &spi) == ESP_OK);
printf("before first xmit\n");
TEST_ASSERT(spi_device_transmit(spi, &transaction) == ESP_OK);
printf("after first xmit\n");
printf("before first xmit\n");
assert(spi_device_transmit(spi, &transaction) == ESP_OK);
printf("after first xmit\n");
TEST_ASSERT(spi_bus_remove_device(spi) == ESP_OK);
TEST_ASSERT(spi_bus_free(host) == ESP_OK);
assert(spi_bus_remove_device(spi) == ESP_OK);
assert(spi_bus_free(host) == ESP_OK);
//for second host and failed before
host = 2;
TEST_ASSERT(spi_bus_initialize(host, &bus_config, dma) == ESP_OK);
TEST_ASSERT(spi_bus_add_device(host, &device_config, &spi) == ESP_OK);
//for second host and failed before
host = 2;
printf("before second xmit\n");
// the original version (bit mis-written) stucks here.
TEST_ASSERT(spi_device_transmit(spi, &transaction) == ESP_OK);
// test case success when see this.
printf("after second xmit\n");
assert(spi_bus_initialize(host, &bus_config, dma) == ESP_OK);
assert(spi_bus_add_device(host, &device_config, &spi) == ESP_OK);
printf("before second xmit\n");
// the original version (bit mis-written) stucks here.
assert(spi_device_transmit(spi, &transaction) == ESP_OK);
// test case success when see this.
printf("after second xmit\n");
TEST_ASSERT(spi_bus_remove_device(spi) == ESP_OK);
TEST_ASSERT(spi_bus_free(host) == ESP_OK);
}
IRAM_ATTR static uint32_t data_iram[320];
@ -355,11 +355,10 @@ TEST_CASE("SPI Master DMA test, TX and RX in different regions", "[spi]")
};
//Initialize the SPI bus
ret=spi_bus_initialize(HSPI_HOST, &buscfg, 1);
assert(ret==ESP_OK);
TEST_ASSERT(ret==ESP_OK);
//Attach the LCD to the SPI bus
ret=spi_bus_add_device(HSPI_HOST, &devcfg, &spi);
assert(ret==ESP_OK);
TEST_ASSERT(ret==ESP_OK);
static spi_transaction_t trans[6];
int x;
@ -392,17 +391,101 @@ TEST_CASE("SPI Master DMA test, TX and RX in different regions", "[spi]")
trans[5].length = 8*4;
trans[5].flags = SPI_TRANS_USE_RXDATA | SPI_TRANS_USE_TXDATA;
//Queue all transactions.
for (x=0; x<6; x++) {
ret=spi_device_queue_trans(spi,&trans[x], portMAX_DELAY);
assert(ret==ESP_OK);
TEST_ASSERT(ret==ESP_OK);
}
for (x=0; x<6; x++) {
spi_transaction_t* ptr;
ret=spi_device_get_trans_result(spi,&ptr, portMAX_DELAY);
assert(ret==ESP_OK);
assert(ptr = trans+x);
TEST_ASSERT(ret==ESP_OK);
TEST_ASSERT(ptr = trans+x);
}
TEST_ASSERT(spi_bus_remove_device(spi) == ESP_OK);
TEST_ASSERT(spi_bus_free(HSPI_HOST) == ESP_OK);
}
static inline void int_connect( uint32_t gpio, uint32_t sigo, uint32_t sigi )
{
gpio_matrix_out( gpio, sigo, false, false );
gpio_matrix_in( gpio, sigi, false );
}
//this part tests 3 DMA issues in master mode, full-duplex in IDF2.1
// 1. RX buffer not aligned (start and end)
// 2. not setting rx_buffer
// 3. setting rx_length != length
TEST_CASE("SPI Master DMA test: length, start, not aligned", "[spi]")
{
uint8_t tx_buf[320]={0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0xaa, 0xcc, 0xff, 0xee, 0x55, 0x77, 0x88, 0x43};
uint8_t rx_buf[320];
esp_err_t ret;
spi_device_handle_t spi;
spi_bus_config_t buscfg={
.miso_io_num=PIN_NUM_MISO,
.mosi_io_num=PIN_NUM_MOSI,
.sclk_io_num=PIN_NUM_CLK,
.quadwp_io_num=-1,
.quadhd_io_num=-1
};
spi_device_interface_config_t devcfg={
.clock_speed_hz=10*1000*1000, //Clock out at 10 MHz
.mode=0, //SPI mode 0
.spics_io_num=PIN_NUM_CS, //CS pin
.queue_size=7, //We want to be able to queue 7 transactions at a time
.pre_cb=NULL,
};
//Initialize the SPI bus
ret=spi_bus_initialize(HSPI_HOST, &buscfg, 1);
TEST_ASSERT(ret==ESP_OK);
//Attach the LCD to the SPI bus
ret=spi_bus_add_device(HSPI_HOST, &devcfg, &spi);
TEST_ASSERT(ret==ESP_OK);
//do internal connection
int_connect( PIN_NUM_MOSI, HSPID_OUT_IDX, HSPIQ_IN_IDX );
memset(rx_buf, 0x66, 320);
for ( int i = 0; i < 8; i ++ ) {
memset( rx_buf, 0x66, sizeof(rx_buf));
spi_transaction_t t = {};
t.length = 8*(i+1);
t.rxlength = 0;
t.tx_buffer = tx_buf+2*i;
t.rx_buffer = rx_buf + i;
if ( i == 1 ) {
//test set no start
t.rx_buffer = NULL;
} else if ( i == 2 ) {
//test rx length != tx_length
t.rxlength = t.length - 8;
}
spi_device_transmit( spi, &t );
for( int i = 0; i < 16; i ++ ) {
printf("%02X ", rx_buf[i]);
}
printf("\n");
if ( i == 1 ) {
// no rx, skip check
} else if ( i == 2 ) {
//test rx length = tx length-1
TEST_ASSERT( memcmp(t.tx_buffer, t.rx_buffer, t.length/8-1)==0 );
} else {
//normal check
TEST_ASSERT( memcmp(t.tx_buffer, t.rx_buffer, t.length/8)==0 );
}
}
TEST_ASSERT(spi_bus_remove_device(spi) == ESP_OK);
TEST_ASSERT(spi_bus_free(HSPI_HOST) == ESP_OK);
}