Commit Graph

53 Commits

Author SHA1 Message Date
wuzhenghui
d07bd19ba6
fix(esp_system): fix uart clock disabled in driver cause esp_restart stuck 2023-12-06 10:36:48 +08:00
wuzhenghui
3207599b6d fix(esp_system): increase esp32h2 slow clock calibration timeout watchdog threshold 2023-11-03 19:08:28 +08:00
Marius Vikhammer
73954ab9e8 feat(esp-system): moved common arch files out to common cmakelist 2023-08-29 16:14:43 +08:00
morris
71cf16ec01 feat(gptimer): use RCC atomic block to enable/reset peripheral 2023-08-22 17:05:35 +08:00
Alexey Lapshin
4df3ff619e feat(esp_system): implement hw stack guard for riscv chips
- add hardware stack guard based on assist-debug module
- enable hardware stack guard by default
- disable hardware stack guard for freertos ci.release test
- refactor rtos_int_enter/rtos_int_exit to change SP register inside them
- fix panic_reason.h header for RISC-V
- update docs to include information about the new feature
2023-07-01 16:27:40 +00:00
Lou Tianhao
b5a293ab69 Power Management: support RC32K or Crystal32K powered down 2023-06-26 21:05:16 +08:00
morris
06b1e10273 Merge branch 'feature/reset_mcpwm_in_restart' into 'master'
mcpwm: reset peripheral in restart, panic and halt

Closes IDFGH-10047

See merge request espressif/esp-idf!23591
2023-05-09 16:44:55 +08:00
morris
083d9e7c0f mcpwm: reset peripheral in restart, panic and halt
mcpwm is commonly used in power eletronic area, when restart happens,
make sure the mcpwm generator is not working.

closes https://github.com/espressif/esp-idf/issues/11324
2023-05-06 15:58:58 +08:00
Armando
dbf3612d6d spi_flash: replace flash clock src change API with mspi timing API 2023-05-04 17:05:35 +08:00
Nebojsa Cvetkovic
67e9db7cf5 esp_system: Add reset reasons for USB_UART and USB_JTAG
Merges https://github.com/espressif/esp-idf/pull/10950
2023-04-19 10:09:19 +08:00
Marius Vikhammer
db059b155a esp-system: move uncessary IRAM functions to flash 2023-04-10 11:10:28 +08:00
Cao Sen Miao
8b5f4f54fc system: Clean up code, some single core chips have useless dual-core code 2023-03-13 10:27:57 +08:00
Cao Sen Miao
bc655a6890 spi_flash: Allow clock frequency up to 64M, and make it default on ESP32H2 2023-03-10 11:39:53 +08:00
Gustavo Henrique Nihei
3cbac3dd1d esp_system: Ensure TIMG0 clock is always enabled during normal operation
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-06 04:58:11 +00:00
harshal.patil
04cc562180 mbedtls: enable RSA support for esp32h2 2023-03-01 14:18:57 +05:30
Song Ruo Jing
8486a2c3ad Merge branch 'bugfix/revert_rtc_clock_bbpll_power_on_with_usb' into 'master'
usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep

Closes IDFGH-6887

See merge request espressif/esp-idf!20973
2023-02-27 23:18:54 +08:00
Song Ruo Jing
1a66459b44 usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep
1. Remove RTC_CLOCK_BBPLL_POWER_ON_WITH_USB Kconfig option
   During sleep, BBPLL clock always gets disabled
   esp_restart does not disable BBPLL clock, so that first stage bootloader log can be printed
2. Add a new Kconfig option PM_NO_AUTO_LS_ON_USJ_CONNECTED
   When this option is selected, IDF will constantly monitor USB CDC port connection status.
   As long as it gets connected to a HOST, automatic light-sleep will not happen.

Closes https://github.com/espressif/esp-idf/issues/8507
2023-02-27 12:10:49 +08:00
Armando
4997689de5 cache: support h2 and c6 cache error 2023-02-24 16:16:46 +08:00
Song Ruo Jing
2c2a62e323 clk_tree: Add basic clock support for esp32h2
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration

Remove FPGA build for esp32h2
2023-02-20 17:15:02 +08:00
morris
195f6b99ad rmt: expose private API to get channel ID
Closes https://github.com/espressif/esp-idf/issues/10596
2023-02-16 11:37:25 +08:00
Song Ruo Jing
981d6a67b0 clk: Add basic clock support for esp32h2 2023-01-03 11:00:32 +08:00
Cao Sen Miao
8cc9260f86 ESP32H2: Add system support for ESP32H2 2022-12-07 11:38:51 +08:00
Cao Sen Miao
86aa4df5b5 ESP32-H2: Introduce new target for ESP32H2 2022-11-23 14:38:05 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
wuzhenghui
6b96534c68 bugfix: esprv_intc_int_set_type() should not use bitmap parameter 2022-10-14 11:31:22 +08:00
jingli
60c1811433 esp_hw_support/clk_cali: remove redundant check for cali value 2022-09-21 03:03:25 +00:00
Darian Leung
0c97fbd5ba riscv: Remove redundant riscv_interrupts.h header
This commit removes the riscv_interrupts.h header is it has become redundant. The previously
exposed API has been handled as follows:

- "riscv_interrupt_enable()" and "riscv_interrupt_disable()" have been removed. These functions
  were declarations only and never had any implementation.
- "riscv_global_interrupts_enable()" and "riscv_global_interrupts_disable()" renamed to
  "rv_utils_intr_global_enable()" and "rv_utils_intr_global_disable()" respectively and now
  placed in rv_utils.h
2022-09-16 16:45:43 +08:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
2022-07-22 00:06:06 +08:00
Darian Leung
a8a3756b38 hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:

- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead

Also updated soc_hal.h as follows:

- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.

This commit also updates the XCHAL_ERRATUM_572 workaround by

- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
2022-06-14 14:40:03 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
morris
4352c39e3e Merge branch 'feature/cache_c2_support' into 'master'
cache: access error & illegal error ll functions

Closes IDF-3820

See merge request espressif/esp-idf!18203
2022-05-30 11:40:11 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
Armando
8532d09259 cache: access error & illegal error ll functions 2022-05-23 15:00:47 +08:00
Marius Vikhammer
d2872095f9 soc: moved kconfig options out of the target component.
Moved the following kconfig options out of the target component:
 * CONFIG_ESP*_DEFAULT_CPU_FREQ* -> esp_system
 * ESP*_REV_MIN -> esp_hw_support
 * ESP*_TIME_SYSCALL -> newlib
 * ESP*_RTC_* -> esp_hw_support

Where applicable these target specific konfig names were merged into
a single common config, e.g;
CONFIG_ESP*_DEFAULT_CPU_FREQ -> CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
2022-04-21 12:09:43 +08:00
Marius Vikhammer
ca3c056ac9 kconfig: replace deprecated options with new values 2022-03-15 16:28:53 +08:00
Marius Vikhammer
bb88338118 system: move kconfig options out of target component
Moved the following kconfig options out of the target component:
 * ESP32_X_BROWNOUT_* -> esp_system
 * ESP32_X_DEBUG_OCDAWARE -> esp_system
 * APP_NO_BLOBS -> build type (main kconfig)
2022-03-02 01:22:26 +00:00
Song Ruo Jing
40d1102ca5 Merge branch 'bugfix/cpu_reset_perip_clk_disable' into 'master'
esp_system: change range comparsion for reset reason to specifc cpu reset reason comparison

See merge request espressif/esp-idf!15492
2022-02-10 03:44:15 +00:00
songruojing
c1dedb33fa esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset 2022-02-09 15:54:34 +08:00
morris
ef00bd59dc esp_rom: extract int matrix route and cpu ticks getter 2022-02-09 13:52:20 +08:00
Sudeep Mohanty
e22b4007d3 esp_hw_support: Removed deprecated CPU util functions
The following files were deleted:
- components/esp_hw_support/include/soc/cpu.h
- components/soc/esp32s3/include/soc/cpu.h

The following functions are deprecated:
- get_sp()

The following functions declared in soc/cpu.h are now moved to esp_cpu.h:
- esp_cpu_configure_region_protection()

The following functions declared in soc/cpu.h are now moved to components/xtensa/include/esp_cpu_utils.h:
- esp_cpu_process_stack_pc()

All files with soc/cpu.h inclusion are updated to include esp_cpu.h instead.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-28 16:58:37 +05:30
Cao Sen Miao
7f0a746e6a move brownout trax cache_int_err to private folder 2021-11-26 18:27:53 +08:00
Cao Sen Miao
c794808297 cache_err_int: delete old headers 2021-11-26 14:56:30 +08:00
Cao Sen Miao
eddc196081 esp_clk: refactor target/clk.h to private/esp_clk.h 2021-11-26 14:56:30 +08:00
wuzhenghui
388615add0 update esp32h2beta2 chip_id to 14 2021-11-24 12:30:43 +08:00
morris
16677b0d3c global: make periph enable/disable APIs private
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
2021-11-08 10:37:47 +08:00
Alexey Gerenkov
bb9cd84cdc debug_stubs: Refactor and add support for RISCV 2021-11-04 01:33:24 +03:00
sly
11dfd802e0 esp32h2: add rtc clock support 2021-08-26 11:25:39 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support
brownout init fixed
2021-08-25 11:02:47 +08:00
Konstantin Kondrashov
29f581fc70 freertos(esp32s3): SysTick uses systimer 2021-08-04 20:33:44 +08:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00