Commit Graph

75 Commits

Author SHA1 Message Date
wuzhenghui
e7046e2abf
fix(esp_hw_support): fix bad logic in esp_perip_clk_init 2024-04-12 14:08:07 +08:00
wuzhenghui
4a64d2fe2c change(hal): control PAU bus clock by hal layer 2024-03-29 00:36:46 +08:00
Marius Vikhammer
42fc463c81 fix(console): fixed CONSOLE_NONE not working on C2/C3 2024-03-26 13:39:10 +08:00
Darian Leung
a77e5cc718
refactor(hal/usb): Remove usb_fsls_phy_ll.h
For targets that only contain a USJ peripheral (and not a DWC OTG), their
'usb_fsls_phy_ll.h' headers only contain a single function
('usb_fsls_phy_ll_int_jtag_enable()') whose feature is already covered by
functions in 'usb_serial_jtag_ll.h'. Thus, this header is redundant.

This commit does the following:

- Remove 'usb_fsls_phy_ll.h' for targets that only contain a USJ peripheral
- Rename 'usb_fsls_phy_[hal|ll].[h|c]' to `usb_wrap_[hal|ll].[h|c]` for targets
that contain a DWC OTG peripheral. This better reflects the underlying peripheral
that the LL header accesses.
2024-03-18 19:23:43 +08:00
Wu Zheng Hui
5a682c3bbb Merge branch 'feature/optimize_chips_active_power' into 'master'
feat(system): Optimize the power consumption of esp32h2 and esp32c6 in the active state

Closes IDF-5658

See merge request 
2024-03-14 12:08:33 +08:00
Konstantin Kondrashov
3f89072af1 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
wuzhenghui
9e8e20227f
feat(system): disable RNG module clock by default for save power 2024-03-12 10:10:41 +08:00
wuzhenghui
2a251982fc
feat(system): add option to allow user disable assist_debug module to save power 2024-03-12 10:10:40 +08:00
wuzhenghui
b0fa4565a1
feat(system): add option to allow user disable USJ module to save power 2024-03-12 10:10:36 +08:00
wuzhenghui
85b246ac88
feat(system): gate the debug clock source by default for esp32c6 and esp32h2 2024-03-07 19:26:39 +08:00
wuzhenghui
f5707c6ab8
feat(system): gate the REF_TICK clock by default for esp32c6 and esp32h2 2024-03-07 19:26:38 +08:00
wuzhenghui
60e985e7af
feat(system): gate the LP peripheral clock by default for esp32c6 and esp32h2 2024-03-07 19:26:38 +08:00
wuzhenghui
0528c8b4f4
feat(system): gate the HP peripheral clock by default for esp32c6 and esp32h2 2024-03-07 19:26:37 +08:00
Marius Vikhammer
c0a2043562 fix(system): update reset reasons for C6 and H2 2024-02-20 12:27:09 +08:00
liuning
3fa9c578f9 fix(clk): clear all lpclk source at clk init 2024-02-07 13:49:18 +08:00
Marius Vikhammer
06850e0e1e refactor(system): removed esp_system from astyle ignore list and reformated it 2024-01-30 15:17:15 +08:00
Song Ruo Jing
cf93777077 refactor(rtc): move soc/rtc.h from soc to esp_hw_support component
Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
2024-01-25 19:15:33 +08:00
Omar Chebib
102d5bbf72 refactor(riscv): added a new API for the interrupts 2024-01-18 16:36:53 +08:00
Cao Sen Miao
6768805d20 fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions,
Closes https://github.com/espressif/esp-idf/issues/12958
2024-01-18 10:51:51 +08:00
Marius Vikhammer
9f1d001849 Merge branch 'feat/cache_error_c6_h2' into 'master'
fix(panic): fixed cache error being reported as illegal instruction

Closes IDF-6398, IDF-5657, IDF-7015, and IDF-6733

See merge request 
2023-12-21 10:32:06 +08:00
Cao Sen Miao
b77b17efd2 fix(bod): Fix BOD threshold value on ESP32H2 2023-12-11 16:41:52 +08:00
Marius Vikhammer
9a6de4cb3e fix(panic): fixed cache error being reported as illegal instruction
On riscv chips accessing cache mapped memory regions over the ibus would
result in an illegal instructions exception triggering faster than the cache
error interrupt/exception.

Added a cache error check in the panic handler, if any cache errors are active
the panic handler will now report a cache error, even if the trigger exception
was a illegal instructions.
2023-12-04 10:49:00 +08:00
wuzhenghui
04fcfff5e0
fix(esp_system): fix uart clock disabled in driver cause esp_restart stuck 2023-11-27 12:06:07 +08:00
wuzhenghui
8bc69e0354 fix(esp_system): increase esp32h2 slow clock calibration timeout watchdog threshold 2023-10-23 21:24:56 +08:00
Marius Vikhammer
73954ab9e8 feat(esp-system): moved common arch files out to common cmakelist 2023-08-29 16:14:43 +08:00
morris
71cf16ec01 feat(gptimer): use RCC atomic block to enable/reset peripheral 2023-08-22 17:05:35 +08:00
Alexey Lapshin
4df3ff619e feat(esp_system): implement hw stack guard for riscv chips
- add hardware stack guard based on assist-debug module
- enable hardware stack guard by default
- disable hardware stack guard for freertos ci.release test
- refactor rtos_int_enter/rtos_int_exit to change SP register inside them
- fix panic_reason.h header for RISC-V
- update docs to include information about the new feature
2023-07-01 16:27:40 +00:00
Lou Tianhao
b5a293ab69 Power Management: support RC32K or Crystal32K powered down 2023-06-26 21:05:16 +08:00
morris
06b1e10273 Merge branch 'feature/reset_mcpwm_in_restart' into 'master'
mcpwm: reset peripheral in restart, panic and halt

Closes IDFGH-10047

See merge request 
2023-05-09 16:44:55 +08:00
morris
083d9e7c0f mcpwm: reset peripheral in restart, panic and halt
mcpwm is commonly used in power eletronic area, when restart happens,
make sure the mcpwm generator is not working.

closes https://github.com/espressif/esp-idf/issues/11324
2023-05-06 15:58:58 +08:00
Armando
dbf3612d6d spi_flash: replace flash clock src change API with mspi timing API 2023-05-04 17:05:35 +08:00
Nebojsa Cvetkovic
67e9db7cf5 esp_system: Add reset reasons for USB_UART and USB_JTAG
Merges https://github.com/espressif/esp-idf/pull/10950
2023-04-19 10:09:19 +08:00
Marius Vikhammer
db059b155a esp-system: move uncessary IRAM functions to flash 2023-04-10 11:10:28 +08:00
Cao Sen Miao
8b5f4f54fc system: Clean up code, some single core chips have useless dual-core code 2023-03-13 10:27:57 +08:00
Cao Sen Miao
bc655a6890 spi_flash: Allow clock frequency up to 64M, and make it default on ESP32H2 2023-03-10 11:39:53 +08:00
Gustavo Henrique Nihei
3cbac3dd1d esp_system: Ensure TIMG0 clock is always enabled during normal operation
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-06 04:58:11 +00:00
harshal.patil
04cc562180 mbedtls: enable RSA support for esp32h2 2023-03-01 14:18:57 +05:30
Song Ruo Jing
8486a2c3ad Merge branch 'bugfix/revert_rtc_clock_bbpll_power_on_with_usb' into 'master'
usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep

Closes IDFGH-6887

See merge request 
2023-02-27 23:18:54 +08:00
Song Ruo Jing
1a66459b44 usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep
1. Remove RTC_CLOCK_BBPLL_POWER_ON_WITH_USB Kconfig option
   During sleep, BBPLL clock always gets disabled
   esp_restart does not disable BBPLL clock, so that first stage bootloader log can be printed
2. Add a new Kconfig option PM_NO_AUTO_LS_ON_USJ_CONNECTED
   When this option is selected, IDF will constantly monitor USB CDC port connection status.
   As long as it gets connected to a HOST, automatic light-sleep will not happen.

Closes https://github.com/espressif/esp-idf/issues/8507
2023-02-27 12:10:49 +08:00
Armando
4997689de5 cache: support h2 and c6 cache error 2023-02-24 16:16:46 +08:00
Song Ruo Jing
2c2a62e323 clk_tree: Add basic clock support for esp32h2
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration

Remove FPGA build for esp32h2
2023-02-20 17:15:02 +08:00
morris
195f6b99ad rmt: expose private API to get channel ID
Closes https://github.com/espressif/esp-idf/issues/10596
2023-02-16 11:37:25 +08:00
Song Ruo Jing
981d6a67b0 clk: Add basic clock support for esp32h2 2023-01-03 11:00:32 +08:00
Cao Sen Miao
8cc9260f86 ESP32H2: Add system support for ESP32H2 2022-12-07 11:38:51 +08:00
Cao Sen Miao
86aa4df5b5 ESP32-H2: Introduce new target for ESP32H2 2022-11-23 14:38:05 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
wuzhenghui
6b96534c68 bugfix: esprv_intc_int_set_type() should not use bitmap parameter 2022-10-14 11:31:22 +08:00
jingli
60c1811433 esp_hw_support/clk_cali: remove redundant check for cali value 2022-09-21 03:03:25 +00:00
Darian Leung
0c97fbd5ba riscv: Remove redundant riscv_interrupts.h header
This commit removes the riscv_interrupts.h header is it has become redundant. The previously
exposed API has been handled as follows:

- "riscv_interrupt_enable()" and "riscv_interrupt_disable()" have been removed. These functions
  were declarations only and never had any implementation.
- "riscv_global_interrupts_enable()" and "riscv_global_interrupts_disable()" renamed to
  "rv_utils_intr_global_enable()" and "rv_utils_intr_global_disable()" respectively and now
  placed in rv_utils.h
2022-09-16 16:45:43 +08:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
2022-07-22 00:06:06 +08:00