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17,072 Commits 20 Branches 148 Tags 384 MiB
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Commit Graph

318 Commits

Author SHA1 Message Date
Angus Gratton
fa2946d651 Merge branch 'feature/support_esp32s3_beta_3' into 'master' 
Support ESP32S3 beta 3 target

Closes IDF-2908

See merge request espressif/esp-idf!12661
 2021-03-23 10:17:58 +00:00
Marius Vikhammer
2aead8ba57 Support ESP32S3 Beta 3 target 
Update ROM API. Port changes from bringup branch.
 2021-03-18 10:24:22 +08:00
KonstantinKondrashov
a90f29fced wdt: Updates 2021-03-18 02:31:28 +08:00
Angus Gratton
6a29b45bd4 secure boot v2: Fix issue checking multiple signature blocks on OTA update 2021-03-15 12:30:20 +00:00
Angus Gratton
d709631393 secure boot: Add boot check for SBV2 "check app signature on update" 
As this mode uses the public keys attached to the existing app's signatures to
verify the next app, checking that a signature block is found on boot prevents
the possibility of deploying a non-updatable device from the factory.
 2021-03-15 12:30:20 +00:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot) 
- ESP32 ECO3, ESP32-S2/C3/S3
 2021-03-15 12:30:20 +00:00
Angus Gratton
fd164b82b6 Merge branch 'refactor/move_from_xtensa' into 'master' 
Movements from xtensa

Closes IDF-2164

See merge request espressif/esp-idf!10556
 2021-03-11 00:24:25 +00:00
Angus Gratton
6f362b9383 bootloader: Add config options to skip validation of app for minimum boot time 2021-03-10 14:00:46 +11:00
Angus Gratton
32ea7dc812 Merge branch 'feature/bootloader_disable_logs_unnecessary_warnings' into 'master' 
bootloader: Disables unnecessary warning logs when invalid magic byte

Closes IDF-1900

See merge request espressif/esp-idf!12514
 2021-03-09 06:28:46 +00:00
Angus Gratton
d6f4d99d93 core system: Fix warnings in compilation when assertions are disabled 
Adds a CI config for hello world that sets this, to catch future regressions
 2021-03-03 10:26:57 +11:00
KonstantinKondrashov
87aeef65a8 bootloader: Disables unnecessary warning logs when invalid magic byte 2021-03-01 20:34:54 +08:00
Renz Bagaporo
0f03f450ff esp_hw_support: create esp_cpu 
Create a esp_cpu header that contains CPU-related functions and
utilities.
 2021-02-26 13:34:29 +08:00
Angus Gratton
cbc58b85e2 Merge branch 'feature/adds_check_in_app_that_flash_enc_is_on' into 'master' 
bootloader: Adds a check that app is run under FE

Closes IDF-640

See merge request espressif/esp-idf!12368
 2021-02-25 22:39:13 +00:00
KonstantinKondrashov
90f2d3199a secure_boot: Checks secure boot efuses 
ESP32 V1 and V2 - protection bits.
ESP32xx V2: revoke bits, protection bits

- refactor efuse component
- adds some APIs for esp32 chips as well as for esp32xx chips
 2021-02-23 03:56:21 +08:00
KonstantinKondrashov
11a2f2acd3 bootloader: Adds a check that app is run under FE 2021-02-15 20:33:50 +08:00
Angus Gratton
2c39010b3b Merge branch 'bugfix/anti_rollback_without_test_app' into 'master' 
bootloader: Anti-rollback mode doesn't run test_app

See merge request espressif/esp-idf!12225
 2021-02-09 14:16:51 +08:00
Michael (XIAO Xufeng)
423a5458dc Merge branch 'bugfix/support_new_BYflash_chip_boot' into 'master' 
spi_flash: add external flash support on esp32c3

Closes IDF-2650, IDF-2651, and IDF-2399

See merge request espressif/esp-idf!12121
 2021-02-05 20:03:24 +08:00
Cao Sen Miao
cc1c6c30be flash: check boya chip support 2021-02-04 14:44:50 +08:00
KonstantinKondrashov
25ac1d4d28 bootloader: Anti-rollback mode doesn't run test_app 
- Cmake shows an error if the partition table has a test app.
- BOOTLOADER_APP_TEST depends on !BOOTLOADER_APP_ANTI_ROLLBACK.
- Bootloader does not boot the test app if secure version is low.

Closes: https://www.esp32.com/viewtopic.php?f=13&t=19164&p=71302#p71302
 2021-02-01 23:24:23 +08:00
KonstantinKondrashov
3ed226c362 efuse(esp32c3): Adds getting chip_revision and chip_pkg 2021-01-25 19:37:40 +08:00
Cao Sen Miao
9905da46e0 spi_flash: Add auto suspend mode on esp32c3 2021-01-25 11:14:02 +08:00
Angus Gratton
a7da0c894b Merge branch 'feature/c3_master_flash_enc_support' into 'master' 
flash encryption: merge C3 flash encryption changes to master

See merge request espressif/esp-idf!12040
 2021-01-22 12:58:38 +08:00
Angus Gratton
fe8a891de9 Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master' 
bootloader/esp32c3: Support secure boot

Closes IDF-2115

See merge request espressif/esp-idf!11797
 2021-01-21 08:42:49 +08:00
KonstantinKondrashov
88c5fe49b8 soc: Adds a soc_caps define for all chips to define the number of boot key digests 2021-01-19 20:51:13 +08:00
KonstantinKondrashov
98f726fa4b bootloader/esp32c3: Adds secure boot (not yet supported) 2021-01-19 20:51:13 +08:00
Marius Vikhammer
03fa63b0c9 bootloader: add flash encryption support for C3 
Adds flash encryption support for C3 and updates docs for S2 & C3
 2021-01-18 14:10:54 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
fuzhibo
312a0ad6c1 fix: support bootloader random enable for esp32c3 2021-01-11 14:41:09 +08:00
Angus Gratton
c535d569aa Merge branch 'bugfix/secure_boot_sig_failed_crash' into 'master' 
secure boot: Fix crash if signature verification fails in app

Closes IDFGH-4376

See merge request espressif/esp-idf!11846
 2021-01-08 16:23:29 +08:00
Angus Gratton
7069736c2a Merge branch 'feature/bootloader_uses_efuse_keys_api' into 'master' 
bootloader: Add using of efuse APIs for keys, purposes, wr/rd-protection bits

See merge request espressif/esp-idf!11110
 2021-01-08 11:29:50 +08:00
Konstantin Kondrashov
fbba2cb356 bootloader/esp32s2: Add using of efuse APIs for keys, purposes, wr/rd-protection bits for flash encryption, secure boot 2021-01-08 11:29:46 +08:00
Morozov-5F
a8837aa378 secure boot v2: Fix crash if signature verification fails in app 
sha_handle is "finished" when verify_secure_boot_signature() returns and
should be nulled out.

Alternative version of fix submitted in https://github.com/espressif/esp-idf/pull/6210

Closes https://github.com/espressif/esp-idf/pull/6210

Signed-off-by: Angus Gratton <angus@espressif.com>
 2020-12-31 14:43:47 +05:30
Marius Vikhammer
68608f804c esp32c3: Misc fixes needed to build & run 2020-12-31 15:20:05 +11:00
Marius Vikhammer
eb788deb03 esp_hw_support: merge C3 changes to master 
Merge RTC related C3 changes to master
 2020-12-30 12:20:41 +08:00
Angus Gratton
7a40b1695c Merge branch 'feature/esp32c3_small_changes' into 'master' 
esp32c3: Merge small target support changes

Closes IDF-2361

See merge request espressif/esp-idf!11714
 2020-12-24 12:36:12 +08:00
Marius Vikhammer
4ff8c7ae98 esp_rom/esp_system: Add flag for ROM multiple UART output, esp32c3 console 
From internal commit 6d894813
 2020-12-24 14:18:01 +11:00
Angus Gratton
adbf182bc5 bootloder_support: esp32c3 only supports XTS-AES-128 flash encryption 2020-12-24 13:40:01 +11:00
Supreet Deshpande
c4cf6d6d26 Secure boot v2: Fixes the issue of passing the flash calculated digest for ota verification. 2020-12-21 11:32:37 +05:30
Supreet Deshpande
e517b4953f Secure Boot v2: Fix the double padding of the image length during flash encryption 
Fixes https://github.com/espressif/esp-idf/issues/6236
 2020-12-21 11:32:37 +05:30
morris
3f287800eb bootloader_support: added esp32-c3 support 2020-12-11 11:45:10 +08:00
Ivan Grokhotkov
89d39308a0 bootloader: avoid printing load addresses with '0x' 
Since idf_monitor decodes anything that looks like a code address and
starts with 0x, bootloader logs often get annotated with function
names such as WindowOverflow and other random and scary looking things
unrelated to the issue the user is facing. Print the addresses without
0x to avoid confusion by decoded function names. Print hexadecimal
size with 'h' suffix to distinguish it from the decimal value that
follows.
 2020-12-02 16:33:43 +01:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Supreet Deshpande
73d1be4281 Secure Boot V2: Fix an issue leading to manual enablement of Secure Boot v2. 
Fixes https://github.com/espressif/esp-idf/issues/6050
 2020-11-23 06:52:44 +00:00
Angus Gratton
420aef1ffe Updates for riscv support 
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
 2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit) 
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
 2020-11-11 07:36:35 +00:00
morris
9de6cba434 ci: add more build test for esp32-s3 2020-10-27 17:22:17 +08:00
Michael (XIAO Xufeng)
8926216723 Merge branch 'bugfix/esp32s2_adc_rng_registers' into 'master' 
esp32s2: Use regi2c registers to enable bootloader RNG

See merge request espressif/esp-idf!10941
 2020-10-26 13:55:05 +08:00
Angus Gratton
57d6026f97 Merge branch 'feature/efuse_support_for_esp32s3' into 'master' 
efuse: Adds support for esp32-s3 chip

See merge request espressif/esp-idf!10491
 2020-10-22 13:53:01 +08:00
Angus Gratton
639e97437f esp32s2: Use regi2c registers to enable bootloader RNG 2020-10-22 14:39:59 +11:00
Angus Gratton
4504318a28 Merge branch 'feature/esp32s2_bootloader_random' into 'master' 
bootloader_support: Enable RNG entropy source for ESP32-S2

Closes IDF-1347

See merge request espressif/esp-idf!8965
 2020-10-19 07:12:59 +08:00