Commit Graph

3022 Commits

Author SHA1 Message Date
Jiang Jiang Jian
2b089968fe Merge branch 'bugfix/fix_ble_rx_performance_for_2_1' into 'release/v2.1'
component/bt : optimze ble rx performance

See merge request !1668
2018-01-17 19:28:10 +08:00
Tian Hao
e5066ed5cb component/bt : optimze ble rx performance 2018-01-16 08:53:51 +00:00
Jiang Jiang Jian
dcf1db17f7 Merge branch 'cherry-pick-1c718330' into 'release/v2.1'
cherry-pick 'bugfix/remove_at_build_from_ci' into 'release/v2.1'

See merge request !1817
2018-01-16 16:45:27 +08:00
Ivan Grokhotkov
43a04ebcf1 Merge branch 'bugfix/remove_at_build_from_ci' into 'master'
CI: remove build at

See merge request !1171
2018-01-16 15:10:16 +08:00
Jiang Jiang Jian
8bca703467 Merge branch 'bugfix/lwip_send_timeout_v2.1' into 'release/v2.1'
match sys tick with lwip_send_timeout

See merge request !1546
2017-11-16 17:40:48 +08:00
zhangyanjiao
0f9925cfc8 match sys tick with lwip_send_timeout 2017-11-16 11:58:16 +08:00
Jiang Jiang Jian
c092079587 Merge branch 'bugfix/btdm_smp_compile_err' into 'release/v2.1'
component/bt: Fix ble compile error when close the SMP module.

See merge request !1541
2017-11-16 11:31:07 +08:00
Jiang Jiang Jian
bb309f0acf Merge branch 'bugfix/fix_airkiss_macro_error_v2.1' into 'release/v2.1'
fix an airkiss typo error

See merge request !1533
2017-11-15 21:31:25 +08:00
yulong
ebc8877b75 component/bt: Fix ble compile error when close the SMP module. 2017-11-15 21:13:12 +08:00
XiaXiaotian
11613ba7a7 fix an airkiss typo error 2017-11-15 14:10:04 +08:00
Ivan Grokhotkov
5af843f61b Merge branch 'bugfix/v2.1_rtc_bias_and_restart' into 'release/v2.1'
Cherry-pick: increase core voltage for 80M flash, esp_restart fix

See merge request !1512
2017-11-09 21:09:40 +08:00
Jiang Jiang Jian
a237327eff Merge branch 'feature/tw16227_add_fix_rate_api_2.1' into 'release/v2.1'
esp32: add fix rate api

See merge request !1509
2017-11-09 18:47:09 +08:00
Ivan Grokhotkov
4f603017bd soc/rtc: raise core voltage when 80MHz flash frequency is used
To achieve reliable operation with GD flash at 80MHz, need to raise
core voltage.
This causes the following current consumption increase:

At 80MHz: from 29mA to 33mA
At 160MHz: from 41mA to 47mA

Test conditions: 2 cores running code from IRAM, remaining peripherals
clock gated.
2017-11-09 16:11:59 +08:00
Ivan Grokhotkov
e324707cc8 esp_restart: fix possible race while stalling other CPU, enable WDT early
Previously esp_restart would stall the other CPU before enabling RTC_WDT.
If the other CPU was executing an s32c1i instruction, the lock signal
from CPU to the arbiter would still be held after CPU was stalled. If
the CPU running esp_restart would then try to access the same locked
memory pool, it would be stuck, because lock signal would never be
released.

With this change, esp_restart resets the other CPU before stalling it.
Ideally, we would want to reset the CPU and keep it in reset, but the
hardware doesn't have such feature for PRO_CPU (it is possible to hold
APP_CPU in reset using DPORT register). Given that ROM code will not use
s32c1i in the first few hundred cycles, doing reset and then stall seems
to be safe.

In addition to than, RTC_WDT initialization is moved to the beginning of
the function, to prevent possible lock-up if CPU stalling still has any
issue.
2017-11-09 16:05:35 +08:00
Ivan Grokhotkov
07543dfec4 soc/rtc: wait for SLOW_CLK cycle when switching CPU clock
Previous implementation waited for 20us after setting
RTC_CNTL_SOC_CLK_SEL_XTL register, using ets_delay_us, assuming that
the CPU was running at XTAL frequency. In reality, clock switch happened
on the next RTC_SLOW_CLK cycle, and CPU could be running at the previous
frequency (for example, 240 MHz) until then.
ets_delay_us would wait for 20 us * 40 cycles per us = 800 CPU cycles
(assuming 40 MHz XTAL; even less with a 26 MHz XTAL).
But if CPU was running at 240 MHz, 800 cycles would pass in just 3.3us,
while SLOW_CLK cycle could happen as much as 1/150kHz = 6.7us after
RTC_CNTL_SOC_CLK_SEL_XTL was set. So the software would not actually wait
long enough for the clock switch to happen, and would disable the PLL
while CPU was still clocked from PLL, leading to a halt.

This implementation uses rtc_clk_wait_for_slow_cycle() function to wait
until the clock switch, removing the need to wait for a fixed number of
CPU cycles.
2017-11-09 15:51:14 +08:00
Ivan Grokhotkov
d262fe4bc9 soc/rtc: add a function to wait for slow clock cycle
Some RTC features are synchronized to RTC_SLOW_CLK, so sometimes
software needs to wait for the next slow clock cycle.
This function implements waiting using Timer Group clock calibration
feature.
2017-11-09 15:48:25 +08:00
Ivan Grokhotkov
fd20a89e20 Merge branch 'bugfix/v2.1_bootloader' into 'release/v2.1'
bugfix(80m flash): cherry pick from idf3.0, add gpio config and vddsdio config

See merge request !1503
2017-11-09 14:59:09 +08:00
Jiang Jiang Jian
d6b8602892 Merge branch 'bugfix/btdm_fix_merge_missing' into 'release/v2.1'
component/bt : fix merge missing of scan fail bugfix

See merge request !1507
2017-11-09 14:17:41 +08:00
Liu Zhi Fu
dfb1c41a28 esp32: add fix rate api
Add hidden fix rate api
2017-11-09 10:06:19 +08:00
Ivan Grokhotkov
378f3463fe soc/rtc: power down VDDSDIO in deep sleep
If VDDSDIO is controlled by RTC (which is the case when using 1.8V flash
and CONFIG_BOOTLOADER_VDDSDIO_BOOST is enabled), need to allow VDDSDIO
to be controlled by the state machine before going into deep sleep.
2017-11-08 21:45:10 +08:00
Tian Hao
0c67282bc5 component/bt : fix merge missing of scan fail bugfix 2017-11-08 18:22:05 +08:00
Wangjialin
305e2695d6 bugfix(80m flash): cherry pick from idf3.0, add gpio config and vddsdio config
1. raise vddsdio for 1.8v flash
2. gpio matrix config for flash
3. fix esp_restart function

todo:
to decide whether to raise core voltage
to test deep-sleep current
2017-11-08 12:50:08 +08:00
Jiang Jiang Jian
f108f5394f Merge branch 'cherry-pick-97dffbfc' into 'release/v2.1'
component/bt: disable the use of ROLE_SWITCH feature for classic BT as workaround

See merge request !1498
2017-11-07 20:02:05 +08:00
Jiang Jiang Jian
3aad5a09f4 Merge branch 'bugfix/btdm_disable_role_switch' into 'master'
component/bt: disable the use of ROLE_SWITCH feature for classic BT as workaround

See merge request !1446
2017-11-07 15:44:50 +08:00
Jiang Jiang Jian
6d16de8999 Merge branch 'bugfix/fix_800mA_bug_v2.1' into 'release/v2.1'
Fix a problem which initialize current can reach 800mA.

See merge request !1482
2017-11-03 17:34:02 +08:00
XiaXiaotian
4aa6551fe0 Fix a problem which initialize current can reach 800mA. 2017-11-02 11:02:38 +08:00
Jiang Jiang Jian
e2e46f4243 Merge branch 'bugfix/scan_problem_of_bonded_device_v2.1' into 'release/v2.1'
component/bt: Fix scan problem of bonded device using public address

See merge request !1450
2017-10-25 18:12:40 +08:00
island
c8525c21b9 component/bt: Fix scan problem of bonded device using public address 2017-10-25 15:48:33 +08:00
Jiang Jiang Jian
0e290863db Merge branch 'bugfix/fail_to_reconnect_to_some_aps_v2.1' into 'release/v2.1'
Bugfix/fail to reconnect to some aps v2.1

See merge request !1430
2017-10-24 10:39:30 +08:00
XiaXiaotian
e5b75b4a17 fix the bug that fail to reconnect to some APs 2017-10-20 11:52:53 +08:00
Ivan Grokhotkov
207524f3da Merge branch 'feature/update_phy362_rtc230_for_2_1' into 'release/v2.1'
component/esp32 : update rtc phy lib

See merge request !1400
2017-10-17 14:14:46 +08:00
Ivan Grokhotkov
e5d5727969 Merge branch 'bugfix/sdmmc_tests_v2.1' into 'release/v2.1'
sdmmc tests: Don't run under CI in v2.1

See merge request !1408
2017-10-17 14:13:03 +08:00
Tian Hao
3a9781ff45 component/esp32 : remove phy init data description 2017-10-17 11:28:35 +08:00
Tian Hao
edbd744991 component/esp32 : update rtc phy lib
RTC V230
add BT AGC saturation protection, replace RTC V229.

PHY V362
Power up print: "phy_version: 362.0, 61e8d92, Sep 8 2017, 18:48:13"
1. esp_init_data_v3.bin
modify TX target power
modify WIFI & BT RX gain table
2. modify phy_close_rf()
3. add phy_set_most_tpw()
4. 26M crystal work OK
5. noise_check_loop ok
2017-10-16 18:00:56 +08:00
Angus Gratton
817d75a4e1 sdmmc tests: Don't run under CI in v2.1 2017-10-16 17:19:00 +08:00
Jiang Jiang Jian
a73c78a85b Merge branch 'bugfix/backport_to_2.1' into 'release/v2.1'
Backport several bug fixes to 2.1 branch

See merge request !1318
2017-10-11 16:56:22 +08:00
Jiang Jiang Jian
84413f641d Merge branch 'bugfix/btdm_ea_overload_for_rel_v2.1' into 'release/v2.1'
component/bt: update bluetooth library to increase programming delay in EA

See merge request !1344
2017-10-11 16:52:18 +08:00
Jiang Jiang Jian
b6c91ce088 Merge branch 'bugfix/fix_a_wpa_wpa2_bug_v2.1' into 'release/v2.1'
Fix a wpa and wpa2 bug

See merge request !1343
2017-10-11 16:50:53 +08:00
wangmengyang
0c75b6e6e6 component/bt: update bluetooth library to increase programming delay in EA 2017-09-30 18:40:49 +08:00
Jiang Jiang Jian
90aafbd25b Merge branch 'feature/ip_route_base_on_source_ip_v2.1' into 'release/v2.1'
Broadcast IP route based on source IP address.

See merge request !1218
2017-09-30 16:04:03 +08:00
Jiang Jiang Jian
b95a6b01ba Merge branch 'bugfix/btdm_update_lib_for_2_1_1' into 'release/v2.1'
component/bt : update libbtdm_app.a

See merge request !1283
2017-09-30 15:53:34 +08:00
Jiang Jiang Jian
151c6d9016 Merge branch 'bugfix/btdm_fixbugs_for_ble_v2.1' into 'release/v2.1'
component/bt: fix ble bugs for v2.1

See merge request !1261
2017-09-30 15:53:00 +08:00
XiaXiaotian
62c2c37606 Fix a wpa and wpa2 bug 2017-09-30 15:51:33 +08:00
Angus Gratton
3eeaae0573 Merge branch 'bugfix/bt_sdp_server_continuation_2.1' into 'release/v2.1'
bluedroid: Add continuation offset check to SDP server (backport to v2.1)

See merge request !1324
2017-09-27 11:14:26 +08:00
Angus Gratton
43b25e2a2f bluedroid: Add continuation offset check to SDP server
Fix for CVE-2017-0785
https://android.googlesource.com/platform/system/bt/+/818cf6f%5E%21/#F0
2017-09-27 10:02:31 +10:00
Ivan Grokhotkov
74879c66e0 docs/wifi: remove note about the latest version 2017-09-26 00:11:15 +08:00
michael
5db3b86871 fix(spi_master): fix the bug that VSPI no respond when host changed
from HSPI to VSPI, and vice versa.

fix the SPI control bits written wrong in the headers.

TW#12123, Github#477
2017-09-26 00:04:04 +08:00
Jeroen Domburg
65734a8344 Fix an assert that erroneously triggered when popping a zero-byte payload from the end of the ringbuffer 2017-09-26 00:02:52 +08:00
Jeroen Domburg
fdb390aeac Place uart_tx_wait_idle in IRAM 2017-09-26 00:02:20 +08:00
Angus Gratton
f285d8f678 windows: Add workaround for "git submodule" stray output bug
TW10271
2017-09-26 00:01:27 +08:00