Commit Graph

123 Commits

Author SHA1 Message Date
Darian Leung
b85e6d3dd8 change(xtensa): Deprecate ".../xtensa_timer.h" include path
This commit deprecates the "freertos/xtensa_timer.h" and "xtensa/xtensa_timer.h"
include paths. Users should use "xtensa_timer.h" instead.

- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_timer.h"
- Add warning to compatibility header
2023-12-05 18:04:52 +08:00
Darian Leung
555bd367e1 change(xtensa): Deprecate ".../xtensa_context.h" include path
This commit deprecates the "freertos/xtensa_context.h" and "xtensa/xtensa_context.h"
include paths. Users should use "xtensa_context.h" instead.

- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_api.h"
- Add warning to compatibility header
2023-12-05 18:04:52 +08:00
Darian Leung
c2e134b775 change(xtensa): Deprecate ".../xtensa_api.h" include path
This commit deprecates the "freertos/xtensa_api.h" and "xtensa/xtensa_api.h"
include paths. Users should use "xtensa_api.h" instead.

- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_api.h"
- Replaced some calls with "esp_cpu_..." equivalents
- Add warning to compatibility header
2023-12-05 18:04:52 +08:00
Alexey Lapshin
33d9fd629d fix(xtensa): fix registers curruption on context switch
a6, a7 registers may be corrupted on multicore ESP chips while FreeRTOS
Kernel SMP context switch
2023-10-09 12:13:02 +04:00
Omar Chebib
b03c8912c7 Xtensa: fix a bug that altered CPU registers in FPU exception handlers
* Fixes https://github.com/espressif/esp-idf/issues/11690
2023-07-04 02:45:56 +00:00
Frantisek Hrbata
b3998f0f0c tools: strip trailing whitespaces/newline from dump_machine
In components/xtensa/project_include.cmake ${CMAKE_C_COMPILER} -dumpmachine
is called, but the output has newline.

Before
---8<--
-- Compiler supported targets: xtensa-esp32s3-elf

-- App "blink" version: 1.2.3
---8<--

After
---8<--
-- Compiler supported targets: xtensa-esp32s3-elf
-- App "blink" version: 1.2.3
---8<--

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
2023-05-30 13:35:10 +02:00
Jakob Hasse
0a3cfce671 Merge branch 'contrib/github_pr_10895' into 'master'
Fix possible conversion errors by using __builtin_ffsll (GitHub PR)

Closes IDFGH-9541

See merge request espressif/esp-idf!23429
2023-05-04 10:41:46 +08:00
Ivan Grokhotkov
9d82d6bf7f
xtensa: don't print debug messages to stderr
By default, CMake message() commands prints to stderr.
IDEs like Eclipse show stderr output in red, which looks as if this is
some kind of error.

Use message(STATUS) instead.
2023-04-25 12:59:41 +02:00
Darian Leung
6587e75251 xtensa: Add bare metal port stub functions for G0 build test
This commit adds "bare metal stubs" xtensa_rtos.h glue layer to mimic a bare
metal OS port. The bare metal stubs don't access any components outside of the
G0 group.
2023-04-18 15:51:38 +08:00
Darian Leung
b2c074bb70 xtensa: Move Xtensa RTOS porting layer files to xtensa component
When porting an RTOS to the Xtensa architecture, there are a few files that
are common to all Xtensa RTOS ports. These files form the Xtensa RTOS porting
layer (e.g., "xtensa_vectors.S", "xtensa_context.S"). An Xtensa RTOS port is
expected to provide an RTOS specific "xtensa_rtos.h" header to interface with
the Xtensa RTOS porting layer.

Previously, the Xtensa RTOS porting layer files were placed in the FreeRTOS
component. This commit does the following:

1. Moves the Xtensa RTOS porting layer files from the `freertos` component to
the `xtensa` component. The following files were moved:

    - xtensa_asm_utils.h
    - xtensa_context.S
    - xtensa_loadstore_handler.S
    - xtensa_vectors.S

2. Refactored xtensa component include paths to separate Xtensa RTOS porting
layer headers.

- Xtensa HAL headers included via `#include <xtensa/...h>`
- Xtensa RTOS porting layer headers included via `#include <...h>`

Note: The xtensa files in the Amazon SMP FreeRTOS port are not moved/deleted in
this commit to ensure the moved files retain a clean diff history.
2023-04-18 15:28:05 +08:00
term_est
14724d1cb9
Fix possible conversion errors by using __builtin_ffsll instead of __builtin_ffs
Signed-off-by: term_est <62337595+term-est@users.noreply.github.com>
2023-03-03 11:21:07 +03:00
Omar Chebib
1ff8a68c21 Merge branch 'bugfix/support_coredump_stack_xtensa' into 'master'
coredump: custom core dump stack is now supported on Xtensa targets

See merge request espressif/esp-idf!21335
2022-12-19 18:02:15 +08:00
Andrei Safronov
9d257054c8 xtensa: remove asm struct expressions in header files 2022-12-05 22:00:07 +03:00
Omar Chebib
301cb74890 coredump: custom core dump stack is now supported on Xtensa targets 2022-12-02 12:01:19 +08:00
Alexey Gerenkov
47c2c13de5 build: Adds support for universal Clang toolchain 2022-11-23 13:25:16 +03:00
Ivan Grokhotkov
a97686f607
xtensa: fix swapped breakpoint and watchpoint numbers 2022-07-25 09:43:10 +02:00
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Darian Leung
434287fc8b freertos: Xtensa FreeRTOS saves threadptr in solicited stack frame
The Xtensa FreeRTOS port does not save the threadptr register when
doing a voluntary yield. This can result in a crash when multiple
tasks used the threadptr register and call "taskYIELD()".

This commit adds the threadptr register to the solicited stack frame.
2022-06-15 20:20:41 +08:00
Darian Leung
a8a3756b38 hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:

- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead

Also updated soc_hal.h as follows:

- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.

This commit also updates the XCHAL_ERRATUM_572 workaround by

- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
2022-06-14 14:40:03 +08:00
Darian Leung
61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Anton Maklakov
d1db4d0c1b system: add missing header 2022-05-30 12:43:23 +07:00
Marius Vikhammer
9362434c47 build-system: add property for architecture (riscv/xtensa)
riscv/xtensa is now a common component.
2022-05-20 09:00:32 +08:00
Erhan Kurubas
ad078c5153 semihosting: drop absolute path support 2022-05-05 09:12:42 +00:00
Erhan Kurubas
0fc0254734 semihosting: version 2 2022-05-05 09:12:42 +00:00
Marius Vikhammer
e543e97c7b system: fix SET_STACK macro crashing in windowoverflow8 exception
If a windowoverflow8 happened after changing the SP, the exception handler would look for
the extra save area by looking at the previous frame's SP. This SP would be a garbage value
and could cause the windowoverflow exception to write to invalid memory ares.
2022-03-04 15:25:52 +08:00
Darian Leung
1c60d6a895 freertos: Add SPDX license identifiers and update xtensa port files
This commit does the following:

- Adds SPDX license identifiers to FreeRTOS sources. Remove those FreeRTOS sources from
  the copyright ignore list.
- Update xtensa port files to match FreeRTOS v10.4.3. Added SPDX license identifiers
  to the port files.
- Fixed some improperly licensed files
- Removed portbenchmark.h from RISC-V port
2022-02-03 17:08:14 +08:00
Ivan Grokhotkov
aeed91b589 xtensa: fix semihosting arguments potentially begin optimized out
The compiler was not informed that the assembly block should be
treated as a memory barrier and could optimize out the initialization
of local arrays which could be used as semihosting arguments.
This resulted in garbage values being passed as semihosting call
arguments.

Additionally this commit changes the approach for placing values into
specific register. Instead of clobbers, local register variables are
used. This results in simpler generated code, since the compiler is
able to place values directly into the registers used for semihosting
arguments, avoiding additional moves.
2022-01-20 19:48:05 +01:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Ivan Grokhotkov
876f4d6a1c vfs: add support for semihosting on ESP32-C3 2022-01-14 17:29:03 +01:00
morris
113cbb88a6 hw_support: remove deprecated header files 2022-01-04 14:16:17 +08:00
Sudeep Mohanty
e22b4007d3 esp_hw_support: Removed deprecated CPU util functions
The following files were deleted:
- components/esp_hw_support/include/soc/cpu.h
- components/soc/esp32s3/include/soc/cpu.h

The following functions are deprecated:
- get_sp()

The following functions declared in soc/cpu.h are now moved to esp_cpu.h:
- esp_cpu_configure_region_protection()

The following functions declared in soc/cpu.h are now moved to components/xtensa/include/esp_cpu_utils.h:
- esp_cpu_process_stack_pc()

All files with soc/cpu.h inclusion are updated to include esp_cpu.h instead.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-28 16:58:37 +05:30
Roland Dobai
2b9c81cbdc xtensa: Pass the test with latest gdb 2021-11-22 18:17:36 +01:00
Roland Dobai
1c22f1e15e xtensa: Revert back Makefile for trax test
Revert back the regression of 766aa57084
2021-11-22 18:02:08 +01:00
Roland Dobai
766aa57084 Build & config: Remove leftover files from the unsupported "make" build system 2021-11-11 15:32:36 +01:00
Cao Sen Miao
599227a1b6 ESP8684: Add esp8684 target to other repo for passing build 2021-11-06 17:33:45 +08:00
Shu Chen
75bd02bd46 esp32h2: add some more fixes and TODOs 2021-07-01 20:36:39 +08:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
2b9e8fed71 esp32h2: add esp32h2 build target
Add esp32h2 support in the following components:
 * Kconfig
 * components/esptool_py
 * components/riscv
 * components/xtensa
 * tools
2021-07-01 19:51:33 +08:00
Ivan Grokhotkov
3ce1fa70aa xtensa: update libhal for esp32s3
Built from:
  https://github.com/foss-xtensa/xtensa-hal (commit b014610)

With toolchain:
  xtensa-esp32s3-elf-gcc (crosstool-NG esp-2021r1) 8.4.0

Commands:

  ./configure --host=xtensa-esp32s3-elf CC=xtensa-esp32s3-elf-gcc \
    CFLAGS="-mlongcalls -I$IDF_PATH/components/xtensa/esp32s3/include"

  make

  xtensa-esp32s3-elf-strip --strip-debug src/hal/libhal.a
2021-06-29 16:56:35 +02:00
Ivan Grokhotkov
ca5ed172a5 xtensa: update configuration overlay for esp32s3
From LX7_ESP32_S3_MP_linux_redist.tgz with SHA256:
63f305a982b2ee94cc78e5c20e3e3eb8bf0edeeaf703af0227a418bc34f7b848
copied from xtensa-elf/arch/include/xtensa/config/ with changes:
1) pre-commit fixes applied
2) re-added CONFIGID0 and CONFIGID1 in specreg.h
2021-06-29 16:56:35 +02:00
Alexey Gerenkov
821869d98d apptrace: Refactors apptrace for better support various tracing HW 2021-06-24 13:16:13 +03:00
Roland Dobai
407053592e Drop support for unsupported Python versions 2021-06-21 21:48:49 +02:00
Jakob Hasse
be55a5eb2b [system]: put xtensa_intr_asm into IRAM 2021-04-26 12:11:20 +08:00
Ivan Grokhotkov
83e68ee19e Merge branch 'bugfix/replace_setjmp_rom' into 'master'
[system]: Made longjmp save for context switch

Closes IDFGH-3232

See merge request espressif/esp-idf!13119
2021-04-23 12:39:29 +00:00
Jakob Hasse
fc22e3c645 [system]: Made longjmp save for context switch
* Patched longjmp to be context-switch safe
  longjmp modifies the windowbase and windowstart
  registers, which isn't safe if a context switch
  occurs during the modification. After a context
  switch, windowstart and windowbase will be
  different, leading to a wrongly set windowstart
  bit due to longjmp writing it based on the
  windowbase before the context switch. This
  corrupts the registers at the next window
  overflow reaching that wrongly set bit.

  The solution is to disable interrupts during
  this code. It is only 6 instructions long,
  the impact shouldn't be significant.

  The fix is implemented as a wrapper which
  replaces the original first instructions of
  longjmp which are buggy. Then, it jumps back
  to execute the rest of the original longjmp
  function.

  Added a comparably reliable test to the
  test apps.
2021-04-23 15:55:31 +08:00
Jakob Hasse
b23c9142d5 [hal]: cleaned up interrupt mask functions
* Functions for setting and clearing interrupts
  as well as function to read interrupt mask
  should be clearer now.
* Using hal layer interrupt set and clear
  functions in esp_wifi component
2021-04-06 11:54:13 +08:00
Renz Bagaporo
daa13b3f62 esp32: move toolchain check 2021-03-31 19:17:33 +08:00
Renz Bagaporo
d920aa52be xtensa: simplify build script 2021-02-26 19:45:48 +08:00
Renz Bagaporo
1efdcd69d9 xtensa: move out trax 2021-02-26 19:45:48 +08:00
Renz Bagaporo
b1027005df arch: move stdatomic 2021-02-26 18:40:00 +08:00