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semihosting: version 2
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@ -19,7 +19,7 @@ extern "C" {
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* @param addr address of apptrace control data block
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* @return return 0 on sucess or non-zero error code
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*/
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#define ESP_SEMIHOSTING_SYS_APPTRACE_INIT 0x64
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#define ESP_SEMIHOSTING_SYS_APPTRACE_INIT 0x101
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/**
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* @brief Initialize debug stubs table at host side
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@ -27,7 +27,7 @@ extern "C" {
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* @param addr address of debug stubs table
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* @return return 0 on sucess or non-zero error code
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*/
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#define ESP_SEMIHOSTING_SYS_DBG_STUBS_INIT 0x65
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#define ESP_SEMIHOSTING_SYS_DBG_STUBS_INIT 0x102
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/**
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* @brief Set/clear breakpoint
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@ -37,7 +37,7 @@ extern "C" {
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* @param addr address to set breakpoint at. Ignored if `set` is false.
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* @return return 0 on sucess or non-zero error code
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*/
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#define ESP_SEMIHOSTING_SYS_BREAKPOINT_SET 0x66
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#define ESP_SEMIHOSTING_SYS_BREAKPOINT_SET 0x103
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/**
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* @brief Set/clear watchpoint
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@ -49,7 +49,7 @@ extern "C" {
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* @param flags watchpoint flags, see description below. Ignored if `set` is false.
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* @return return 0 on sucess or non-zero error code
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*/
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#define ESP_SEMIHOSTING_SYS_WATCHPOINT_SET 0x67
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#define ESP_SEMIHOSTING_SYS_WATCHPOINT_SET 0x104
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/* bit values for `flags` argument of ESP_SEMIHOSTING_SYS_WATCHPOINT_SET call. Can be ORed. */
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/* watch for 'reads' at `addr` */
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@ -85,31 +85,6 @@ static inline long semihosting_call_noerrno(long id, long *data)
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return a0;
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}
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/**
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* @brief Perform semihosting call and retrieve errno
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*
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* @param id semihosting call number
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* @param data data block to pass to the host; number of items and their
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* meaning depends on the semihosting call. See the spec for
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* details.
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* @param[out] out_errno output, errno value from the host. Only set if
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* the return value is negative.
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* @return return value from the host
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*/
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static inline long semihosting_call(long id, long *data, int *out_errno)
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{
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long ret = semihosting_call_noerrno(id, data);
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if (ret < 0) {
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/* Constant also defined in openocd_semihosting.h,
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* which is common for RISC-V and Xtensa; it is not included here
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* to avoid a circular dependency.
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*/
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const int semihosting_sys_errno = 0x13;
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*out_errno = (int) semihosting_call_noerrno(semihosting_sys_errno, NULL);
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}
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return ret;
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}
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#ifdef __cplusplus
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}
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#endif
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@ -66,8 +66,56 @@ extern "C" {
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*
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* If the syscall is recognized, the return value is zero.
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*/
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#define SEMIHOSTING_SYS_DRVINFO 0xE0
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#define ESP_SEMIHOSTING_SYS_DRV_INFO 0x100
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/* 0x101...0x104 used by RiscV for custom semihosting calls */
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/* Other Espressif extension sys calls */
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#define ESP_SEMIHOSTING_SYS_SEEK 0x105 /* custom lseek with whence */
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/* not implemented yet */
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#define ESP_SEMIHOSTING_SYS_MKDIR 0x106
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#define ESP_SEMIHOSTING_SYS_OPENDIR 0x107
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#define ESP_SEMIHOSTING_SYS_READDIR 0x108
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#define ESP_SEMIHOSTING_SYS_READDIR_R 0x109
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#define ESP_SEMIHOSTING_SYS_SEEKDIR 0x10A
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#define ESP_SEMIHOSTING_SYS_TELLDIR 0x10B
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#define ESP_SEMIHOSTING_SYS_CLOSEDIR 0x10C
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#define ESP_SEMIHOSTING_SYS_RMDIR 0x10D
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#define ESP_SEMIHOSTING_SYS_ACCESS 0x10E
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#define ESP_SEMIHOSTING_SYS_TRUNCATE 0x10F
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#define ESP_SEMIHOSTING_SYS_UTIME 0x110
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#define ESP_SEMIHOSTING_SYS_FSTAT 0x111
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#define ESP_SEMIHOSTING_SYS_STAT 0x112
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#define ESP_SEMIHOSTING_SYS_FSYNC 0x113
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#define ESP_SEMIHOSTING_SYS_LINK 0x114
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#define ESP_SEMIHOSTING_SYS_UNLINK 0x115
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/* Semihosting version bumped to 2.
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In this version, memory based approach implemented as defined in the ARM standard.
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Also user defined syscall numbers enumerated between 0x100-0x1FF
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*/
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#define SEMIHOSTING_DRV_VERSION 2
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/**
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* @brief Perform semihosting call and retrieve errno
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*
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* @param id semihosting call number
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* @param data data block to pass to the host; number of items and their
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* meaning depends on the semihosting call. See the spec for
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* details.
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* @param[out] out_errno output, errno value from the host. Only set if
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* the return value is negative.
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* @return return value from the host
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*/
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static inline long semihosting_call(long id, long *data, int *out_errno)
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{
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long ret = semihosting_call_noerrno(id, data);
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if (ret < 0) {
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const int semihosting_sys_errno = SEMIHOSTING_SYS_ERRNO;
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*out_errno = (int) semihosting_call_noerrno(semihosting_sys_errno, NULL);
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}
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return ret;
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}
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static inline int semihosting_open(const char *path, int open_mode, int mode)
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{
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@ -126,7 +174,7 @@ static inline off_t semihosting_seek(int fd, off_t offset, int mode)
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{
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int host_errno = 0;
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long args[] = {fd, offset, mode, 0};
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off_t ret = (off_t) semihosting_call(SEMIHOSTING_SYS_SEEK, args, &host_errno);
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off_t ret = (off_t) semihosting_call(ESP_SEMIHOSTING_SYS_SEEK, args, &host_errno);
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if (ret == -1) {
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errno = host_errno;
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}
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@ -138,9 +186,9 @@ static inline int semihosting_ver_info(void)
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int host_errno = 0;
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struct {
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int version;
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} ver_info = { 1 };
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} ver_info = { SEMIHOSTING_DRV_VERSION };
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long args[] = {(long) &ver_info, sizeof(ver_info), 0, 0};
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int ret = (int) semihosting_call(SEMIHOSTING_SYS_DRVINFO, args, &host_errno);
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int ret = (int) semihosting_call(ESP_SEMIHOSTING_SYS_DRV_INFO, args, &host_errno);
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(void) host_errno; /* errno not set by this call */
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return ret;
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}
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@ -100,7 +100,6 @@ static inline bool ctx_uses_abspath(const vfs_semihost_ctx_t* ctx)
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} \
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} while(0)
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#if __XTENSA__
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static esp_err_t vfs_semihost_drvinfo(vfs_semihost_ctx_t *ctx)
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{
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FAIL_IF_NO_DEBUGGER();
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@ -112,7 +111,6 @@ static esp_err_t vfs_semihost_drvinfo(vfs_semihost_ctx_t *ctx)
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}
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return ESP_OK;
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}
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#endif // __XTENSA__
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static int vfs_semihost_open(void* ctx, const char* path, int flags, int mode)
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{
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@ -151,20 +149,6 @@ static int vfs_semihost_open(void* ctx, const char* path, int flags, int mode)
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#endif // __XTENSA__
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} else {
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host_path = (char *)path;
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/* For Xtensa targets in OpenOCD there is additional logic related to
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* semihosting paths handling that isn't there for other targets.
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* When ESP_SEMIHOST_BASEDIR OpenOCD variable is not set, OpenOCD will
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* by default prepend '.' to the path passed from the target.
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* By contrast, for RISC-V there is no such logic and the path will be
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* used as is, no matter whether it is absolute or relative.
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* See esp_xtensa_semihosting_get_file_name in esp_xtensa_semihosting.c
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* for details.
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*/
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#ifndef __XTENSA__
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if (*host_path == '/') {
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++host_path;
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}
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#endif // !__XTENSA__
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}
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/* everything is ready: syscall and cleanup */
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ret_fd = semihosting_open(host_path, o_mode, mode);
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@ -241,13 +225,11 @@ esp_err_t esp_vfs_semihost_register(const char* base_path, const char* host_path
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ESP_LOGD(TAG, "Register semihosting driver %d %p", i, &s_semhost_ctx[i]);
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esp_err_t err;
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#if __XTENSA__
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/* Check for older OpenOCD versions */
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err = vfs_semihost_drvinfo(&s_semhost_ctx[i]); // define semihosting version
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if (err != ESP_OK) {
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ESP_LOGE(TAG, "Incompatible OpenOCD version detected. Please follow the getting started guides to install the required version.");
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}
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#endif // __XTENSA__
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err = esp_vfs_register(base_path, &vfs, &s_semhost_ctx[i]);
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if (err != ESP_OK) {
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extern "C" {
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#endif
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/**
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* @brief Perform semihosting call and retrieve errno
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*
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* @param id semihosting call number
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* @param data data block to pass to the host; number of items and their
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* meaning depends on the semihosting call. See the spec for
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* details.
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* On Xtensa, this function assumes that the array contains at
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* least 4 elements, but no effort is made to guarantee that.
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* Passing a shorter array will still work, as long as it contains
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* sufficient values for the corresponding semihosting call.
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* @param[out] out_errno output, errno value from the host. Only set if
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* the return value is negative.
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* @return return value from the host
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*/
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static inline long semihosting_call(long id, long *data, int *out_errno) // NOLINT(readability-non-const-parameter)
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static inline long semihosting_call_noerrno(long id, long *data)
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{
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/* GCC doesn't allow using specific register names in constraints for Xtensa.
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* For this case, GCC extended inline assembly manual says the following:
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* If you must use a specific register, but your Machine Constraints do not provide
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* sufficient control to select the specific register you want, local register variables
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* may provide a solution.
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* Using local register variables results in simpler generated code than
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* the previous implementation which listed a2-a6 as clobbered registers.
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*/
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register long a2 asm ("a2") = id;
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register long a3 asm ("a3") = (long) data[0];
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register long a4 asm ("a4") = (long) data[1];
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register long a5 asm ("a5") = (long) data[2];
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register long a6 asm ("a6") = (long) data[3];
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register long a3 asm ("a3") = (long)data;
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/* The break instruction operands should be (1, 14) according to the ISA manual.
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* We keep (1, 1) for compatibility, until OpenOCD is updated to support both
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* conventions.
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*/
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__asm__ __volatile__ (
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"break 1, 1\n"
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: "+r"(a2), "+r"(a3)
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: "r"(a4), "r"(a5), "r"(a6)
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"break 1, 14\n"
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: "+r"(a2) : "r"(a3)
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: "memory");
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long host_ret = a2;
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long host_errno = a3;
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if (host_ret < 0) {
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*out_errno = host_errno;
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}
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return host_ret;
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return a2;
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}
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#ifdef __cplusplus
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