esp-idf/components/hal/include/hal
2021-01-25 04:51:40 +00:00
..
adc_hal.h adc_digi: add dma drivers 2021-01-25 04:51:40 +00:00
adc_types.h adc_digi: add dma drivers 2021-01-25 04:51:40 +00:00
aes_hal.h AES/SHA: use GDMA driver instead of LL 2021-01-19 11:02:51 +08:00
aes_types.h AES: refactor and add HAL layer 2020-12-10 09:04:47 +00:00
brownout_hal.h soc: combine xxx_caps.h into one soc_caps.h 2020-10-17 16:10:15 +08:00
cpu_hal.h light sleep: dfs support for esp32c3 2021-01-19 14:50:58 +08:00
cpu_types.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
dac_hal.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
dac_types.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
dma_types.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
ds_hal.h [Peripheral/Security] DS peripheral driver 2021-01-05 12:26:59 +08:00
esp_flash_err.h hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
gdma_hal.h gdma: dynamic alloc DMA channels 2021-01-13 10:52:27 +08:00
gpio_hal.h components/pm: Add slp gpio configure workaround 2021-01-15 15:34:45 +08:00
gpio_types.h driver: Add esp32c3 drivers (except ADC/DAC) and update tests 2020-12-23 09:53:24 +11:00
hal_defs.h hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
i2c_hal.h global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
i2c_types.h i2c: Add supports on esp32s3 2020-11-12 11:32:45 +08:00
i2s_hal.h soc: combine xxx_caps.h into one soc_caps.h 2020-10-17 16:10:15 +08:00
i2s_types.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
interrupt_controller_hal.h interrupt: removed descriptor table from esp32c3 interrupt hal. 2021-01-05 15:39:46 +08:00
interrupt_controller_types.h interrupt: added INTC FLEXIBLE capabillity to esp32c3 CPU caps 2021-01-05 15:39:46 +08:00
ledc_hal.h hal: update link to HAL readme.md 2020-09-11 15:48:08 +08:00
ledc_types.h hal: Add initial ESP32-C3 support 2020-11-30 15:23:15 +11:00
mcpwm_hal.h hal: update link to HAL readme.md 2020-09-11 15:48:08 +08:00
mcpwm_types.h hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
mpu_hal.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
mpu_types.h hal: explicitly include soc_caps.h 2021-01-07 10:13:17 +08:00
pcnt_hal.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
pcnt_types.h hal: explicitly include soc_caps.h 2021-01-07 10:13:17 +08:00
readme.md hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
rmt_hal.h rmt: split TX and RX in LL driver 2020-11-05 19:00:55 +08:00
rmt_types.h rmt: split TX and RX in LL driver 2020-11-05 19:00:55 +08:00
rtc_hal.h light sleep: add cpu power down support for esp32c3 2021-01-19 14:51:50 +08:00
rtc_io_hal.h hal: Add initial ESP32-C3 support 2020-11-30 15:23:15 +11:00
rtc_io_types.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
sdio_slave_hal.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
sdio_slave_ll.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
sdio_slave_types.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
sha_hal.h AES/SHA: use GDMA driver instead of LL 2021-01-19 11:02:51 +08:00
sha_types.h hal: Add initial ESP32-C3 support 2020-11-30 15:23:15 +11:00
sigmadelta_hal.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
sigmadelta_types.h sigma_delta: add periph signal list and support esp32-s3 2020-10-29 11:06:28 +08:00
soc_hal.h [freertos] Silence sign-conversion warning 2021-01-14 10:54:15 +11:00
spi_flash_hal.h esp_flash: support high capacity flash chips (32-bit address) 2020-10-29 18:20:11 +08:00
spi_flash_types.h esp_flash: support high capacity flash chips (32-bit address) 2020-10-29 18:20:11 +08:00
spi_hal.h hal: explicitly include soc_caps.h 2021-01-07 10:13:17 +08:00
spi_slave_hal.h soc: combine xxx_caps.h into one soc_caps.h 2020-10-17 16:10:15 +08:00
spi_slave_hd_hal.h spi_slave_hd: add DMA Append Mode feature 2021-01-21 18:53:53 +08:00
spi_types.h spi_slave_hd: add DMA Append Mode feature 2021-01-21 18:53:53 +08:00
systimer_hal.h hal: Add initial ESP32-C3 support 2020-11-30 15:23:15 +11:00
systimer_types.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
timer_hal.h soc: updates caps usage 2020-10-17 16:10:17 +08:00
timer_types.h timergroup: move interrupt index into peripheral description file 2020-11-03 18:16:50 +08:00
touch_sensor_hal.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
touch_sensor_types.h hal: Add initial ESP32-C3 support 2020-11-30 15:23:15 +11:00
twai_hal.h hal: update link to HAL readme.md 2020-09-11 15:48:08 +08:00
twai_types.h soc: combine xxx_caps.h into one soc_caps.h 2020-10-17 16:10:15 +08:00
uart_hal.h uart: seperate sclk and baudrate setting 2020-11-24 19:12:52 +08:00
uart_types.h uart: add uart support on esp32s3 2020-11-24 19:12:51 +08:00
usb_hal.h hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
usb_types.h Add USB Host registers and types and LL layer 2020-12-24 19:43:42 +08:00
wdt_hal.h soc: combine xxx_caps.h into one soc_caps.h 2020-10-17 16:10:15 +08:00
wdt_types.h hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00

HAL Layer Readme

The HAL layer is designed to be used by the drivers. We don't guarantee the stability and back-compatibility among versions. The HAL layer may update very frequently with the driver. Please don't use them in the applications or treat them as stable APIs.

The HAL layer consists of two layers: HAL (upper) and Lowlevel(bottom). The HAL layer defines the steps and data required by the peripheral. The lowlevel is a translation layer converting general conceptions to register configurations.

Lowlevel

This layer should be all static inline. The first argument of LL functions is usually a pointer to the beginning address of the peripheral register. Each chip should have its own LL layer. The functions in this layer should be atomic and independent from each other so that the upper layer can change/perform one of the options/operation without touching the others.

HAL

This layer should depend on the operating system as little as possible. It's a wrapping of LL functions, so that the upper layer can combine basic steps into different working ways (polling, non-polling, interrupt, etc.). Without using queues/locks/delay/loop/etc., this layer can be easily port to other os or simulation systems.

To get better performance and better porting ability, contexts are used to hold sustainable data and pass the parameters.

To develop your own driver, it is suggested to copy the HAL layer to your own code and keep them until manual update.