Michael (XIAO Xufeng)
fbb6b1b11a
Merge branch 'bugfix/fix_uart_reset_issue_on_esp32c3' into 'master'
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bugfix(uart): reset uart0 core before uart apb reset
Closes IDF-3362
See merge request espressif/esp-idf!12749
2021-07-22 07:20:58 +00:00
KonstantinKondrashov
c19b37d2a9
esp_system: Adds sync of FRC & RTC counters in esp_restart
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In case when FRC and RTC counters are very different then
the need to sync them before to restart the ESP
to get the correct system time after reboot.
2021-07-21 10:23:24 +05:00
Wangjialin
2b986fbd49
For esp_restart API, reset uart0 core first, then reset uart0 apb side, so as to prevent uart output garbage after cpu reset. (UART0 RST bits will be cleared in ROM)
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Add UART0/1 core reset on esp32c3, in case uart driver would also reset uart hardwares.
2021-07-21 11:41:04 +08:00
morris
2058e89448
Merge branch 'feature/fpga_bootloader' into 'master'
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Boot ESP32 & ESP32-S2 apps on FPGA
See merge request espressif/esp-idf!8270
2021-07-18 08:06:38 +00:00
Angus Gratton
c1ca7a35b0
ldgen: Remove some remaining references to TARGET.project.ld.in
2021-07-16 20:14:27 +08:00
Angus Gratton
f0471b18b2
esp32h2: Move from target component to esp_hw_support (new structure)
2021-07-16 20:14:27 +08:00
Renz Bagaporo
b06dba7823
esp32: move app linker scripts
2021-07-16 20:14:27 +08:00
Renz Bagaporo
fddc0b6799
esp32: move remaining tests
2021-07-16 20:14:27 +08:00
Renz Bagaporo
7c22cccb9c
esp32: cleanup build script
2021-07-16 20:14:27 +08:00
Angus Gratton
1a626ef6ca
esp32: App can boot on FPGA image
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Includes fix for detecting ESP32 ECO3 on FPGA
2021-07-16 10:50:06 +10:00
Angus Gratton
bbbbd5cf0c
esp32s2: FPGA can boot to Hello World
2021-07-16 10:50:06 +10:00
Omar Chebib
0771bd1711
espsystem: Rearchitecture and fix eh_frame_parser bugs
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eh_frame_parser is architecture independent, thus the files have
been rearchitectured. Some bugs have been fixed in the test.
A README file has also been added to eh_frame_parser host test
directory.
eh_frame_parser is now able to detect empty gaps in .eh_frame_hdr
table (missing DWARF information).
Fix a bug occuring when parsing backtraces originated from abort().
Fix build missing dependencies issue.
2021-07-15 12:47:51 +08:00
Omar Chebib
b967dc0dbf
espsystem: add support for RISC-V panic backtrace
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Add .eh_frame and .eh_frame_hdr sections to the binary (can be
enabled/disabled within menuconfig). These sections are parsed
when a panic occurs. Their DWARF instructions are decoded and
executed at runtime, to retrieve the whole backtrace. This
parser has been tested on both RISC-V and x86 architectures.
This feature needs esptool's merge adjacent ELF sections feature.
2021-07-13 15:42:40 +08:00
morris
1560d6f1ba
soc: add reset reasons in soc component
2021-07-13 10:45:38 +08:00
Shu Chen
ee23a489b9
esp32h2: code clean up
2021-07-01 19:53:50 +08:00
Shu Chen
5e3689ae0f
esp32h2: update esp_system and esp_hw_support to support esp32h2
2021-07-01 19:53:11 +08:00
Shu Chen
7d4b2617e1
esp32h2: copy esp_system and esp_hw_support from esp32c3
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Copy the esp32c3 code without any change:
* components/esp_hw_support/include/soc/esp32h2
* components/esp_hw_support/port/esp32h2
* components/esp_system/port/soc/esp32h2
2021-07-01 19:53:11 +08:00
Angus Gratton
2f8debdde1
Merge branch 'feature/esp32s3_remove_rtc_apb_freq_reg' into 'master'
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esp32s3: Remove APB frequency RTC register
See merge request espressif/esp-idf!11137
2021-06-29 23:50:23 +00:00
Angus Gratton
1969e4b8e5
Merge branch 'bugfix/panic_handler_disable_wdts_early' into 'master'
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esp_system: Reconfigure the WDTs at the start of the panic handler
Closes IDFCI-361
See merge request espressif/esp-idf!14138
2021-06-29 23:48:40 +00:00
Angus Gratton
57fa883127
esp32s3: Remove APB frequency RTC register
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Usage of this register changed between ESP32-S3 beta2 and the
final chip.
2021-06-29 17:38:46 +10:00
Angus Gratton
14c7d4965b
esp_system: Reconfigure the WDTs at the start of the panic handler
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This is mostly important on ESP32 ECO3 with the
ESP32_ECO3_CACHE_LOCK_FIX, because when we stall the other CPU core
before we disable the TG1 WDT then the first CPU can get stuck
in WDT ISR handle_livelock_int routine waiting for the other CPU.
2021-06-28 17:24:39 +10:00
Ivan Grokhotkov
d7928bf1db
Merge branch 'feature/esp32c3_apptrace' into 'master'
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apptrace: refactoring & esp32c3 support
See merge request espressif/esp-idf!11702
2021-06-28 06:00:24 +00:00
Michael (XIAO Xufeng)
afc2bc94b3
Merge branch 'feature/add_opi_flash_psram_support' into 'master'
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spi flash: opi flash psram support and spi timing tuning support on 727
Closes IDF-3097
See merge request espressif/esp-idf!12946
2021-06-28 01:59:19 +00:00
Armando
bc248278f8
spiflash: add octal spi psram support on 727
2021-06-25 19:41:57 +08:00
Alexey Gerenkov
20fd09728f
apptrace: Adds ESP32-C3 support
2021-06-24 13:16:14 +03:00
Alexey Gerenkov
821869d98d
apptrace: Refactors apptrace for better support various tracing HW
2021-06-24 13:16:13 +03:00
Jakob Hasse
64750acbb0
[esp_system]: added __cxx_eh_arena_size_get again
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* This function has been accidentally removed.
It is necessary to provide the emergency
exception memory pool size for C++ code.
Since our libstdc++ always has exceptions
enabled, this function must exist here even if
-fno-exception is set for user code.
2021-06-22 14:14:08 +08:00
Cao Sen Miao
f2fe0847d5
usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now
2021-06-18 12:42:41 +08:00
Angus Gratton
059353b0c2
Merge branch 'feature/refactor_common_secure_boot_code' into 'master'
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secure_boot/flash_encryption: Refactoring
Closes IDF-2582 and IDF-2035
See merge request espressif/esp-idf!12963
2021-06-16 23:21:45 +00:00
Konstantin Kondrashov
f339b3fc96
efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key()
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These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
2021-06-17 07:21:36 +08:00
Marius Vikhammer
f124536948
system: add support for reset reason hint on S3
2021-06-15 13:39:51 +08:00
Angus Gratton
d995086621
Merge branch 'bugfix/memprot_bypass' into 'master'
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System/Security: Memprot bypassing mitigation
Closes IDF-2700
See merge request espressif/esp-idf!13795
2021-06-09 00:02:30 +00:00
Jiang Jiang Jian
5cbea220b0
Merge branch 'feature/decouple_esp_phy' into 'master'
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esp_phy: decouple esp_phy component from esp_wifi and bt
See merge request espressif/esp-idf!13742
2021-06-04 05:20:17 +00:00
Shu Chen
6061a547e5
esp_phy: decouple esp_phy component from esp_wifi and bt
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* add esp-phy-lib submodule
* move libphy.a and phy_init.c from esp_wifi to esp_phy
* move librtc.a from esp_wifi to esp_phy
* move libbtbb.a from bt to esp_phy
* corresponding updates to build system
2021-06-03 16:17:31 +08:00
Angus Gratton
dc6b950257
doc: Add performance guides for execuion speed, binary size, RAM usage
...
Closes https://github.com/espressif/esp-idf/issues/7007
Closes https://github.com/espressif/esp-idf/issues/6715
Closes https://github.com/espressif/esp-idf/issues/3781
Closes https://github.com/espressif/esp-idf/issues/2566
2021-06-03 13:55:34 +10:00
Martin Vychodil
1e58eb6928
system/security: Memprot bypassing mitigation
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Check Memprot lock bit(s) during the system startup, abort/reset on any Memprot parts found locked during this phase.
There is no legal reason to disallow the Memprot configuration by the system, so it's either a critical bug in the
application or an malicious attempt to bypass the system security.
Error message is printed before digital system reset.
Closes IDF-2700
2021-06-01 00:07:09 +02:00
Dmitry
00a7ecb5a3
Code cleanup. Bugfix after rebase with master. Formating.
2021-05-13 15:03:40 +03:00
Dmitry
f8197c2446
Fix problem with panic handler with gdbstubs.
2021-05-11 16:09:32 +03:00
Dmitry
7bb91f912c
gdbstub component
2021-05-11 15:55:39 +03:00
Ivan Grokhotkov
c88287851d
Merge branch 'feature/raise_log_level' into 'master'
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feature: Set maximum log level, add startup time example
Closes IDFGH-3599 and IDFGH-333
See merge request espressif/esp-idf!12714
2021-05-03 08:52:27 +00:00
Jiang Jiang Jian
efb9f87951
Merge branch 'bugfix/fix_728_series_reboot_failure' into 'master'
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[system]: Fix two (re)boot failure issues on ESP32S3Beta
Closes WIFI-3548, WIFI-3559, and IDF-3170
See merge request espressif/esp-idf!13268
2021-04-30 03:20:47 +00:00
Michael (XIAO Xufeng)
76fbb689fd
Merge branch 'bugfix/remove_uart2_c3' into 'master'
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uart: remove misleading ld files and soc defs for UART2
See merge request espressif/esp-idf!13340
2021-04-29 05:18:25 +00:00
wuzhenghui
57d43d1bc5
fix 728 series reboot failure
2021-04-29 03:10:47 +00:00
Jeroen Domburg
2c75f63f89
* ets_delay_us(1) has too much overhead; change logic
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* Fix MR comments
2021-04-28 16:38:24 +08:00
Michael (XIAO Xufeng)
a0d13a31ec
uart: fix misleading files for UART2
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Includes: header files, ld files and clk.c
ESP32-C3 only have UART0 and UART1.
2021-04-27 17:40:19 +08:00
Angus Gratton
69309c88a0
Merge branch 'bugfix/fix_c3_typos' into 'master'
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esp32c3: fix typos of c3 path
See merge request espressif/esp-idf!13318
2021-04-23 13:05:09 +00:00
Shu Chen
ff3320ca8a
esp32c3: fix typos of c3 path
2021-04-23 18:11:39 +08:00
Angus Gratton
6e80811ca2
log: Remove redundant definition of LOG_LOCAL_LEVEL
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After adding a maximum setting, the default value of LOG_LOCAL_LEVEL
will be CONFIG_LOG_MAXIMUM_LEVEL not CONFIG_LOG_DEFAULT_LEVEL
2021-04-23 18:13:04 +10:00
Ivan Grokhotkov
9069f70db3
system: add option to enable undefined behavior sanitizer (UBSAN)
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Closes https://github.com/espressif/esp-idf/issues/1574
2021-04-22 23:33:45 +02:00
Omar Chebib
bb9aa806f7
panic: handlers can now be placed in flash
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By unchecking "Place panic handler code in IRAM" in the menuconfig,
the panic handlers will be placed in flash. Of course, flash cache must
be activated when entering panic handlers.
2021-04-15 11:58:46 +08:00