cpu retention: add riscv core sleep critical and non-critical register layout structure definition
cpu retention: add assembly subroutine for cpu critical register backup and restore
cpu retention: add cpu core critical register context backup and restore support
cpu retention: add cpu core non-critical register context backup and restore support
cpu retention: add interrupt priority register context backup and restore support
cpu retention: add cache config register context backup and restore support
cpu retention: add plic interrupt register context backup and restore support
cpu retention: add clint interrupt register context backup and restore support
cpu retention: wait icache state idle before pmu enter sleep
Initialize the pmu sleep machine constant when pmu is initialized, and calculate
the pmu sleep time adjustment value and hardware configuration value according
to the machine constant during system sleep.
Calibrate fast OSC before each sleep and use the calibration value to calculate
PMU hardware wait cycles when use the fast OSC as the work clock.
1. add check in the gdma driver, to prevent multiple channels connecting
to the same peripheral
2. memory copy DMA ID will occupy the peripheral's DMA ID on some ESP
targets (e.g. esp32c3/s3). We should search for a free one when
install async memcpy driver.
Closes https://github.com/espressif/esp-idf/issues/10575
Since DRAM and IRAM are superposed on esp32c6 it is not necessary to convert a freshly allocated
DRAM addr to its IRAM equivalent when MALLOC_CAP_EXEC is passed to heap_caps_malloc(). Instead,
proceed with a default allocation since the address returned by multi_heap_malloc() already belongs
to the IRAM region.
Applies for esp32c6 and every boards with superposed DRAM and IRAM addresses.
esp_hw_support: Adds APIs to define user own MAC addresses without generation from the base MAC address
Closes IDFGH-5534 and IDFGH-8022
See merge request espressif/esp-idf!21036
1. Fix deep sleep wakeup IOs can not be unhold issue
2. Correct hold related APIs' description
3. Fix gpio_force_hold_all API
docs: Add GPIO wakeup source to sleep_modes doc for ESP32C3 and C2
API `esp_ds_encrypt_params` do not require aligned and DMA capable
output buffer for C3/S3/H2/C6. Implementation in ROM code has been
updated to remove usage of DMA mode.
This commit updates the API documentation.
esp_light_sleep_start() will stall the other CPU via esp_ipc_isr_stall_other_cpu(). After stalling the other CPU,
will call esp_clk_... API which themselves take locks. If the other stalled CPU is holding those locks, this will
result in a deadlock.
This commit adds a workaround calling esp_clk_private_lock() to take the lock before stalling the other CPU.
- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.
This commit marks all functions in soc_hal.h and soc_ll.h as deprecated.
Users should use functions from esp_cpu.h instead.
Also added missing wrap funcions for esp_cpu_stall() in test_panic.c files.
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
This function removes the following legacy atomic CAS functions:
From compare_set.h (file removed):
- compare_and_set_native()
- compare_and_set_extram()
From portmacro.h
- uxPortCompareSet()
- uxPortCompareSetExtram()
Users should call esp_cpu_compare_and_set() instead as this function hides the details
of atomic CAS on internal and external RAM addresses.
Due to the removal of compare_set.h, some missing header includes are also fixed in this commit.
esp_cpu_compare_and_set() abstracts the atomic compare-and-set instruction by
hiding the details of whether the target variable is in internal or external
RAM. This commit updates "spinlocks.h" as follows:
- esp_cpu_compare_and_set() is now called instead of "compare_set.h"
- Refactored spinlock logic to be more optimized and have more stringent sanity checks
This commit fixes esp_cpu_compare_and_set() in the following ways
- Removed call to esp_ptr_external_ram() as it incurred > 80 CPU cycles (due to multiple nested
function calls, and those functions not being in IRAM). We now check manually if the pointer
is in external RAM for increased speed.
- Fixed infinite wait when attempting to get the external_ram_cas_lock. The function should
return immediatley if any part of the compare and set call fails.
- The preprocessor conditions of esp_cpu_compare_and_set() to depend on CONFIG_SPIRAM instead
of SOC_SPIRAM_SUPPORTED. Even if the target supports SPIRAM, we only need the external RAM
compare and set feature if SPIRAM is enabled.
Also fixed incorrect inclusion of esp_intr_alloc.h in esp_cpu.h
Some of the Memory Protection (internal) API functions dealing with per-CPU operations were missing appropriate handling of the CPU count actually configured by CONFIG_FREERTOS_UNICORE. The flaw was fixed across all the places found in the code as the issue was of general type
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:
- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead
Also updated soc_hal.h as follows:
- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.
This commit also updates the XCHAL_ERRATUM_572 workaround by
- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:
- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)
Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
builds for esp_cpu.h
