Commit Graph

66 Commits

Author SHA1 Message Date
Jiang Jiang Jian
3908360e46 Merge branch 'feature/support_bss_in_psram_for_esp32s2_v4.3' into 'release/v4.3'
[system] Allow .bss segment placed in external memory for ESP32-S2 ( backport v4.3)

See merge request espressif/esp-idf!14946
2021-09-15 08:09:42 +00:00
Wu Zheng Hui
4fd6d3deae Adjust the variable name &
Add mapping support for different sizes of spi ram
2021-09-15 16:09:33 +08:00
Roland Dobai
9032828325 Merge branch 'bugfix/idf_size_wrong_memory_calculations_v4.3' into 'release/v4.3'
Tools: Fix memory calculations of idf_size.py (v4.3)

See merge request espressif/esp-idf!14933
2021-09-08 09:11:57 +00:00
simon.chupin
34ab97f081 Tools: Fix memory calculations of idf_size.py 2021-09-01 16:36:48 +02:00
Michael (XIAO Xufeng)
7716134457 idf_size.py: fixed diram counted twice issue, and improve display
Currently static RAM usage are listed under corresponding physical
memory.

ld: fix linker script for C3 and S3
2021-09-01 16:36:47 +02:00
Marius Vikhammer
78392f0e84 ULP: reduce max possible memory reserved for ULP coprocessor
Some RTC slow memory is reserved by IDF, reduce CONFIG_TARGET_ULP_COPROC_RESERVE_MEM
range to reflect this.

Closes https://github.com/espressif/esp-idf/issues/7073
2021-07-31 14:10:57 +08:00
Ivan Grokhotkov
64057d302a esp32[s2,s3]: fix _flash_rodata_align value in the linker scripts
Regression from 4702feeee. The TLS segment is located inside
.flash.rodata, so we need to get the alignment of that section, not
.flash.rodata_noload.
2021-07-02 08:37:47 +02:00
Zhang Jun Hao
5e600d5b31 esp_wifi: move unused WiFi log to noload section to save binary size 2021-07-01 14:11:38 +08:00
Angus Gratton
362c9234dc Merge branch 'bugfix/fix_ld_relinking_on_modification_v4.3' into 'release/v4.3'
build: fix linker scripts edition not triggering a rebuild (backport v4.3)

See merge request espressif/esp-idf!13450
2021-06-22 00:29:11 +00:00
Angus Gratton
9f6e09d0d3 Merge branch 'bugfix/flash_rodata_any_alignement_v4.3' into 'release/v4.3'
build: Fix cache issue and add dedicated section for (Custom) App version info (backport v4.3)

See merge request espressif/esp-idf!13448
2021-06-22 00:23:49 +00:00
Marius Vikhammer
8efb2bb1ed ci: run Example_GENERIC for C3
Add support for running example_GENERIC tests for C3 on label.

Fix examples that fail.
2021-05-20 14:32:47 +10:00
Omar Chebib
831d470a75 build: fix linker scripts edition not triggering a rebuild
Fix the dependencies in CMakeLists files for triggering a relink
when linker script file is modified.
2021-05-06 12:19:01 +08:00
Ivan Grokhotkov
b7707c54ce freertos: fix TLS run-time address calculation
Since dd849ffc, _rodata_start label has been moved to a different
linker output section from where the TLS templates (.tdata, .tbss)
are located. Since link-time addresses of thread-local variables are
calculated relative to the section start address, this resulted in
incorrect calculation of THREADPTR/$tp registers.

Fix by introducing new linker label, _flash_rodata_start, which points
to the .flash.rodata output section where TLS variables are located,
and use it when calculating THREADPTR/$tp.

Also remove the hardcoded rodata section alignment for Xtensa targets.
Alignment of rodata can be affected by the user application, which is
the issue dd849ffc was fixing. To accommodate any possible alignment,
save it in a linker label (_flash_rodata_align) and then use when
calculating THREADPTR. Note that this is not required on RISC-V, since
this target doesn't use TPOFF.
2021-05-06 11:42:14 +08:00
Omar Chebib
375f969d43 build: (Custom) App version info is now on a dedicated section, independent of the rodata alignment
It is now possible to have any alignment restriction on rodata in the user
applicaiton. It will not affect the first section which must be aligned
on a 16-byte bound.

Closes https://github.com/espressif/esp-idf/issues/6719
2021-05-06 11:40:57 +08:00
Omar Chebib
c29dbda5fd build: fix cache issue when .flash.text section alignment is uncommon
rodata dummy section has now the same alignment as flash text section,
and at least the same size. For these reasons, the cache will map
correctly the following rodata section.
2021-05-06 11:40:47 +08:00
Omar Chebib
84dc42c4b0 gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
2021-04-12 17:45:06 +08:00
Angus Gratton
da47503c14 Merge branch 'bugfix/deep_sleep_skip_verify_rtc_mem_heap_v4.3' into 'release/v4.3'
Fix bootloader "skip validate on exiting deep sleep" option if "use RTC memory as heap" is enabled (v4.3)

See merge request espressif/esp-idf!13096
2021-04-12 08:18:21 +00:00
Angus Gratton
03b0540bc6 esp32s3: Reserve RTC memory in bootloader in the app linker script 2021-04-09 19:15:43 +10:00
Marius Vikhammer
5036ec363b soc: add dummy bytes to ensure instr prefetch always valid
The CPU might prefetch instructions, which means it in some cases
will try to fetch instruction located after the last instruction in
flash.text.

Add dummy bytes to ensure fetching these wont result in an error,
 e.g. MMU exceptions
2021-04-01 10:23:44 +08:00
Angus Gratton
82ffb33085 Merge branch 'feature/crypto_reserve_gdma_ch_v4.3' into 'release/v4.3'
aes/sha: use a shared lazy allocated GDMA channel for AES and SHA (v4.3)

See merge request espressif/esp-idf!12676
2021-03-11 10:50:09 +00:00
aleks
32b0836485 driver: esp32s3 fix UART driver
Fix set UART2 instance to correct base address (esp32s3 has non standard base periph address)
2021-03-10 13:41:10 +08:00
Marius Vikhammer
1c8fd4041e aes/sha: use a shared lazy allocated GDMA channel for AES and SHA
Removed the old dynamically allocated GDMA channel approach.
It proved too unreliable as we couldn't not ensure consumers of the mbedtls
would properly free the channels after use.

Replaced by a single shared GDMA channel for AES and SHA, which won't be
released unless user specifically calls API for releasing it.
2021-03-10 09:40:35 +08:00
Marius Vikhammer
c6ed522d60 deep_sleep: on S2 disable the brown out detector before deep sleeping
On S2 the brown out detector would occasionally trigger erroneously during deep sleep.

Disable it before sleeping to circumvent this issue.

Closes https://github.com/espressif/esp-idf/issues/6179
2021-02-25 10:53:06 +08:00
morris
d212e698d7 rtc: fix rtc slow memory layout on esp32s3 2021-02-02 20:03:08 +08:00
Jiang Jiang Jian
9eae54f3be Merge branch 'bugfix/fix_a2dp_sink_crash_due_to_ble5.0_code' into 'master'
fix a2dp sink crash due to ble 5.0 code

Closes BT-1358, BT-1354, and BT-1356

See merge request espressif/esp-idf!12170
2021-01-28 19:41:54 +08:00
zhiweijian@espressif.com
28fd413bf5 fix ble restart faild when enable ble sleep 2021-01-27 14:45:03 +08:00
Fu Hanxi
e4e375f488 fix: add spi_flash.h for s2, s3, c3 targets in cpu_start.c
update s2, s3, c3 ld files spi_flash_attach to esp_rom_spiflash_attach
2021-01-27 12:35:49 +08:00
Armando
402ccacc10 system: update edma reset in system_api_esp32c3/s3.c 2021-01-25 04:51:40 +00:00
Michael (XIAO Xufeng)
d7d1dee208 system: reset dma when soft reset 2021-01-25 04:51:40 +00:00
Chen Jian Xing
f71adec8fb Support ESP32S3 (beta2) WiFi 2021-01-25 00:18:42 +08:00
Marius Vikhammer
0713e93b8f TWAI: bringup for S3 and C3 2021-01-14 20:30:31 +08:00
Angus Gratton
f683db7aea Merge branch 'feature/c3_IDF-2554' into 'master'
global: Uses CCOUNT API instead of XTHAL macro

Closes IDF-2554

See merge request espressif/esp-idf!11954
2021-01-13 12:55:21 +08:00
KonstantinKondrashov
dada7cd035 global: Uses CCOUNT API instead of XTHAL macro 2021-01-12 16:24:23 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
Angus Gratton
1b0442b963 Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master'
esp_system: make rtc fast memory to heap configuration unified across chips

Closes IDF-2503

See merge request espressif/esp-idf!11693
2020-12-29 11:41:05 +08:00
Mahavir Jain
880a63b2e9 esp_system: make rtc fast memory to heap configuration unified across chips
Closes IDF-2503
2020-12-24 09:46:35 +05:30
Angus Gratton
55155c3f82 esp_system: Rename _init_start symbol to _vector_table 2020-12-24 13:40:01 +11:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
KonstantinKondrashov
e9978f7623 esp32xx: Fix default values for all RTC sources in RTC_CLK_CAL_CYCLES option
Closes: https://github.com/espressif/esp-idf/issues/6037
2020-10-28 16:25:07 +08:00
Angus Gratton
f806261964 Merge branch 'bugfix/fix_rtc_io_hal_desc' into 'master'
Sleep related minor description fixes

Closes IDFGH-3868

See merge request espressif/esp-idf!10725
2020-10-26 18:48:03 +08:00
Renz Bagaporo
b3a7c6e27e components: remove some unneeded headers from source files 2020-10-22 19:37:10 +08:00
Renz Bagaporo
0aa9ee5b24 esp32s3: delete duplicate esp32s3 2020-10-22 20:01:59 +11:00
Ivan Grokhotkov
902d630102 Merge branch 'bugfix/delete_duplicate_s3_pm_configs' into 'master'
esp32s3: delete duplicate s3 pm configs

See merge request espressif/esp-idf!10715
2020-10-22 16:45:19 +08:00
Angus Gratton
e5f06d7f47 Merge branch 'feature/esp32s3_support_gettimeofday' into 'master'
time: Fix gettimeofday for ESP32-S3

See merge request espressif/esp-idf!10871
2020-10-20 14:09:36 +08:00
Konstantin Kondrashov
9386cafbc3 time: Fix gettimeofday for ESP32-S3 2020-10-20 14:09:32 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
Angus Gratton
ff4d82c7d2 Merge branch 'feature/sha_hal' into 'master'
SHA: add HAL layer and refactor

See merge request espressif/esp-idf!10065
2020-10-12 15:15:28 +08:00
Michael (XIAO Xufeng)
953c046550 esp32s3/bootloader: extend IRAM usage to 0x6000
The bootloader cannot fit in the size of iram_loader_seg when built under -O0. Extend the IRAM size to fix this.
2020-10-09 17:50:17 +08:00
Marius Vikhammer
949fb8e63a SHA: add HAL layer and refactor driver
Add a LL and HAL layer for SHA.
2020-10-09 08:24:08 +00:00