esp-idf/components/esp32s3
Ivan Grokhotkov b7707c54ce freertos: fix TLS run-time address calculation
Since dd849ffc, _rodata_start label has been moved to a different
linker output section from where the TLS templates (.tdata, .tbss)
are located. Since link-time addresses of thread-local variables are
calculated relative to the section start address, this resulted in
incorrect calculation of THREADPTR/$tp registers.

Fix by introducing new linker label, _flash_rodata_start, which points
to the .flash.rodata output section where TLS variables are located,
and use it when calculating THREADPTR/$tp.

Also remove the hardcoded rodata section alignment for Xtensa targets.
Alignment of rodata can be affected by the user application, which is
the issue dd849ffc was fixing. To accommodate any possible alignment,
save it in a linker label (_flash_rodata_align) and then use when
calculating THREADPTR. Note that this is not required on RISC-V, since
this target doesn't use TPOFF.
2021-05-06 11:42:14 +08:00
..
include aes/sha: use a shared lazy allocated GDMA channel for AES and SHA 2021-03-10 09:40:35 +08:00
ld freertos: fix TLS run-time address calculation 2021-05-06 11:42:14 +08:00
cache_err_int.c esp32s3: clk, memory layout 2020-07-27 13:05:22 +08:00
clk.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
CMakeLists.txt Updates for riscv support 2020-11-13 07:49:11 +11:00
component.mk esp32s3: initial empty component 2020-07-20 10:51:05 +08:00
crosscore_int.c esp32s3: clk, memory layout 2020-07-27 13:05:22 +08:00
dport_access.c esp32s3: clk, memory layout 2020-07-27 13:05:22 +08:00
esp_crypto_lock.c aes/sha: use a shared lazy allocated GDMA channel for AES and SHA 2021-03-10 09:40:35 +08:00
hw_random.c global: Uses CCOUNT API instead of XTHAL macro 2021-01-12 16:24:23 +08:00
Kconfig esp_system: make rtc fast memory to heap configuration unified across chips 2020-12-24 09:46:35 +05:30
linker.lf esp32s3: clk, memory layout 2020-07-27 13:05:22 +08:00
Makefile.projbuild esp32s3: initial empty component 2020-07-20 10:51:05 +08:00
memprot.c esp32s3: sync memprot header from esp32s2, fixing compilation error 2020-10-08 22:20:39 +02:00
README.md esp32s3: initial empty component 2020-07-20 10:51:05 +08:00
spiram_psram.c gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3 2021-04-12 17:45:06 +08:00
spiram_psram.h psram: support psram for esp32s3 2020-09-22 15:15:03 +08:00
spiram.c support flash instr and rodata copy to SPIRAM 2020-09-22 15:15:03 +08:00
system_api_esp32s3.c fix ble restart faild when enable ble sleep 2021-01-27 14:45:03 +08:00

ESP32-S3 component

This directory contains support for the upcoming ESP32-S3 SoC. This code is still work in progress and not intended for public use.

Please follow announcements on espressif.com and esp32.com to be informed about the ESP32-S3 SoC.

This note will be removed once the ESP32-S3 initial support is ready.