No longer necessary to keep all reserved addresses in 'soc'.
Means 'soc' does not need to know about 'bt', for example.
Also means that Bluetooth can be enabled in config without any memory being reserved for BT
controller. Only if code calling the BT controller is linked in, will this memory be reserved...
1. Modify esp_bt_controller_mem_release() to release BTDM BSS and Data to heap if
ESP_BT_MODE_BTDM mode is passed to it
2. Add a new API esp_bt_mem_release() which internally calls
esp_bt_controller_mem_release() with the provided mode and then if mode
is ESP_BT_MODE_BTDM, releases BT BSS and Data to heap.
Background:
For Wi-Fi and BT/BLE applications, for e.g. the usecase is like when
Bluetooth is used for provisioning and once the device is connected to the Wi-Fi
AP, we can turn off Bluetooth completely. In such scenarios, it should be possible to
reclaim all the memory of Bluetooth. Although, currently this does not
happen.
Experiment:
Made the following modifications to examples/bluetooth/gatt_server :
1. Added support of simple_wifi to it
2. Moved all the bluetooth related code under CONFIG_BT_ENABLED config
option
3. Calculated the free heap in 2 similar scenarios:
i. Disabled BT (CONFIG_BT_ENABLED undefined) and checked the free
heap after STA connected
ii. Kept BT enabled and disabled it after STA connected and checked
the free heap
Ideally, the numbers for i., ii. above should have been similar. But
there was a delta of almost 30-31K. (i. > ii.)
4. Through make size-components checked the common BSS for libbta.a and libbtdm_app.a
and found it to be almost 30K. Data is around 1K
Solution:
1. Modified the linker script to mark the BSS and Data for these libraries and
free it when ESP_BT_MODE_BTDM mode is passed to mem release APIs.
2. Verified that the free heap is comparable for i. and ii. above.
Note: It is known that once this is done, Bluetooth can only be used
again post reboot.
Signed-off-by: Hrishikesh Dhayagude <hrishi@espressif.com>
1. provide options for bluetooth low power mode
2. provide two options for bluetooth low power clock: main XTAL and external 32kHz XTAL
3. provide function and callbacks to control bluetooth low power mode, including enable/disable sleep, software wakeup request, low power clock settings, check power state, etc
4. modify vhci API vhci_host_send_packet to use blocking mode
5. note that DFS and bluetooth modem sleep can not be used together currently.
Added .rtc_noinit and .noinit section definitions into linker file /esp32/ld/esp32.common.ld.
The macro __NOINIT_ATTR, RTC_NOINIT_ATTR declared in esp32/esp_attr.h file.
Added unit test file to test added behavior for noinit variables and its attributes.
Added documentation changes for new added attributes.
Make some corrections after code review:
The linker file has been corrected to place noinit section before bss_start to make it safer.
Documentation file has been modified to clarify reset behavior of allocated data .
Corrected typos in test_noinit.c and removed assertion of noinit variable to avoid possible issues with ROM boot loader memory allocation.
The linker file has been corrected to place noinit section before bss_start to make it safer.
Documentation file has been modified to clarify reset behavior of allocated data .
Corrected typos in test_noinit.c and removed assertion of noinit variable to avoid possible issues with ROM boot loader memory allocation.
Update test_noinit.c file to address RTCWDT_RTC_RESET reset reason instead of POWERON_RESET.
Test optimized to pass automated unit testing.
esp32: Add .noinit and .rtc_noinit sections to the linker script
Update of general-notes.rst documentation to fomat examples as code and attributes as identifiers.
Test test_noinit.c corrected to pass automated testing (support ofTEST_CASE_MULTIPLE_STAGES())
https://ezredmine.espressif.cn:8765/issues/15878
1. Put some lwip udp rx/tx relating functions to IRAM
2. Put some wifi rx/tx relating functions to IRAMa
3. Reduce wifi dynamic malloc from 4 to 1 for each ebuf
4. Update iperf example accordingly
5. Update libphy.a to v383
In release mode, switches in rtc_clk_bbpll_set would be converted to
jump tables. These tables would be placed into .rodata, which caused
rtc_clk_cpu_freq_set to be unusable while cache is disabled. This
manifested itself in crashes when exiting from light sleep:
https://esp32.com/posting.php?mode=reply&f=13&t=3089#pr14590
1. Support built-in ADC for I2S.
2. Modify code of ADC, made no change to the original APIs.
3. Add APIs in I2S:
esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel);
4. Add I2S ADC/DAC example code.
5. add old-fashion definition to make it more compatible
6. replase spi_flash_ APIs with esp_partition_ APIs
7. add example of generating audio table from wav
8. change example sound
1. Occupy conn[9] for adv. The max connection number of bluetooth controller decrease to 9. (Previously, it is 10)
2. modify the enum of setting BLE TX power corresponding to connection's.
3. fix libbtdm_app.a cwitch jump table
1. add sens_struct.h
2. add definition of RTCCNTL and RTCIO
3. modify touch pad examples
4. update example code.
5. add comments add option in menuconfig
6. fix issue that pad index 8 and 9 are mismatched
7. add touch_pad_read_filtered() api to get value filtered by iir filter
8. modify touch pad isr func
9. Make the items in perihperal.ld in the sequence of address
10. delete Kconfig for touch pad
11. add touchpad filter APIs to adjust the filter
12. add touch_pad into index.rst
13. add touch_pad in Doxyfile
14. add touch_pad.rst
Specifying -fexceptions for the compiler is not enough.
- add necessary zero padding after .eh_frame section
- link .gcc_except_table_table in a way flash script does not complain
- call __registrer_frame_info before global constructors
Kudos jcmvbkbc for the necessary help.
Implements support for system level traces compatible with SEGGER
SystemView tool on top of ESP32 application tracing module.
That kind of traces can help to analyse program's behaviour.
SystemView can show timeline of tasks/ISRs execution, context switches,
statistics related to the CPUs' load distribution etc.
Also this commit adds useful feature to ESP32 application tracing module:
- Trace data buffering is implemented to handle temporary peaks of events load
1. Name change from chopper to carrier, block diagram update, minor changes to example codes
2. mcpwm_reg.h changed, brought uniformity in comments, worked on suggestions, duty to accept float. Some name changes!
3. Minor readme changes and Indetation
4. Minor change: move mcpwm_reg.h and mcpwm_struct.h to new path
5. Minor change: addition of BLDC example code and Readme
6. Name changed from epwm to mcpwm
7. Improve the reg name in mcpwm_struct.h
8. Name change chopper>carrier, deadband>deadtime
1. fix some bugs in bluetooth sniff mode in controller
2. export some symbols to esp32.rom.ld including functions and global variables in ROM code
3. update libbtdm.a which includes "IRAM_ATTR" addition or removal for some functions
There are some RODATAs of libphy.a that are called in ISR. So need
to put them into DRAM to avoid access them when R/W SPI flash. Due
to the RODATAs which are called in ISR haven't been picked out to
put into DRAM, put all of the RODATA of libphy.a into DRAM. This
will be optimized in the future.
- Implements application tracing module which allows to send arbitrary
data to host over JTAG. This feature is useful for analyzing
program modules behavior, dumping run-time application data etc.
- Implements printf-like logging functions on top of apptrace module.
This feature is a kind of semihosted printf functionality with lower
overhead and impact on system behaviour as compared to standard printf.
Confusion here is that original ROM has two functions:
* SPIReadModeCnfig() - sets mode, calls enable_qio_mode/disable_qio_mode
* SPIMasterReadModeCnfig() - As above, but doesn't set QIO mode in status register
However we never want to use the ROM method to set/clear QIO mode flag, as not all flash chips work this way. Instead we
do it in flash_qio_mode.c in bootloader.
So in both cases (ROM or "patched ROM") we now call SPIMasterReadModeCnfig(), which is now named
esp_rom_spiflash_config_readmode().
Introduce soc component, add source of rtc_clk and rtc_pm libraries
This MR adds parts of the RTC library source code (initialization, clock selection functions, sleep functions). WiFi-related power management functions are kept inside the precompiled library. Most of RTC library APIs have been renamed.
Default CPU frequency option in Kconfig is set to 160MHz, pending qualification of 240MHz mode at high temperatures.
Register header files are moved into the new soc component, which will contain chip-specific header files and low-level non-RTOS-aware APIs (such as rtc_ APIs). Some of the files from ESP32 component were also moved: cpu_util.c, brownout.c, and the corresponding header files. Further refactoring of ESP32 component into more meaningful layers (chip-specific low level functions; chip-specific RTOS aware functions; framework-specific RTOS-related functions) will be done in future MRs.
See merge request !633
1) fixed SPI_read_status: added check for flash busy flag in matrix mode
2) fixed SPI_page_program: enable write before writing data to SPI FIFO
3) SPI flash ROM funcs replacement is controlled via menuconfig option
Reset WIFI mac when wifi start and update wifi lib
1. reset wifi mac when wifi start
2. roll back rx hung workaround for beacon timeout
3. fix amsdu ap interface wrong issue
4. fix amsdu header parse error
5. fix amsdu flag wrong issue
6. PHY: V350, fix BT rssi bug
7. RTC: V225, fix bt will be not work when wifi is reset
See merge request !606
SPI flash operations lock for shorter periods
Based on bug report here:
https://esp32.com/viewtopic.php?f=13&t=1489&p=6816#p6773
Long SPI flash erase (and possibly write/read) cycles block all tasks on both CPUs for an extended period, and can lead to WiFi dissassociation (and general priority inversion.)
This MR inserts preemption breaks into large operations (all erases, writes every 8KB, reads every 16KB).
Overhead of a single spi_flash_guart_start()/spi_flash_guard_end() cycle measured at approx 67us (assuming no preemption.)
See merge request !600
1. reset wifi mac when wifi start
2. roll back rx hung workaround for beacon timeout
3. fix amsdu ap interface wrong issue
4. fix amsdu header parse error
5. fix amsdu flag wrong issue
6. PHY: V350, fix BT rssi bug
7. RTC: V225, fix bt will be not work when wifi is reset
This is to avoid confusion when idf_monitor prints the first symbol in each section, ie "WindowOverflow4" or similar,
when bootloader prints the section mapping address.
Closes#447https://github.com/espressif/esp-idf/issues/447
1. Add disable PHY and RF when WiFi and BT are both disabled(including call sniffer disable API).
2. Do not init PHY and RF when cpu start. Init PHY and RF when call Wifi or BT start APIs(including sniffer enable API).
3. Add a temporary lib: librtc_clk.a and will delete it when CPU frequency switching function is done.
4. Add an function to get OS tick rate.
5. Do not put the whole pp.a in iram0, only put lmac.o, ieee80211_misc.o, ets_time.o and wdev.o in iram0.
Deep sleep stub may call ets_update_cpu_frequency, which has been moved from ROM to IRAM.
Restore the ROM version in the linker script, call it ets_update_cpu_frequency_rom, use it in the deep sleep stub.
esp32: ets_update_cpu_frequency should set tick scale for both CPUs
ets_update_cpu_frequency ROM function updates g_ticks_per_us, which is has two copies, one for each CPU.
The APP CPU copy of g_ticks_per_us never got updated, resulting in shorter delays produced by ets_delay_us on the APP CPU.
This MR replaces ROM ets_update_cpu_frequency with a copy in IRAM which updates scaling factors on both of the CPUs.
So now we get expected delays (in microseconds):
```
ets_delay_us core=0 expected=50000 actual=50014
ets_delay_us core=1 expected=50000 actual=50015
vTaskDelay core=0 expected=50000 actual=49428
vTaskDelay core=1 expected=50000 actual=50000
```
Reported on the forum: http://esp32.com/viewtopic.php?f=2&t=713#p3722
See merge request !373
This change reduces chances that a large .bss segment will push .data all the way into
0x3ffe1320 — 0x3ffe5320 range where the bootloader stack is, creating a problem when
bootloader will be loading application into memory.
With this change, .data would need to be at least 200k big to cause problems.
- add two versions of libc: libc.a and libc_nano.a. First one has full C99 formatting support, second one uses “nano” formatting functions available in ROM.
- fix linker error for fmod, fmodf, atof, atoff
- update tests
Deep sleep: Any source named rtc_wake_stub* is linked as RTC wake stub code
Also move esp_deepsleep.h documentation out to docs/deep-sleep-stub.rst
See merge request !142
We reserve 4KB Slow RTC memory to save RF calibation result and BT NVS data.
If not all these Slow RTC momory Blocks are used, we will open the other parts.
