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710c853adc
SPI flash operations lock for shorter periods Based on bug report here: https://esp32.com/viewtopic.php?f=13&t=1489&p=6816#p6773 Long SPI flash erase (and possibly write/read) cycles block all tasks on both CPUs for an extended period, and can lead to WiFi dissassociation (and general priority inversion.) This MR inserts preemption breaks into large operations (all erases, writes every 8KB, reads every 16KB). Overhead of a single spi_flash_guart_start()/spi_flash_guard_end() cycle measured at approx 67us (assuming no preemption.) See merge request !600 |
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elf_to_ld.sh | ||
esp32.common.ld | ||
esp32.ld | ||
esp32.peripherals.ld | ||
esp32.rom.ld | ||
esp32.rom.nanofmt.ld |