Commit Graph

103 Commits

Author SHA1 Message Date
Anton Maklakov
d1db4d0c1b system: add missing header 2022-05-30 12:43:23 +07:00
Marius Vikhammer
9362434c47 build-system: add property for architecture (riscv/xtensa)
riscv/xtensa is now a common component.
2022-05-20 09:00:32 +08:00
Erhan Kurubas
ad078c5153 semihosting: drop absolute path support 2022-05-05 09:12:42 +00:00
Erhan Kurubas
0fc0254734 semihosting: version 2 2022-05-05 09:12:42 +00:00
Marius Vikhammer
e543e97c7b system: fix SET_STACK macro crashing in windowoverflow8 exception
If a windowoverflow8 happened after changing the SP, the exception handler would look for
the extra save area by looking at the previous frame's SP. This SP would be a garbage value
and could cause the windowoverflow exception to write to invalid memory ares.
2022-03-04 15:25:52 +08:00
Darian Leung
1c60d6a895 freertos: Add SPDX license identifiers and update xtensa port files
This commit does the following:

- Adds SPDX license identifiers to FreeRTOS sources. Remove those FreeRTOS sources from
  the copyright ignore list.
- Update xtensa port files to match FreeRTOS v10.4.3. Added SPDX license identifiers
  to the port files.
- Fixed some improperly licensed files
- Removed portbenchmark.h from RISC-V port
2022-02-03 17:08:14 +08:00
Ivan Grokhotkov
aeed91b589 xtensa: fix semihosting arguments potentially begin optimized out
The compiler was not informed that the assembly block should be
treated as a memory barrier and could optimize out the initialization
of local arrays which could be used as semihosting arguments.
This resulted in garbage values being passed as semihosting call
arguments.

Additionally this commit changes the approach for placing values into
specific register. Instead of clobbers, local register variables are
used. This results in simpler generated code, since the compiler is
able to place values directly into the registers used for semihosting
arguments, avoiding additional moves.
2022-01-20 19:48:05 +01:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Ivan Grokhotkov
876f4d6a1c vfs: add support for semihosting on ESP32-C3 2022-01-14 17:29:03 +01:00
morris
113cbb88a6 hw_support: remove deprecated header files 2022-01-04 14:16:17 +08:00
Sudeep Mohanty
e22b4007d3 esp_hw_support: Removed deprecated CPU util functions
The following files were deleted:
- components/esp_hw_support/include/soc/cpu.h
- components/soc/esp32s3/include/soc/cpu.h

The following functions are deprecated:
- get_sp()

The following functions declared in soc/cpu.h are now moved to esp_cpu.h:
- esp_cpu_configure_region_protection()

The following functions declared in soc/cpu.h are now moved to components/xtensa/include/esp_cpu_utils.h:
- esp_cpu_process_stack_pc()

All files with soc/cpu.h inclusion are updated to include esp_cpu.h instead.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-28 16:58:37 +05:30
Roland Dobai
2b9c81cbdc xtensa: Pass the test with latest gdb 2021-11-22 18:17:36 +01:00
Roland Dobai
1c22f1e15e xtensa: Revert back Makefile for trax test
Revert back the regression of 766aa57084
2021-11-22 18:02:08 +01:00
Roland Dobai
766aa57084 Build & config: Remove leftover files from the unsupported "make" build system 2021-11-11 15:32:36 +01:00
Cao Sen Miao
599227a1b6 ESP8684: Add esp8684 target to other repo for passing build 2021-11-06 17:33:45 +08:00
Shu Chen
75bd02bd46 esp32h2: add some more fixes and TODOs 2021-07-01 20:36:39 +08:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
2b9e8fed71 esp32h2: add esp32h2 build target
Add esp32h2 support in the following components:
 * Kconfig
 * components/esptool_py
 * components/riscv
 * components/xtensa
 * tools
2021-07-01 19:51:33 +08:00
Ivan Grokhotkov
3ce1fa70aa xtensa: update libhal for esp32s3
Built from:
  https://github.com/foss-xtensa/xtensa-hal (commit b014610)

With toolchain:
  xtensa-esp32s3-elf-gcc (crosstool-NG esp-2021r1) 8.4.0

Commands:

  ./configure --host=xtensa-esp32s3-elf CC=xtensa-esp32s3-elf-gcc \
    CFLAGS="-mlongcalls -I$IDF_PATH/components/xtensa/esp32s3/include"

  make

  xtensa-esp32s3-elf-strip --strip-debug src/hal/libhal.a
2021-06-29 16:56:35 +02:00
Ivan Grokhotkov
ca5ed172a5 xtensa: update configuration overlay for esp32s3
From LX7_ESP32_S3_MP_linux_redist.tgz with SHA256:
63f305a982b2ee94cc78e5c20e3e3eb8bf0edeeaf703af0227a418bc34f7b848
copied from xtensa-elf/arch/include/xtensa/config/ with changes:
1) pre-commit fixes applied
2) re-added CONFIGID0 and CONFIGID1 in specreg.h
2021-06-29 16:56:35 +02:00
Alexey Gerenkov
821869d98d apptrace: Refactors apptrace for better support various tracing HW 2021-06-24 13:16:13 +03:00
Roland Dobai
407053592e Drop support for unsupported Python versions 2021-06-21 21:48:49 +02:00
Jakob Hasse
be55a5eb2b [system]: put xtensa_intr_asm into IRAM 2021-04-26 12:11:20 +08:00
Ivan Grokhotkov
83e68ee19e Merge branch 'bugfix/replace_setjmp_rom' into 'master'
[system]: Made longjmp save for context switch

Closes IDFGH-3232

See merge request espressif/esp-idf!13119
2021-04-23 12:39:29 +00:00
Jakob Hasse
fc22e3c645 [system]: Made longjmp save for context switch
* Patched longjmp to be context-switch safe
  longjmp modifies the windowbase and windowstart
  registers, which isn't safe if a context switch
  occurs during the modification. After a context
  switch, windowstart and windowbase will be
  different, leading to a wrongly set windowstart
  bit due to longjmp writing it based on the
  windowbase before the context switch. This
  corrupts the registers at the next window
  overflow reaching that wrongly set bit.

  The solution is to disable interrupts during
  this code. It is only 6 instructions long,
  the impact shouldn't be significant.

  The fix is implemented as a wrapper which
  replaces the original first instructions of
  longjmp which are buggy. Then, it jumps back
  to execute the rest of the original longjmp
  function.

  Added a comparably reliable test to the
  test apps.
2021-04-23 15:55:31 +08:00
Jakob Hasse
b23c9142d5 [hal]: cleaned up interrupt mask functions
* Functions for setting and clearing interrupts
  as well as function to read interrupt mask
  should be clearer now.
* Using hal layer interrupt set and clear
  functions in esp_wifi component
2021-04-06 11:54:13 +08:00
Renz Bagaporo
daa13b3f62 esp32: move toolchain check 2021-03-31 19:17:33 +08:00
Renz Bagaporo
d920aa52be xtensa: simplify build script 2021-02-26 19:45:48 +08:00
Renz Bagaporo
1efdcd69d9 xtensa: move out trax 2021-02-26 19:45:48 +08:00
Renz Bagaporo
b1027005df arch: move stdatomic 2021-02-26 18:40:00 +08:00
Renz Bagaporo
7e0e91bf76 arch: move debug helpers 2021-02-26 13:34:29 +08:00
Renz Bagaporo
6f7072fc03 arch: move esp_attr.h to esp_common 2021-02-26 13:34:29 +08:00
Renz Bagaporo
91a5770fd2 arch: move shared stack implementation to esp_system 2021-02-26 13:34:29 +08:00
Marius Vikhammer
eec2419390 system: enable shared stack watchpoint
Enable shared stack watchpoint for overflow detection

Enable unit tests:
 * "test printf using shared buffer stack" for C3
 * "Test vTaskDelayUntil" for S2
 * "UART can do poll()" for C3
2021-02-18 15:38:30 +08:00
Fu Hanxi
0146f258d7 style: format python files with isort and double-quote-string-fixer 2021-01-26 10:49:01 +08:00
Renz Bagaporo
d1c800fbbb components: fix ldgen check errors 2021-01-19 11:17:18 +08:00
Angus Gratton
af845b7de2 xtensa: Disable component on esp32c3 2020-12-24 14:18:02 +11:00
martin.gano
f4ea2dcb74 Tools: add Python 2 deprecation warning 2020-12-02 11:08:48 +01:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Renz Bagaporo
e7460c1f00 soc: remove unecessary headers in dport_access.h 2020-10-22 19:42:34 +08:00
Angus Gratton
8aa73aea86 esp32s2/3: Add missing stdlib includes
All three of these headers refer to stdint types, memprot uses stdbool
2020-10-09 15:05:41 +11:00
Felipe Neves
2e826b7a8f intr_alloc: split interrupt allocator into common-code and platform-code
esp_system: removed repeated interrupt allocator code and moved common code to esp_system

xtens: moved xtensa specific code from freertos to the xtensa component

hal/interrupt_controller: added interrupt controller hal and ll files

docs: update the doxyfile with new location of esp_itr_alloc.h file

xtensa: fixed dangerous relocation problem after moving xtensa interrupt files out of freertos

docs: removed Xtensa reference from intr_allocator api-reference

xtensa: pushed the interrupt function that manages non iram interrupts to the xtensa layer

esp_system/test: fixed platform dependent setting for intr_allocator tests

hal: rename the functions used to manage non iram interrupt mask.
2020-09-30 07:44:12 +08:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
Felipe Neves
11f6addc61 expression_with_stack: added a tweak on TCB stackpointers to avoid false trigger of stack overflow 2020-07-14 12:56:02 +00:00
Felipe Neves
a700035a85 test/shared_stack_printf: improved printf with shared stack function test 2020-07-14 12:56:02 +00:00
Felipe Neves
938a73756c esp_common/shared_stack: modifed the stack switch procedure to a simpler way
esp_common/shared_stack: refactored the implemenation of shared stack function (still not working properly)

esp_expression_with_stack: refactored the shared stack function calling mechanism and updated the documentation
2020-07-14 12:56:02 +00:00
Renz Christian Bagaporo
4bc53d44e3 xtensa: use early logging for trax config during startup 2020-06-19 18:40:10 +10:00
Ivan Grokhotkov
4395be9697 Merge branch 'feature/add_esp32s3_xtensa_cpu_config_files' into 'master'
xtensa: add CPU config files for esp32s3

See merge request espressif/esp-idf!9138
2020-06-16 06:40:25 +08:00
Krzysztof Budzynski
79a0e892a0 Merge branch 'feature/coredump_allow_variable_dumping' into 'master'
Added coredump user defined variable into coredump

Closes IDF-44

See merge request espressif/esp-idf!8730
2020-06-15 02:35:38 +08:00