alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity
20,286 Commits 20 Branches 148 Tags 384 MiB
a89ff2677b
Commit Graph

249 Commits

Author SHA1 Message Date
Jiang Jiang Jian
a89ff2677b Merge branch 'bugfix/fix_esp32h2_efuse_get_ext_mac_v4.4' into 'release/v4.4' 
efuse_table_gen: Fixes wrong joining fields with omitted names (v4.4)

See merge request espressif/esp-idf!15735
 2021-12-08 10:12:25 +00:00
Jiang Jiang Jian
67fcfc2e02 Merge branch 'feature/freertos_try_enter_critical_v4.4' into 'release/v4.4' 
freertos: Add portTRY_ENTRY_CRITICAL() and deprecate legacy spinlock fucntions (v4.4)

See merge request espressif/esp-idf!16040
 2021-12-08 10:10:17 +00:00
jingli
1d6c95000b reduce bootup time when using usb-serial-jtag 2021-12-03 20:50:22 +08:00
Darian Leung
c5efb55d43 freertos: Add portTRY_ENTRY_CRITICAL() and deprecate legacy spinlock fucntions 
Add TRY_ENTRY_CRITICAL() API to all for timeouts when entering critical sections.
The following port API were added:
- portTRY_ENTER_CRITICAL()
- portTRY_ENTER_CRITICAL_ISR()
- portTRY_ENTER_CRITICAL_SAFE()

Deprecated legacy spinlock API in favor of spinlock.h. The following API were deprecated:
- vPortCPUInitializeMutex()
- vPortCPUAcquireMutex()
- vPortCPUAcquireMutexTimeout()
- vPortCPUReleaseMutex()

Other Changes:
- Added portMUX_INITIALIZE() to replace vPortCPUInitializeMutex()
- The assembly of the critical section functions ends up being about 50 instructions longer,
  thus the spinlock test pass threshold had to be increased to account for the extra runtime.

Closes https://github.com/espressif/esp-idf/issues/5301
 2021-11-22 18:42:10 +08:00
Omar Chebib
2ca86a3eaf Sleep: fix wrong debug level 
Fix usage of ESP_LOGD in sleep_modes.c which triggers a panic when
used in debug log level.

* Closes https://github.com/espressif/esp-idf/issues/7942
 2021-11-22 16:32:21 +08:00
Li Shuai
e75762b02f sleep: deep sleep does not need cpu and wifi/bt mac retention 2021-11-12 19:38:32 +08:00
zhangwenxu
281598077a efuse: fix esp32h2 get ext_mac 2021-10-29 19:17:51 +08:00
Michael (XIAO Xufeng)
390f71cbcb Merge branch 'bugfix/add_support_for_mspi_to_work_with_cpu_clock_switch' into 'master' 
mspi: make cpu clock source switch safe

Closes IDFCI-902

See merge request espressif/esp-idf!15557
 2021-10-20 08:21:53 +00:00
Li Shuai
a939f7d34b light sleep: add software workaround for esp32s3 gpio reset issue 2021-10-20 11:36:22 +08:00
Li Shuai
62a4587e87 deep sleep: modified to support dual-core mode 2021-10-20 11:36:22 +08:00
Li Shuai
881e1b0fd5 deep sleep: add deep sleep support for esp32s3 2021-10-20 11:36:20 +08:00
Armando
c331c85318 mspi: make cpu clock source switch safe 
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
 2021-10-19 21:47:27 +08:00
wuzhenghui
5000aa877f fix rtc_clk_cal: Wait for timeout in a loop instead of just judge once 2021-10-19 12:07:34 +08:00
wuzhenghui
ab9df9945f fix stuck in rtc_clk_cal 2021-10-14 16:25:54 +08:00
Li Shuai
73829221f5 esp_hw_support: force power down wifi and bt power domain when rtc module init 2021-10-14 10:51:10 +08:00
Kevin (Lao Kaiyao)
a9faafee3c Merge branch 'feature/touch_sensor_driver_support_for_esp32s3' into 'master' 
driver(touch): support touch sensor for esp32s3 platform

Closes IDF-1784 and IDF-3302

See merge request espressif/esp-idf!14102
 2021-10-12 05:50:58 +00:00
Armando
16a91399f1 psram: put opiram_psram and spiram_psram in internal ram 
External memory is accessed via SPI0. When modifying the SPI0 registers,
should put the code in internal RAM. Otherwise when there is an ongoing
SPI0 transaction, CPU changes the SPI0 registers. This is dangerous.
Besides, modifying SPI0 registers may lead external memory to an
unstable state. Therefore putting these code in internal RAM is
necessary.
 2021-10-08 17:39:41 +08:00
Armando
7ff9332243 rtc: fix mspi timing issue when self-calibrate ocode 
When doing OCode self-calibration in rtc_init.c, it will change the
system clock from PLL to XTAL, which is in a lower frequency, and MSPI
timing tuning is not needed. Therefore we should modify the timing
configurations accordingly, and set it back after the calibration.

This is a temporary fix
 2021-10-08 15:59:57 +08:00
Armando
4cafdbd83b mspi: fix psram cs timing register setting not in iram bug 2021-10-08 15:59:57 +08:00
Armando
2655a506c9 mspi: support auto detect octal flash vendor 2021-10-08 15:59:57 +08:00
fuzhibo
057b9d61b5 driver(touch): support touch sensor for esp32s3 platform 2021-10-08 10:39:46 +08:00
Martin Vychodil
5344de34c3 System/Memprot: fixed voltage glitching detection logic 
When the application is being debugged it should check the call result (esp_cpu_in_ocd_debug_mode())
is not given volt.glitch attack - so the result is triple-checked by ESP_FAULT_ASSERT macro. In case
the check fails, the system is reset immediately

IDF-4014
 2021-10-04 09:21:07 +02:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master' 
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
 2021-09-27 04:02:29 +00:00
Jiang Jiang Jian
a015123a1d Merge branch 'feature/rename_apbctrl_to_syscon' into 'master' 
rename apbctrl to syscon

See merge request espressif/esp-idf!14524
 2021-09-16 12:58:07 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
Armando (Dou Yiwen)
b9ea273e78 Merge branch 'feature/suppport_self_icode_calibration_on_s3' into 'master' 
adc: support self calibration icode on s3

Closes IDF-3913

See merge request espressif/esp-idf!15195
 2021-09-16 11:14:58 +00:00
Armando
ddd0235783 adc: support adc self-calibration on esp32s3 2021-09-16 15:17:29 +08:00
Li Shuai
b3e27403f3 esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep 2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22 Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep 2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-16 14:40:46 +08:00
Li Shuai
b59902f4d1 Merge branch 'bugfix/esp32s3_lightsleep_psram_leakage_current' into 'master' 
fix SPIRAM leakage when its CS pin has no hardware pullup

See merge request espressif/esp-idf!14730
 2021-09-16 04:07:58 +00:00
Li Shuai
c5b481c6da light sleep: fix Flash leakage when its CS pin has no hardware pullup 2021-09-15 20:34:18 +08:00
Li Shuai
af4f2075ac light sleep: fix SPIRAM leakage when its CS pin has no hardware pullup 2021-09-15 20:34:18 +08:00
Armando
ea10dacf68 mspi: add octal psram get_cs_io function 2021-09-15 20:34:18 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Anton Maklakov
c94b913ced Merge branch 'bugfix/esp32s3_chip_id' into 'master' 
esp_hw_support: update esp32s3 chip ID to the MP version

See merge request espressif/esp-idf!15183
 2021-09-14 09:09:38 +00:00
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
Ivan Grokhotkov
e21e5aac64 esp_hw_support: update esp32s3 chip ID to the MP version 
- Update 7.2.5 chip ID (4) to 7.2.8 chip ID (9).
- Remove TODO in espcoredump regarding this mismatch.
 2021-09-13 15:16:45 +02:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
baohongde
006a10b050 components/doc: Update doc about high-level interrupt 
some bugfix.
 2021-09-09 20:40:09 +08:00
Sachin Parekh
0e6b03f343 esp32s2/hmac: Release HMAC lock in downstream mode incase of failure 2021-09-06 11:21:39 +05:30
Sachin Parekh
fd5a7df404 esp32h2: Replicated HMAC JTAG downstream enable mode implementation 2021-09-06 11:06:50 +05:30
Sachin Parekh
fa2707f1f3 hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3 
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
 2021-09-06 11:06:50 +05:30
Jiang Jiang Jian
316988bd2d Merge branch 'feature/support_esp32s3_cpu_tagmem_retention' into 'master' 
support esp32s3 cpu + tagmem retention

See merge request espressif/esp-idf!14579
 2021-09-06 03:47:44 +00:00
Sachin Billore
f80d6f8c21 Digital Signature support for S3 
Closes IDF-1791
 2021-09-02 11:59:24 +05:30
Marius Vikhammer
bdf3a8ff29 Merge branch 'feature/xtwdt' into 'master' 
WDT: Add support for XTAL32K Watchdog timer

Closes IDF-2575

See merge request espressif/esp-idf!15000
 2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
Armando (Dou Yiwen)
5f38b766a8 Merge branch 'feature/support_120mhz_quad_psram_quad_flash' into 'master' 
mspi: support 120MHz clock freq on QSPI flash/psram on ESP32-S3

Closes IDF-3711

See merge request espressif/esp-idf!14849
 2021-09-01 02:46:05 +00:00
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
Marius Vikhammer
2e0cab6f94 himem: reverse error check logic in himem 2021-08-31 08:46:27 +08:00