alex/esp-idf
alex/esp-idf
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Code Issues Actions 3 Packages Projects Releases Wiki Activity
36,156 Commits 19 Branches 147 Tags 377 MiB
9d7bd6a8dd
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466 Commits

Author SHA1 Message Date
xiehang
9d7bd6a8dd change(esp_phy): Add SOC_PHY_SUPPORTED to control phy mode 2024-04-01 11:36:55 +08:00
Omar Chebib
a79c6f7f67 fix(esp_hw_support): clear reserved interrupts that are not applicable for each target 2024-03-27 16:21:25 +08:00
wanlei
1e6c61daa6 spi_master: sct mode support set line mode, transaction interval time 
support line mode 1-2-4-8 depend on targets.
fix sct mode dma descriptor counter compute issue.
add conf_bits_len setting API to control interval time.
 2024-03-20 15:42:03 +08:00
Armando
b303e4b7a6 spi_master: new segmented-configure-transfer mode 2024-03-20 15:42:03 +08:00
wanlei
0cf11e5b87 feat(spi): add esp32c5 spi support 2024-03-07 18:11:48 +08:00
Guillaume Souchere
0b9f01ac20 feat(soc): Add soc_caps macros for sleep support 
- modify console example to use the new SOC_LIGHT_SLEEP_SUPPORTED
and SOC_DEEP_SLEEP_SUPPORTED macros when registering sleep commands

- remove exclusion of esp32p4 in basic and advanced example in
.build-test-rules.yml

- replace exclusion of esp32p4 for deep and light sleep tests with newly introduced macro

- remove the temporary disable check for esp32p4 and uses the
SOC_LIGHT_SLEEP_SUPPORTED maccro instead.
 2024-03-05 07:05:40 +01:00
Song Ruo Jing
5276cd4f1d refactor(uart): add support to be able to test LP_UART port 
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
 2024-02-07 14:37:48 +08:00
Song Ruo Jing
cf93777077 refactor(rtc): move soc/rtc.h from soc to esp_hw_support component 
Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
 2024-01-25 19:15:33 +08:00
Darian Leung
19c18845b0 refactor(soc): Remove soc/usb_types.h 
This header has been removed for the following reasons:

- Header is misplaced. 'xxx_types.h' headers should be placed in the 'hal'
component.
- The 'usb_xxx_endpoint_t' should be placed in the 'xxx_struct.h' header.
 2024-01-17 21:28:25 +08:00
Darian Leung
6a43b623dc refactor(soc): Rename usb_otg_periph to usb_dwc_periph 
- Renamed usb_otg_periph.h/c to usb_dwc_periph.h/c to match naming convention
of other DWC OTG related files
- Added compatibility header for usb_otg_periph.h
 2024-01-17 21:28:25 +08:00
Darian Leung
01a4a1d7f0 refactor(soc): Deprecate usb pin mappings 
usb_pins.h and usb_periph.h/c lists mappings of USB DWC signals to GPIOs used
to connect to external FSLS PHYs. However, those signals can be routed to any
GPIOs via the GPIO matrix. Thus, these mapping are meaningless and have been
deprecated.
 2024-01-17 21:28:25 +08:00
Song Ruo Jing
1dfa4011f0 Merge branch 'feature/esp32p4_clock_support' into 'master' 
feat(clk): add basic clock support for esp32p4

Closes IDF-7526 and IDF-7569

See merge request espressif/esp-idf!27950
 2023-12-29 12:34:12 +08:00
Song Ruo Jing
7f2b85b82b feat(clk): add basic clock support for esp32p4 
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
 2023-12-29 00:37:26 +08:00
Darian Leung
d74b4f6730 refactor(hal/usb): Rename usb_fsls_phy API to match header/source names 
Note: Also fixed some formatting issues in usb_wrap_struct.h
 2023-12-28 11:48:54 +08:00
Darian Leung
d00aaf8648 refactor(soc/host): Update USB OTG struct fields 
This commit updates the "*_struct.h" files for the USB OTG peripheral:

- Added/removed some missing/non-existing register fields
- Added "reserved" place holders for registers that are missing due to IP
configuration.
- Added "usb_dwc_cfg.h" listing the USB OTG IP configuration for each target.
- Updated LL/HAL according to register field updates. Also tidied up the include
directives in those headers.
 2023-12-17 00:36:10 +08:00
Armando
2c32bd209a change(fpga): added bypass rng configuration 2023-12-05 11:38:35 +08:00
Gao Xu
b9a3dd1b37 Merge branch 'bugfix/fix_adc_cali_error_after_light_sleep_wake_on_h2' into 'master' 
adc: fix calibration error when waking up from light sleep on H2 and enable test

Closes IDF-8569

See merge request espressif/esp-idf!27242
 2023-11-24 18:25:35 +08:00
Cao Sen Miao
2c131672db fix(spi_flash): Fix ESP32S2 multi-flash test 2023-11-23 19:49:59 +08:00
Jakob Hasse
5f4865e838 Merge branch 'doc/soc_cap_tool' into 'master' 
Doc/soc cap tool

See merge request espressif/esp-idf!27154
 2023-11-23 10:47:01 +08:00
gaoxu
4f81883ccf fix(adc): restore cali registers after light sleep wake up on H2 and enable test 2023-11-20 17:38:34 +08:00
morris
72e414105d Merge branch 'contrib/github_pr_12559' into 'master' 
fix(spi): correct macro REG_SPI_BASE(i) for all targets (GitHub PR)

Closes IDFGH-11421 and IDFGH-11424

See merge request espressif/esp-idf!27085
 2023-11-20 15:55:41 +08:00
Wu Zheng Hui
a2f0198cd1 Merge branch 'bugfix/fix_onebyte_watchpoint_setting' into 'master' 
fix(riscv): supports 1 byte and larger than 64byte range watchpoint setting

See merge request espressif/esp-idf!27159
 2023-11-17 10:47:23 +08:00
Jakob Hasse
46e44ee154 docs(soc): improved soc caps generation documentation 2023-11-17 10:43:59 +08:00
wanlei
4dcd6d7913 fix(spi): correct some signals and dummy bits docs 2023-11-17 02:39:28 +00:00
TD-er
90eada6993 fix(spi): Correct REG_SPI_BASE(i) macro for all targets 
The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
 2023-11-17 02:39:28 +00:00
laokaiyao
f35ec64a0b feat(touch): support touch driver on p4 (soc) 2023-11-16 11:13:02 +00:00
wuzhenghui
161bd8bfed change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 2023-11-16 18:11:57 +08:00
Darian Leung
a51813d9d9 refactor(soc): SOC_USB_PERIPH_NUM option 
This commit refactors SOC_USB_PERIPH_NUM as follows:

- Renamed to SOC_USB_OTG_PERIPH_NUM to avoid confusion with USB Serial JTAG
- Updated to unsigned integer "1U"
- Updated some build rules to depend on SOC_USB_OTG_SUPPORTED instead
 2023-11-14 18:48:01 +08:00
Song Ruo Jing
365123dfaa Merge branch 'bugfix/uart_custom_console' into 'master' 
fix(console): enable to select UART1 port for console output

Closes IDF-6190

See merge request espressif/esp-idf!26642
 2023-11-10 12:31:22 +08:00
Song Ruo Jing
46d33e46ef fix(console): enable to select UART1 port for console output 
This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
 2023-11-09 22:32:49 +08:00
muhaidong
1ddcca6dcd fix(wifi): fix deinit init wifi scan fail issue 2023-11-09 12:05:20 +08:00
wuzhenghui
6a436286dc feat(esp_hw_support): add api to gpio driver to support output internal clock on GPIO 2023-10-20 14:35:26 +08:00
Armando
17063b51e0 feat(soc): added flash operation range macros in ext_mem_defs.h 2023-10-16 17:19:04 +08:00
morris
66497af276 feat(hal): enable hal host test 2023-10-11 11:23:24 +08:00
laokaiyao
72a0746e62 refactor(apll): move the apll soc caps to clk_tree_ll 2023-09-28 15:03:27 +08:00
alanmaxwell
503299fb32 fix(phy): Fix PHY enabled enter WiFi RX state default 2023-09-26 16:23:58 +08:00
Song Ruo Jing
2d458a3f93 feat(lp_io): Add support for ESP32P4 2023-09-20 19:39:41 +08:00
Michael (XIAO Xufeng)
efb9d9e7d4 Merge branch 'esp32_s2_s3_cpu_freq_to_pll' into 'master' 
EspS2/S3: fixed the bug of insufficient voltage when the CPU switches frequency

See merge request espressif/esp-idf!25396
 2023-09-18 20:01:31 +08:00
Konstantin Kondrashov
cbdb799b6f feat(esp_timer): Support systimer for ESP32P4 2023-09-13 19:13:38 +08:00
hongshuqing
77a303276a esp32/esp32s2/esp32s3 cpu freq to pll 
add assert for cpu_freq_to_8m

update esp32 DBIAS_XTAL_80M_160M define

delete modify of esp32

remove esp32 comment

restore esp32 modify
 2023-09-11 10:40:27 +08:00
Armando (Dou Yiwen)
bdfa91ab66 Merge branch 'change/delete_not_used_mmu_macros' into 'master' 
mm: delete not used mmu macros and added soc_ prefix

Closes IDF-7686

See merge request espressif/esp-idf!25663
 2023-09-06 11:59:03 +08:00
Armando
de77ab3061 change(soc): added SOC_ prefix to mmu defs 2023-09-05 15:47:26 +08:00
Marius Vikhammer
e3861261eb fix(wdt): move non-auto generated wdt values to ll 2023-09-05 11:52:34 +08:00
Armando
dc9ddfc0d4 change(soc): added SOC_EFUSE_SUPPORTED 2023-08-24 12:51:20 +08:00
laokaiyao
4b6d71447c feat(i2s): supported external clock source input 2023-08-14 03:25:12 +00:00
Armando
00df6b378d refactor(sar): build sar_periph_ctrl related files by chip 2023-08-09 19:33:36 +08:00
Song Ruo Jing
99c2691467 change(driver/rtcio): Describe RTCIO CAPS with more accurate note 2023-07-20 11:43:57 +08:00
morris
fb7cc00378 Merge branch 'refactor/reorganize_the_interrupt_description_files' into 'master' 
refactor(interrupt): Put the interrupts definitions in soc/interrupts.h

Closes IDF-5776

See merge request espressif/esp-idf!24578
 2023-07-19 12:05:56 +08:00
Chen Jichang
304c7572a6 refactor(interrupt):put the interrupts definitions in soc/interrupts.h 
Now the soc interrupts definitions are scattered around in the esp-idf
which are out of sync. Put interrupts definitions in soc/periph_defs.h
(!ESP32) or soc/soc.h(ESP32) together in soc/interrupts.h.
 2023-07-17 19:31:56 +08:00
wuzhenghui
2b600df4ee fix(esp_pm): Constrains the minimum frequency of APB_MAX when the modem is working 2023-07-14 20:10:16 +08:00