Commit Graph

151 Commits

Author SHA1 Message Date
Omar Chebib
0714847552 C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT
Closes https://github.com/espressif/esp-idf/issues/9938
2022-12-19 15:06:15 +01:00
zwl
e8555efe5b Renamed BAH 2022-12-13 18:05:00 +08:00
Simon Arlott
5ba75187b0 hal/uart_ll.h: Fix compile with C++
I'm including <hal/uart_ll.h> in my C++ application because I need to
bypass the uart driver. The inline functions in the header file fail to
compile as C++.

All of the enums need explicit casts for conversion to/from integers.

Merges https://github.com/espressif/esp-idf/pull/10106
2022-12-06 10:13:03 +08:00
Cao Sen Miao
1bd4c6a8cf I2C: put some interrupt used functions into IRAM,
closes https://github.com/espressif/esp-idf/issues/10079
2022-12-02 15:13:51 +08:00
gaoxu
1148e4e77f SPI: Fixed Quad SPI wrong dummy cycle issue on ESP32C2/ESP32C3/ESP32S3 and put get-command/dummy-bits functions in spi_ll.h 2022-09-07 18:48:05 +08:00
Michael (XIAO Xufeng)
69be7c4cc2 Merge branch 'feat/support_esp32c2_uart_v5.0' into 'release/v5.0'
uart: update console docs about frequency for ESP32-C2, move frequency of clock sources out of HAL (v5.0)

See merge request espressif/esp-idf!19690
2022-08-25 02:03:26 +08:00
songruojing
343acd7f88 gpio: fix USB D+ pin cannot disable pullup
Internally, disable usb serial jtag DP pin's pullup when calling gpio_ll_pullup_dis and rtcio_ll_pullup_disable
At usb serial jtag setup/install, re-enable DP pin's pullup

Closes https://github.com/espressif/esp-idf/issues/9495
2022-08-22 22:03:25 +08:00
Michael (XIAO Xufeng)
6ed15178b6 uart: move frequency of clock sources out of HAL 2022-08-22 14:28:12 +08:00
morris
6820c9decc rmt: add iram safe test
Closes https://github.com/espressif/esp-idf/issues/9487
2022-08-18 10:57:13 +08:00
morris
cf4cfc69ed esp_adc: add test with -O0 2022-08-02 23:07:06 +08:00
morris
a5a171926b rmt: add test with -O0 2022-08-02 23:07:06 +08:00
morris
031adc01c4 gpio: add test with -O0 2022-08-02 23:07:06 +08:00
morris
7faf1bee73 gptimer: add test with -O0 2022-08-02 22:53:36 +08:00
Armando
f325ad2211 mmu: fix wrong mmu end check
In mmu code, we follow the rule that the `end` address shouldn't be
touched. This commit fix wrong end address check in mmu_ll.h
2022-07-27 10:22:09 +00:00
morris
d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
laokaiyao
edee3ee3cd i2s: add slot sequence table
Closes: https://github.com/espressif/esp-idf/issues/9208

When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
2022-07-21 15:52:39 +08:00
laokaiyao
90866e99fb i2s: add basic examples for STD/TDM/PDM mode 2022-07-21 15:52:39 +08:00
morris
4154eaec93 sdm: clean up soc/hal/ll code 2022-07-20 14:59:50 +08:00
Song Ruo Jing
4734b1433b Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master'
gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report

Closes IDF-4901

See merge request espressif/esp-idf!18805
2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master'
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
songruojing
0c4b9a0101 gpio: Fix HAL bad bit shift operation on gpio_num_t reported from coverity
All gpio hal and ll functions input arguments gpio_num_t are changed to uint32_t type.
Validation of gpio num should be guaranteed from the driver layer.
2022-07-15 16:51:25 +08:00
Ivan Grokhotkov
5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Michael (XIAO Xufeng)
a58362a429 Merge branch 'feature/efuse_rev_major_minor' into 'master'
efuse: Adds major and minor versions

See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
morris
a92cce9861 Merge branch 'bugfix/calib_i2c_clk' into 'master'
I2C: Make I2C clock frequency accurate

Closes IDF-5363

See merge request espressif/esp-idf!18686
2022-07-06 20:52:31 +08:00
Cao Sen Miao
e218723e0e I2C: Make I2C clock frequency accurate 2022-07-06 11:58:08 +08:00
GengYuchao
d145c337e0 Enable rpa_moudle reset function 2022-07-05 20:50:31 +08:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
morris
7863c1bc45 Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
Bugfix/fix rtc freq err for h2 beta1

See merge request espressif/esp-idf!18682
2022-07-04 16:46:17 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
GengYuchao
10fd1daa10 Add ETM clk gate defines for h2 2022-06-30 17:02:00 +08:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00
Mahavir Jain
dd24639215 Merge branch 'esp32h2/enable_ecc_accelerator' into 'master'
esp32h2: Enable ECC accelerator

Closes IDF-3397

See merge request espressif/esp-idf!18647
2022-06-23 20:06:26 +08:00
Cao Sen Miao
2c0651a671 Add regi2c enable/disable reference count 2022-06-23 15:36:44 +08:00
Cao Sen Miao
3a820462ac temperature_sensor: Add temperature sensor support for ESP32-C2 2022-06-23 15:36:43 +08:00
Sachin Parekh
6cfc9c365f esp32h2: Enable ECC accelerator 2022-06-23 12:59:13 +05:30
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
laokaiyao
28b8fc6a7e i2s: update documents for driver-NG 2022-06-15 10:30:04 +08:00
laokaiyao
0fe3bb8ab7 i2s: update examples and unit-tests 2022-06-15 10:29:06 +08:00
laokaiyao
621d0aa942 i2s: Introduced a brand new driver 2022-06-15 10:29:06 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master'
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
2fd784c97a G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h" 2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
a8a3756b38 hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:

- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead

Also updated soc_hal.h as follows:

- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.

This commit also updates the XCHAL_ERRATUM_572 workaround by

- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
2022-06-14 14:40:03 +08:00
Darian Leung
149872131a hal: Move dedicated GPIO LL and HAL
This commit moves the dedicated GPIO LL and HAL functions from
cpu_ll.h to dedic_gpio_cpu_ll.h.

- cpu_ll_enable_cycle_count() has also been removed due to lack of feasible usage scenarios
2022-06-14 14:38:29 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00