alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity
35,316 Commits 20 Branches 148 Tags 384 MiB
98d9f04b00
Commit Graph

508 Commits

Author SHA1 Message Date
Song Ruo Jing
98d9f04b00 feat(gdma): add GDMA support for ESP32C5 2024-02-28 12:38:02 +08:00
C.S.M
2302dd5a91 Merge branch 'feature/i2c_sleep' into 'master' 
feat(i2c): Support i2c sleep retention on esp32c6/h2

Closes IDF-8458

See merge request espressif/esp-idf!28885
 2024-02-24 09:58:35 +08:00
Lin Rui Hao
00df222cdf Merge branch 'docs/rf_coexistence_api_guides_support_esp32c2' into 'master' 
Docs: RF coexistence api guides support esp32c2

Closes BT-3582

See merge request espressif/esp-idf!28780
 2024-02-23 15:20:45 +08:00
Cao Sen Miao
cf521b60ea feat(i2c): Support i2c sleep retention on esp32c6/h2 2024-02-23 11:28:14 +08:00
linruihao
1d34bb5e8a fix(esp_coex): add support_coexistence soc_caps for esp32c2 and esp32h2 2024-02-21 16:38:46 +08:00
Marius Vikhammer
c0a2043562 fix(system): update reset reasons for C6 and H2 2024-02-20 12:27:09 +08:00
Song Ruo Jing
5276cd4f1d refactor(uart): add support to be able to test LP_UART port 
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
 2024-02-07 14:37:48 +08:00
wuzhenghui
0c2f811ca8
feat(esp_hw_support): support gdma register context sleep retention 2024-02-02 11:21:40 +08:00
Song Ruo Jing
cf93777077 refactor(rtc): move soc/rtc.h from soc to esp_hw_support component 
Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
 2024-01-25 19:15:33 +08:00
Wu Zheng Hui
55f04b3326 Merge branch 'feature/clean_up_retention_context_definitions' into 'master' 
refactor(esp_hw_support): move sleep retention context definition to soc target folder

Closes PM-10

See merge request espressif/esp-idf!26753
 2024-01-24 20:24:02 +08:00
wuzhenghui
f3f12e973c
refactor(esp_hw_support): separate different chip system peripheral regs context defs to target folder 2024-01-23 13:30:01 +08:00
wuzhenghui
9b3dc69908
refactor(esp_hw_support): move regdma structure defination to soc components 2024-01-23 11:51:44 +08:00
Mahavir Jain
9ecd2fd7e3 fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-22 13:34:32 +08:00
Konstantin Kondrashov
261651fc19 Merge branch 'feature/efuse_update' into 'master' 
feat(efuse): Adds new efuses for H2 and C6 chips

See merge request espressif/esp-idf!27672
 2024-01-20 03:10:44 +08:00
Omar Chebib
cdde05335e Merge branch 'refactor/riscv_interrupt' into 'master' 
refactor(riscv): Refactor crosscore interrupts and core interrupt code

Closes IDF-5720, DOC-5177, and IDF-7899

See merge request espressif/esp-idf!27845
 2024-01-19 10:51:04 +08:00
C.S.M
6c5373911a Merge branch 'bugfix/cannot_jump_range' into 'master' 
fix(temperature_sensor): Cannot switch the range smoothly on esp32h2

Closes IDF-9054

See merge request espressif/esp-idf!28530
 2024-01-19 09:44:26 +08:00
Omar Chebib
102d5bbf72 refactor(riscv): added a new API for the interrupts 2024-01-18 16:36:53 +08:00
Cao Sen Miao
2859388f11 fix(temperature_sensor): Cannot switch the range smmothly on esp32h2 2024-01-17 16:55:30 +08:00
KonstantinKondrashov
8802e4d77d feat(efuse): Adds new efuse for esp32h2 2024-01-16 17:46:50 +08:00
laokaiyao
c3c72f02af fix(i2s): fixed incorrect reg base name on C3 
Closes https://github.com/espressif/esp-idf/issues/12643
 2024-01-16 14:12:32 +08:00
Cao Sen Miao
0bf2b35b33 fix(i2c): Use hardware fsm reset on esp32c6/h2/p4 2024-01-16 10:05:05 +08:00
Kevin (Lao Kaiyao)
83d5797967 Merge branch 'feature/parlio_rx_driver' into 'master' 
driver: add parallel IO RX driver

Closes IDF-7002 and IDF-6984

See merge request espressif/esp-idf!23488
 2023-12-29 16:36:24 +08:00
Song Ruo Jing
7f2b85b82b feat(clk): add basic clock support for esp32p4 
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
 2023-12-29 00:37:26 +08:00
laokaiyao
04d267b023 feat(parlio_rx): implement parallel io rx driver 2023-12-27 19:32:12 +08:00
Cao Sen Miao
439bc719fe feat(temperature_sensor): Add temperature sensor support on esp32p4 2023-12-26 16:45:20 +08:00
Roshan Bangar
473f2bdd1e fix(nimble): Added periodic_adv_enh soc_caps for c2, h2 2023-12-20 12:20:11 +05:30
Lou Tian Hao
fedb3d9f9d Merge branch 'change/change_regdma_power_issue_macro' into 'master' 
change(pm): change name SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG

Closes PM-45

See merge request espressif/esp-idf!27934
 2023-12-19 11:19:51 +08:00
Lou Tianhao
d8b1f7207a change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-15 15:04:06 +08:00
Xu Si Yu
6cef08c03d feat(ieee802154): add tx/rx report for IEEE802.15.4 debug 2023-12-14 12:29:57 +08:00
laokaiyao
2b44d62e43 feat(esp32c5): support esp32c5 g0 components 2023-12-08 15:12:24 +08:00
Armando
2c32bd209a change(fpga): added bypass rng configuration 2023-12-05 11:38:35 +08:00
Gao Xu
b9a3dd1b37 Merge branch 'bugfix/fix_adc_cali_error_after_light_sleep_wake_on_h2' into 'master' 
adc: fix calibration error when waking up from light sleep on H2 and enable test

Closes IDF-8569

See merge request espressif/esp-idf!27242
 2023-11-24 18:25:35 +08:00
Jakob Hasse
5f4865e838 Merge branch 'doc/soc_cap_tool' into 'master' 
Doc/soc cap tool

See merge request espressif/esp-idf!27154
 2023-11-23 10:47:01 +08:00
gaoxu
4f81883ccf fix(adc): restore cali registers after light sleep wake up on H2 and enable test 2023-11-20 17:38:34 +08:00
morris
72e414105d Merge branch 'contrib/github_pr_12559' into 'master' 
fix(spi): correct macro REG_SPI_BASE(i) for all targets (GitHub PR)

Closes IDFGH-11421 and IDFGH-11424

See merge request espressif/esp-idf!27085
 2023-11-20 15:55:41 +08:00
Mahavir Jain
9fb38d82a3 Merge branch 'fix/rng_register_prefix_discrepency_newer_targets' into 'master' 
Fix: RNG register prefix discrepancy for ESP32C6 and ESP32H2

Closes DOC-5161 and DOC-5175

See merge request espressif/esp-idf!27212
 2023-11-20 10:53:09 +08:00
Mahavir Jain
7505667e7d Merge branch 'bugfix/esp32h2_ecdsa_hardware_k' into 'master' 
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose

Closes IDF-8508 and IDF-8506

See merge request espressif/esp-idf!26918
 2023-11-17 15:10:12 +08:00
Jakob Hasse
46e44ee154 docs(soc): improved soc caps generation documentation 2023-11-17 10:43:59 +08:00
wanlei
4dcd6d7913 fix(spi): correct some signals and dummy bits docs 2023-11-17 02:39:28 +00:00
TD-er
90eada6993 fix(spi): Correct REG_SPI_BASE(i) macro for all targets 
The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
 2023-11-17 02:39:28 +00:00
harshal.patil
91af44d6e8
fix(soc/esp32h2): Fix llperi_rng_data field discrepancy 2023-11-16 17:49:26 +05:30
wuzhenghui
161bd8bfed change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 2023-11-16 18:11:57 +08:00
Mahavir Jain
94bf4710fa
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose 
In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.

In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
 2023-11-15 09:42:26 +05:30
Song Ruo Jing
46d33e46ef fix(console): enable to select UART1 port for console output 
This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
 2023-11-09 22:32:49 +08:00
gaoxu
0ea0b39725 feat(adc_cali): Add ADC calibration support for ESP32H2 2023-10-31 11:29:30 +08:00
C.S.M
4111b07076 Merge branch 'bugfix/flash_enc_plaintext' into 'master' 
fix(flash_encryption): Fix the issue that XTS_AES Plain text memory size wrong

See merge request espressif/esp-idf!26640
 2023-10-27 18:23:00 +08:00
Cao Sen Miao
420ac840ff fix(flash_encryption): Fix the issue that XTS_AES Plain text memory size wrong 2023-10-26 19:38:42 +08:00
morris
418494800c fix(i2c): read write FIFO memory by volatile 2023-10-26 14:40:07 +08:00
Konstantin Kondrashov
a304cc230e Merge branch 'feature/esp32h2_adds_adc_calib_efuses' into 'master' 
feat(efuse): Adds efuse ADC calibration data for ESP32H2

See merge request espressif/esp-idf!26305
 2023-10-25 15:58:24 +08:00
Cao Sen Miao
8d639492f2 feat(i2c_slave): Add new implementation and API for I2C slave 2023-10-24 18:44:49 +08:00