Song Ruo Jing
9402ab427b
ledc: Add basic support for esp32c6
2022-12-07 18:40:50 +08:00
Konstantin Kondrashov
0786539047
Merge branch 'feature/remove_efuse_dependency' into 'master'
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esp_hw_support: Removes efuse dependency
Closes IDF-4713
See merge request espressif/esp-idf!21212
2022-11-29 18:12:26 +08:00
KonstantinKondrashov
741e89cbaa
esp_hw_support: Removes efuse dependency
2022-11-25 19:27:33 +08:00
Armando (Dou Yiwen)
2ad7b85a9e
Merge branch 'bugfix/improve_ext_virtual_memory_allocation_in_2nd_btld' into 'master'
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bootloader: improve irom & drom mapping way in 2nd bootloader on esp32c6
Closes IDF-6331
See merge request espressif/esp-idf!21173
2022-11-25 15:24:06 +08:00
Armando
9d9d1e4bf3
soc: remove unused macro in ext_mem_defs.h
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ESP_CACHE_TEMP_ADDR is not used in IDF
2022-11-24 10:29:35 +08:00
Konstantin Kondrashov
b4580a1980
Merge branch 'feature/esp_timer_add_ll_for_rc_fast_clk' into 'master'
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hal: Adds hal/ll func for SYSTIMER to select clock source: XTAL or RC_FAST_CLK
Closes IDF-5323
See merge request espressif/esp-idf!21136
2022-11-23 15:05:48 +08:00
KonstantinKondrashov
63f852adc8
hal: Adds hal/ll func for SYSTIMER to select clock source: XTAL or RC_FAST_CLK
2022-11-22 20:29:19 +08:00
Armando
c3682bf0a4
soc: update iram/dram addr range in ext_mem_defs.h
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IRAM0/DRAM0 addr range update, on s3, c3, c2, h4, c6:
IRAM0_ADDRESS_LOW ~ IRAM0_ADDRESS_HIGH
DRAM0_ADDRESS_LOW ~ DRAM0_ADDRESS_HIGH
now are for the real IRAM0 and DRAM0
2022-11-22 18:53:50 +08:00
Omar Chebib
cd21058097
C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT
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Closes https://github.com/espressif/esp-idf/issues/9938
2022-11-21 16:18:08 +08:00
alex.li
bc392a87b1
Support external coexist formal code for C2 & S3,
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and optimize RX category in external coex.
2022-11-08 11:11:41 +08:00
Song Ruo Jing
be0fdfa176
soc: Add a soc cap, SOC_CLK_RC_FAST_D256_SUPPORTED, for whether the target has the RC_FAST_D256 clock
2022-11-01 11:23:26 +08:00
Jiang Jiang Jian
f191b2f034
Merge branch 'bugfix/fix_xtal_related_rtc_params_for_esp32' into 'master'
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esp32/rtc: fix xtal unstable in some cases when sleep
Closes ESPCS-869
See merge request espressif/esp-idf!20425
2022-10-26 15:57:48 +08:00
Song Ruo Jing
6d24e8bcf4
gpio: Add support for esp32c6
2022-10-18 12:38:36 +08:00
Jiang Jiang Jian
e08e2f071f
Merge branch 'bugfix/fix_part_of_modem_not_reset_when_power_on' into 'master'
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Coexistence: fix part of modem module not reset when power up
See merge request espressif/esp-idf!19849
2022-10-18 11:13:10 +08:00
Armando (Dou Yiwen)
542bdea689
Merge branch 'feature/adc_calibration_on_c2' into 'master'
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esp_adc: support adc calibration on esp32c2
Closes IDF-5203 and IDF-5899
See merge request espressif/esp-idf!20044
2022-10-18 10:50:59 +08:00
Armando
ccfbba5994
esp_adc: support adc calibration on esp32c2
2022-10-13 21:03:51 +08:00
jingli
b903a2253b
esp_hw_support/sleep: fix current leakage when hold digital io during deep sleep
2022-10-11 12:11:28 +08:00
jingli
0a44d09f4f
esp32/rtc: fix xtal unstable in some cases when sleep
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1. add xtal buf wait to fix high temperature restart issue
2. add min sleep value to fix xtal stop due to too short sleep time issue
2022-10-09 19:58:58 +08:00
jingli
42699637ec
soc: remove unused DR_REG_DPORT_END macro for c2/c3/s2/s3
2022-09-22 11:45:20 +08:00
jingli
04530d7112
esp_hw_support/esp32c2/rtc: take a safer xtal buf wait
2022-09-21 12:27:26 +00:00
jingli
05a2fbe810
esp_hw_support/clk_cali: fix xtal32k error detect
2022-09-21 03:03:25 +00:00
wangjialiang
6e79d05814
ble_mesh: docs: Remove BLE Mesh related reference for C2
2022-09-16 19:39:51 +08:00
Omar Chebib
53c7dd4efc
WDT: implement interrupt wdt and task wdt for ESP32-C2
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ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
2022-09-15 14:37:59 +08:00
wanlei
96aa2792f8
spi_master:fix error when use spi_bus_add_device
more than 3 device
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update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal
Closes https://github.com/espressif/esp-idf/issues/8876
2022-09-05 12:10:22 +08:00
Simon
e923c15859
Merge branch 'refactor/i2c_hal' into 'master'
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I2C: Refactor i2c hal and ll(pre-MR of I2C driver-NG)
See merge request espressif/esp-idf!19750
2022-09-02 10:47:35 +08:00
Cao Sen Miao
31b88a4c88
I2C: Refactor i2c hal and ll
2022-09-01 15:53:59 +08:00
songruojing
9d515185d0
esp32c6: clean up existing soc files and header file inclusion in IDF to be compatible with the new chip
2022-09-01 12:28:06 +08:00
Song Ruo Jing
6a60ecf780
soc_caps: Introduce SOC_LEDC_SUPPORTED and SOC_I2C_SUPPORTED caps to IDF
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Wrap the ledc, i2c source files with the new caps in CMakeLists and linker.lf.
This could avoid potential source file not found warning during linking time.
2022-08-31 20:43:22 +08:00
Michael (XIAO Xufeng)
746f4b814c
uart: move frequency of clock sources out of HAL
2022-08-15 18:55:43 +00:00
Michael (XIAO Xufeng)
f11de46bfc
Merge branch 'bugfix/fix_c2_rtc_ldo_too_low_bug' into 'master'
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ESP32C2: Fix system not stable bug when rtc voltage too low
Closes IDF-5539
See merge request espressif/esp-idf!19217
2022-08-15 17:34:36 +08:00
chaijie@espressif.com
b250589f2f
set fosc div to 1 to make chip run stablly for C2
2022-08-11 14:28:11 +08:00
Geng Yuchao
0a1d8c1e09
Fix soc caps define for all chips
2022-08-08 20:50:28 +08:00
Jing Li
c25c254666
Merge branch 'feature/further_support_esp32c2_sleep' into 'master'
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esp32c2/sleep: further support sleep for esp32c2 with 26MHz XTAL
Closes IDF-5544
See merge request espressif/esp-idf!19017
2022-08-08 13:26:15 +08:00
jingli
ee3423834e
kconfig: refactor xtal freq kconfig to common configuration item
2022-08-05 19:12:29 +08:00
zlq
7d8f10423e
1.add ldo parameters in efuse table; 2.set ldo dbias based on pvt-efuse; 3.add pll cali stop function; 4. add efuse_ocode
2022-08-05 14:24:51 +08:00
Wan Lei
1265a2db9d
Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master'
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Fix check_public_headers violations for soc component
Closes IDF-5397
See merge request espressif/esp-idf!19158
2022-08-01 10:14:04 +08:00
wuzhenghui
7cb9304b65
Clean IRAM and DRAM address space conversion macros
2022-07-29 17:07:39 +08:00
wanlei
bb5a95f1aa
soc: fix register header files not self-contain
2022-07-29 11:18:06 +08:00
wuzhenghui
31183270fb
bugfix: fix SOC_ROM_STACK_START defines
2022-07-29 10:51:47 +08:00
wuzhenghui
21a4eda4d4
Use the entire sharedbuffer space as the heap of the D/IRAM attribute
2022-07-29 10:51:47 +08:00
morris
d94432fea8
systimer: refactor hal to accomodate more xtal choices
2022-07-25 16:08:52 +08:00
morris
c4e84751a5
driver: fix public header exceptions for driver
2022-07-22 00:12:36 +00:00
morris
741b031e83
soc: added SOC_TOUCH_SENSE_SUPPORTED macro
2022-07-22 00:12:36 +00:00
Armando (Dou Yiwen)
9f6f61345b
Merge branch 'feature/adc_driver_ng' into 'master'
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ADC Driver NG
Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979
See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5
I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2
2022-07-19 11:41:42 +08:00
Armando
5b523a3313
esp_adc: new esp_adc component and adc drivers
2022-07-15 18:31:00 +08:00
songruojing
b3d8db3ae2
bootloader, esp_system: esp32c2 console uart to support 26MHz xtal
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Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
2022-07-11 12:24:58 +08:00
songruojing
ef813b23fa
rtc: esp32c2 support 26MHz xtal in startup code and rtc_clk.c
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
2e37218ce5
soc, hal: remove XTAL_CLK_FREQ
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XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4
esp_timer, hal: add support for non-integer systimer frequency
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When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:
1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.
For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.
This introduced two possible issues:
1. Overflow when multiplying systimer counter by 5
- Should not be an issue, since systimer counter is 52-bit, so
counter * 5 is no more than 55-bit.
2. The code needs to perform:
- divide by 5: when converting from microseconds to ticks
- divide by 52: when converting from ticks to microseconds
The latter potentially introduces a performance issue for the
esp_timer_get_time function.
2022-07-11 12:24:37 +08:00