Song Ruo Jing
8b8bb72ad4
feat(uart): support uart module sleep retention on c6/h2/p4
2024-07-31 15:15:11 +08:00
wuzhenghui
074035aac5
feat(esp_hw_support): support esp32p4 gpio wakeup deepsleep
2024-07-16 21:58:45 +08:00
Michael (XIAO Xufeng)
98e99e712f
Merge branch 'feature/esp32c5_mp_gpio_support_v5.3' into 'release/v5.3'
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Feature/esp32c5 mp gpio support (v5.3)
See merge request espressif/esp-idf!30884
2024-06-12 00:51:06 +08:00
wuzhenghui
8b369072f9
fix(esp_hw_support/sleep): stop TG0/TG1 watchdog if XTAL not power down in lightsleep
2024-05-21 20:30:28 +08:00
wuzhenghui
d91dfe3510
change(esp_hw_support/sleep): improve esp32c3 systimer stall bug workaround
2024-05-21 20:30:24 +08:00
gaoxu
a621402e1f
feat(pm): add SOC_PM_SUPPORTED in soc caps
2024-05-16 15:00:22 +08:00
wuzhenghui
309725fcd0
feat(esp_hw_support): support esp32p4 clock output
2024-04-17 15:09:49 +08:00
wuzhenghui
101f1abbf1
refactor(esp_hw_support): add hal layer for clock output feature
2024-04-17 14:25:29 +08:00
Konstantin Kondrashov
06c28f0ee9
feat(hal): Adds hal funcs for cpu.c
2024-04-11 13:07:04 +03:00
Cao Sen Miao
0985bfbe27
feat(i2c_master): Add lp_i2c support in i2c master driver
2024-04-03 11:39:04 +08:00
wanlei
20c18ac52b
feat(esp32c61): final introduce helloworld support
2024-04-02 10:50:52 +08:00
xiehang
f3c5047638
feat(extconn): Supports external WiFi connections for ESP32p4 and other espressf chips
2024-04-01 11:44:52 +08:00
xiehang
9d7bd6a8dd
change(esp_phy): Add SOC_PHY_SUPPORTED to control phy mode
2024-04-01 11:36:55 +08:00
morris
1b8e1df648
feat(uhci): add reset and clock control functions
2024-03-29 10:41:17 +08:00
wanlei
1e6c61daa6
spi_master: sct mode support set line mode, transaction interval time
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support line mode 1-2-4-8 depend on targets.
fix sct mode dma descriptor counter compute issue.
add conf_bits_len setting API to control interval time.
2024-03-20 15:42:03 +08:00
Armando
b303e4b7a6
spi_master: new segmented-configure-transfer mode
2024-03-20 15:42:03 +08:00
Wan Lei
966f47f5c1
Merge branch 'feat/c5_spi_support' into 'master'
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feat(spi): bring up c5 spi master/slave/hd driver
Closes IDF-8698, IDF-8699, and IDF-8700
See merge request espressif/esp-idf!29133
2024-03-08 09:41:21 +08:00
Tomas Rezucha
c5dd4a827c
Merge branch 'fix/bbpll_usb_link_error' into 'master'
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fix(esp_phy): Allow "Enable USB when phy init" option only on supported targets
Closes IDFGH-10996 and IDFGH-11554
See merge request espressif/esp-idf!27364
2024-03-07 19:43:01 +08:00
wanlei
0cf11e5b87
feat(spi): add esp32c5 spi support
2024-03-07 18:11:48 +08:00
Guillaume Souchere
0b9f01ac20
feat(soc): Add soc_caps macros for sleep support
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- modify console example to use the new SOC_LIGHT_SLEEP_SUPPORTED
and SOC_DEEP_SLEEP_SUPPORTED macros when registering sleep commands
- remove exclusion of esp32p4 in basic and advanced example in
.build-test-rules.yml
- replace exclusion of esp32p4 for deep and light sleep tests with newly introduced macro
- remove the temporary disable check for esp32p4 and uses the
SOC_LIGHT_SLEEP_SUPPORTED maccro instead.
2024-03-05 07:05:40 +01:00
Tomas Rezucha
ea086840a4
fix(esp_phy): Allow WiFi/USB interference workaround option only on supported targets
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"Enable USB when phy init" Kconfig option would call esp_phy function
`phy_bbpll_en_usb()` that is not implemented for all targets.
Selecting this option for unsupported target results in linking error.
The necessity of this workaround is now defined soc_caps.h rather than
in the Kconfig.
Closes https://github.com/espressif/esp-idf/issues/12185
2024-03-04 16:35:51 +01:00
Song Ruo Jing
5276cd4f1d
refactor(uart): add support to be able to test LP_UART port
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Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
2024-02-07 14:37:48 +08:00
Song Ruo Jing
cf93777077
refactor(rtc): move soc/rtc.h from soc to esp_hw_support component
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Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
2024-01-25 19:15:33 +08:00
Omar Chebib
102d5bbf72
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
laokaiyao
c3c72f02af
fix(i2s): fixed incorrect reg base name on C3
...
Closes https://github.com/espressif/esp-idf/issues/12643
2024-01-16 14:12:32 +08:00
Song Ruo Jing
7f2b85b82b
feat(clk): add basic clock support for esp32p4
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- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
2023-12-29 00:37:26 +08:00
laokaiyao
2b44d62e43
feat(esp32c5): support esp32c5 g0 components
2023-12-08 15:12:24 +08:00
Armando
2c32bd209a
change(fpga): added bypass rng configuration
2023-12-05 11:38:35 +08:00
Gao Xu
b9a3dd1b37
Merge branch 'bugfix/fix_adc_cali_error_after_light_sleep_wake_on_h2' into 'master'
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adc: fix calibration error when waking up from light sleep on H2 and enable test
Closes IDF-8569
See merge request espressif/esp-idf!27242
2023-11-24 18:25:35 +08:00
Jakob Hasse
5f4865e838
Merge branch 'doc/soc_cap_tool' into 'master'
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Doc/soc cap tool
See merge request espressif/esp-idf!27154
2023-11-23 10:47:01 +08:00
gaoxu
4f81883ccf
fix(adc): restore cali registers after light sleep wake up on H2 and enable test
2023-11-20 17:38:34 +08:00
morris
72e414105d
Merge branch 'contrib/github_pr_12559' into 'master'
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fix(spi): correct macro REG_SPI_BASE(i) for all targets (GitHub PR)
Closes IDFGH-11421 and IDFGH-11424
See merge request espressif/esp-idf!27085
2023-11-20 15:55:41 +08:00
Jakob Hasse
46e44ee154
docs(soc): improved soc caps generation documentation
2023-11-17 10:43:59 +08:00
wanlei
4dcd6d7913
fix(spi): correct some signals and dummy bits docs
2023-11-17 02:39:28 +00:00
TD-er
90eada6993
fix(spi): Correct REG_SPI_BASE(i) macro for all targets
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The existing formula can never match these registers.
Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
2023-11-17 02:39:28 +00:00
wuzhenghui
161bd8bfed
change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
2023-11-16 18:11:57 +08:00
Song Ruo Jing
46d33e46ef
fix(console): enable to select UART1 port for console output
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This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
2023-11-09 22:32:49 +08:00
morris
418494800c
fix(i2c): read write FIFO memory by volatile
2023-10-26 14:40:07 +08:00
Cao Sen Miao
8d639492f2
feat(i2c_slave): Add new implementation and API for I2C slave
2023-10-24 18:44:49 +08:00
wuzhenghui
6a436286dc
feat(esp_hw_support): add api to gpio driver to support output internal clock on GPIO
2023-10-20 14:35:26 +08:00
Armando
17063b51e0
feat(soc): added flash operation range macros in ext_mem_defs.h
2023-10-16 17:19:04 +08:00
morris
66497af276
feat(hal): enable hal host test
2023-10-11 11:23:24 +08:00
gaoxu
4f24f805cc
feat(uart): add LP-UART GPIO support
2023-10-08 10:10:02 +08:00
laokaiyao
0b0f25c30d
feat(i2s): supported getting the tx sync count and specify interrupt flags
2023-09-28 15:03:27 +08:00
alanmaxwell
503299fb32
fix(phy): Fix PHY enabled enter WiFi RX state default
2023-09-26 16:23:58 +08:00
Planck (Lu Zeyu)
255d499884
fix(ll): fix cpp compile error
...
Merges https://github.com/espressif/esp-idf/pull/12093
fix(ll): remove FLAG_ATTR macro
Such kind of operator overload will not work because C++ thinks such overload is ambiguous and it still prefer the built-in one which accepts and returns integer. Manually force type conversion seems to be unavoidable.
2023-09-14 14:48:12 +08:00
Konstantin Kondrashov
054d4943c5
Merge branch 'feature/esp32p4_update_systimer' into 'master'
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feat(esp_timer): Support systimer for ESP32P4
Closes IDF-7486 and IDF-7487
See merge request espressif/esp-idf!25688
2023-09-13 19:13:39 +08:00
Konstantin Kondrashov
cbdb799b6f
feat(esp_timer): Support systimer for ESP32P4
2023-09-13 19:13:38 +08:00
Marius Vikhammer
573404b328
Merge branch 'bugfix/use_xtal_for_c3_wdt' into 'master'
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fix(wdt): changed ESP32-C3 WDT to use XTAL as clock
Closes IDF-6729
See merge request espressif/esp-idf!25867
2023-09-13 10:44:38 +08:00
Marius Vikhammer
ca99f55316
fix(wdt): changed ESP32-C3 WDT to use XTAL as clock
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This clock is unchanged even when CPU/APB frequency changes (e.g. due to esp_pm),
which means timeout period is correct even after such a change.
2023-09-08 15:12:21 +08:00