morris
2e0ffbd543
Merge branch 'bugfix/fix-driver-8_16bit-reg-access' into 'master'
...
bugfix/driver: fix and cleanup soc/ll stuffs
Closes IDF-3722
See merge request espressif/esp-idf!14829
2021-08-30 10:27:05 +00:00
Michael (XIAO Xufeng)
d910d42a8d
Merge branch 'bugfix/soc_interrupt_source' into 'master'
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soc: remove outdated description of interrupts on RISCV CPUs
See merge request espressif/esp-idf!14974
2021-08-30 09:38:24 +00:00
Michael (XIAO Xufeng)
59cedcb748
soc: remove outdated description of interrupts on RISCV CPUs
2021-08-30 17:38:16 +08:00
SalimTerryLi
892f5e7df3
timer_group: fix wrongly generated reg header that introduced in 443845fd54
2021-08-30 13:51:25 +08:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
...
update all struct headers to be more "standardized":
- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199
added helper macros to force peripheral registers being accessed in 32 bitwidth
added a check script into ci
2021-08-30 13:50:58 +08:00
wuzhenghui
32abe5ce42
fix apb freq err temporarily
2021-08-27 19:59:33 +08:00
sly
11dfd802e0
esp32h2: add rtc clock support
2021-08-26 11:25:39 +08:00
wuzhenghui
6ab495b4dc
esp32h2: chip env support
...
brownout init fixed
2021-08-25 11:02:47 +08:00
morris
0c41837b06
Merge branch 'refactor/timer_group-reg_file-update' into 'master'
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refactor/timer_group update reg headers for c3 and s2
Closes IDF-3690
See merge request espressif/esp-idf!14761
2021-08-23 04:30:59 +00:00
morris
bb87fd8f08
Merge branch 'refactor/pcnt_driver_esp32s3' into 'master'
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pcnt: soc update and hal refactor
See merge request espressif/esp-idf!14698
2021-08-20 04:23:15 +00:00
SalimTerryLi
443845fd54
timer_group: update reg headers for c3&s2&h2 and fix direct 8/16bit reg access
2021-08-19 18:56:32 +08:00
wuzhenghui
f913a10a22
update reset reason for c3/s3/h2
2021-08-13 17:45:53 +08:00
morris
1656cee69d
i2s: correct soc info
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1. remove non-exist I2S instance
2. update soc_caps.h, i2s_ll.h
2021-08-10 21:06:59 +08:00
suda-morris
9920271c21
pcnt: update pcnt soc data for all targets
2021-08-10 17:19:21 +08:00
Michael (XIAO Xufeng)
947980ecac
Merge branch 'bugfix/uart_set_pin_use_iomux' into 'master'
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uart: uart_set_pin function will now use IOMUX whenever possible
Closes IDF-3183
See merge request espressif/esp-idf!14318
2021-08-05 04:17:29 +00:00
Omar Chebib
779e7400b0
uart: uart_set_pin function will now use IOMUX whenever possible
...
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
2021-08-04 12:48:30 +08:00
laokaiyao
3c57a6ac36
driver/i2s: refactor ll and hal
2021-08-04 10:20:03 +08:00
laokaiyao
d51b85989b
doc/i2s: update i2s programming guide on s3 & c3
2021-08-04 10:20:03 +08:00
Konstantin Kondrashov
4972605b16
esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt
2021-08-03 14:35:29 +08:00
Cao Sen Miao
69ad24c943
temp_sensor: add docs for esp32c3
2021-07-21 13:34:52 +08:00
morris
1560d6f1ba
soc: add reset reasons in soc component
2021-07-13 10:45:38 +08:00
Shu Chen
75bd02bd46
esp32h2: add some more fixes and TODOs
2021-07-01 20:36:39 +08:00
Shu Chen
ee23a489b9
esp32h2: code clean up
2021-07-01 19:53:50 +08:00
Shu Chen
205cd469e9
esp32h2: update driver/hal/soc components to support esp32h2
2021-07-01 19:53:11 +08:00
Shu Chen
983cca8b27
esp32h2: copy driver/hal/soc components from esp32c3
...
Copy the esp32c3 code without any change:
* components/driver/esp32h2
* components/esp32h2
* components/hal/esp32h2
* components/soc/esp32h2
2021-07-01 19:53:11 +08:00
