Commit Graph

96 Commits

Author SHA1 Message Date
KonstantinKondrashov
741e89cbaa esp_hw_support: Removes efuse dependency 2022-11-25 19:27:33 +08:00
Konstantin Kondrashov
b4580a1980 Merge branch 'feature/esp_timer_add_ll_for_rc_fast_clk' into 'master'
hal: Adds hal/ll func for SYSTIMER to select clock source: XTAL or RC_FAST_CLK

Closes IDF-5323

See merge request espressif/esp-idf!21136
2022-11-23 15:05:48 +08:00
KonstantinKondrashov
63f852adc8 hal: Adds hal/ll func for SYSTIMER to select clock source: XTAL or RC_FAST_CLK 2022-11-22 20:29:19 +08:00
Omar Chebib
cd21058097 C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT
Closes https://github.com/espressif/esp-idf/issues/9938
2022-11-21 16:18:08 +08:00
Simon Arlott
d1993c01f2 hal/uart_ll.h: Fix compile with C++
I'm including <hal/uart_ll.h> in my C++ application because I need to
bypass the uart driver. The inline functions in the header file fail to
compile as C++.

All of the enums need explicit casts for conversion to/from integers.

Merges https://github.com/espressif/esp-idf/pull/10106
2022-11-15 06:29:05 +00:00
Song Ruo Jing
eae70a8513 Merge branch 'bugfix/wakeup_io_hold_unhold_in_sleep' into 'master'
gpio: Fix deep sleep wakeup IOs unable to unhold after wakeup

Closes IDF-6122

See merge request espressif/esp-idf!20823
2022-11-14 12:48:40 +08:00
Song Ruo Jing
d0a7dc3e9f gpio: Fix IO hold function related problems
1. Fix deep sleep wakeup IOs can not be unhold issue
2. Correct hold related APIs' description
3. Fix gpio_force_hold_all API

docs: Add GPIO wakeup source to sleep_modes doc for ESP32C3 and C2
2022-11-11 20:39:04 +08:00
wangyuanze
6fc51c06c7 uart: force inline ll functions 2022-11-11 16:59:40 +08:00
Cao Sen Miao
803fc3fbe0 I2C: Add i2c support for ESP32C6 2022-11-07 14:12:53 +08:00
liuning
57c394c4e0 esp_wifi: add protection for mac reset 2022-10-31 06:41:42 +00:00
Armando
260ee86c37 rtc: united sar peripheral control 2022-10-27 16:51:25 +08:00
Armando (Dou Yiwen)
542bdea689 Merge branch 'feature/adc_calibration_on_c2' into 'master'
esp_adc: support adc calibration on esp32c2

Closes IDF-5203 and IDF-5899

See merge request espressif/esp-idf!20044
2022-10-18 10:50:59 +08:00
Armando
ccfbba5994 esp_adc: support adc calibration on esp32c2 2022-10-13 21:03:51 +08:00
jingli
128d82eaaa hal/gpio_ll: fix digital gpio can not disable hold during deep sleep 2022-10-11 12:11:36 +08:00
jingli
b903a2253b esp_hw_support/sleep: fix current leakage when hold digital io during deep sleep 2022-10-11 12:11:28 +08:00
morris
a1030307f1 gptimer: bringup driver on esp32c6 2022-09-13 10:50:58 +08:00
Cao Sen Miao
31b88a4c88 I2C: Refactor i2c hal and ll 2022-09-01 15:53:59 +08:00
wuzhenghui
c31aaeda2a ll: add reset interface to rtc_cntl_ll 2022-08-31 01:59:36 +00:00
Gao Xu
0da21aca0d Merge branch 'bugfix/fix_spi_hd_quad_issue_esp32c3' into 'master'
essl_spi: fix wrong dummy cycle under quad spi mode ant add a test to verify spi quad mod

Closes IDF-5182 and IDF-5181

See merge request espressif/esp-idf!18680
2022-08-30 10:53:11 +08:00
Michael (XIAO Xufeng)
4fb1ccdd4e Merge branch 'feature/c2_efuse_with_26mhz' into 'master'
efuse(es32c2): Supports 26MHz XTAL

Closes IDF-5427

See merge request espressif/esp-idf!18851
2022-08-29 01:43:57 +08:00
morris
995b89fbb6 gptimer: add API to get captured count value 2022-08-25 17:55:19 +08:00
KonstantinKondrashov
f2adee8b28 efuse(es32c2): Supports 26MHz XTAL 2022-08-24 09:10:57 +00:00
gaoxu
3610b14aef SPI : fix wrong dummy cycle on quad mode and put get-command function in spi_ll.h
1.The dummy_bits is set to 4 in ESP32C3/C2, therefore, the data transmission started too early.This commit fix this issue by changing dummy_bits to 8.
2.Put the spi command the spi defintion in spi_types.h
3.Put the function which get spi command or dummy bits in spi_ll.h
2022-08-23 10:46:56 +08:00
Michael (XIAO Xufeng)
746f4b814c uart: move frequency of clock sources out of HAL 2022-08-15 18:55:43 +00:00
zlq
7d8f10423e 1.add ldo parameters in efuse table; 2.set ldo dbias based on pvt-efuse; 3.add pll cali stop function; 4. add efuse_ocode 2022-08-05 14:24:51 +08:00
morris
cf4cfc69ed esp_adc: add test with -O0 2022-08-02 23:07:06 +08:00
morris
031adc01c4 gpio: add test with -O0 2022-08-02 23:07:06 +08:00
morris
7faf1bee73 gptimer: add test with -O0 2022-08-02 22:53:36 +08:00
Armando
f325ad2211 mmu: fix wrong mmu end check
In mmu code, we follow the rule that the `end` address shouldn't be
touched. This commit fix wrong end address check in mmu_ll.h
2022-07-27 10:22:09 +00:00
morris
d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
Song Ruo Jing
4734b1433b Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master'
gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report

Closes IDF-4901

See merge request espressif/esp-idf!18805
2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master'
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
songruojing
0c4b9a0101 gpio: Fix HAL bad bit shift operation on gpio_num_t reported from coverity
All gpio hal and ll functions input arguments gpio_num_t are changed to uint32_t type.
Validation of gpio num should be guaranteed from the driver layer.
2022-07-15 16:51:25 +08:00
Ivan Grokhotkov
2e37218ce5 soc, hal: remove XTAL_CLK_FREQ
XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Michael (XIAO Xufeng)
a58362a429 Merge branch 'feature/efuse_rev_major_minor' into 'master'
efuse: Adds major and minor versions

See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
support c2 26M/32M xtal for bbpll

Closes IDF-5485

See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
Cao Sen Miao
e218723e0e I2C: Make I2C clock frequency accurate 2022-07-06 11:58:08 +08:00
cje
e16165f263 support c2 26M/32M xtal for bbpll 2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00
Cao Sen Miao
2c0651a671 Add regi2c enable/disable reference count 2022-06-23 15:36:44 +08:00
Cao Sen Miao
3a820462ac temperature_sensor: Add temperature sensor support for ESP32-C2 2022-06-23 15:36:43 +08:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master'
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
2fd784c97a G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h" 2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00