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Merge branch 'feature/c2_efuse_with_26mhz' into 'master'

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efuse(es32c2): Supports 26MHz XTAL

Closes IDF-5427

See merge request espressif/esp-idf!18851
This commit is contained in:
Michael (XIAO Xufeng) 2022-08-29 01:43:57 +08:00
commit 4fb1ccdd4e
4 changed files with 12 additions and 2 deletions
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2
components/efuse/esp32c2/esp_efuse_utility.c
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@ -42,7 +42,7 @@ const esp_efuse_range_addr_t range_write_addr_blocks[] = {
// Update Efuse timing configuration
static esp_err_t esp_efuse_set_timing(void)
{
// no need to set special timing values
efuse_hal_set_timing(0);
return ESP_OK;
}
#endif // ifndef CONFIG_EFUSE_VIRTUAL

6
components/hal/esp32c2/efuse_hal.c
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@ -10,6 +10,7 @@
#include "hal/assert.h"
#include "hal/efuse_hal.h"
#include "hal/efuse_ll.h"
#include "hal/clk_tree_ll.h"
#define ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block) ((error_reg) & (0x0F << (4 * (block))))
@ -29,6 +30,11 @@ void efuse_hal_set_timing(uint32_t apb_freq_hz)
{
(void) apb_freq_hz;
efuse_ll_set_pwr_off_num(0x190);
int xtal = clk_ll_xtal_load_freq_mhz();
HAL_ASSERT(xtal == 40 || xtal == 26);
// for the XTAL = 40 MHz we use the default value = 200.
// XTAL = 26 MHz the value = 130.
efuse_ll_set_tpgm_inactive(xtal * 5);
}
void efuse_hal_read(void)

2
components/hal/esp32c2/include/hal/efuse_hal.h
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@ -19,7 +19,7 @@ extern "C" {
/**
* @brief set eFuse timings
*
* @param apb_freq_hz APB frequency in Hz
* @param apb_freq_hz APB frequency in Hz (not used, kept for API compatibility)
*/
void efuse_hal_set_timing(uint32_t apb_freq_hz);

4
components/hal/esp32c2/include/hal/efuse_ll.h
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@ -120,6 +120,10 @@ __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint1
EFUSE.wr_tim_conf2.pwr_off_num = value;
}
__attribute__((always_inline)) static inline void efuse_ll_set_tpgm_inactive(uint8_t value)
{
EFUSE.wr_tim_conf0.tpgm_inactive = value;
}
/******************* eFuse control functions *************************/
#ifdef __cplusplus