Michael (XIAO Xufeng)
68034a5149
Merge branch 'bugfix/soc_rtcperi_rtcldo' into 'master'
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fix rtc peripheral wakeup fail bug & clear rtc regulator force on configuration when in deepsleep
See merge request espressif/esp-idf!9709
2021-01-22 16:55:55 +08:00
Michael (XIAO Xufeng)
a08265aad8
Merge branch 'bugfix/fix_x32k_config_param' into 'master'
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esp32s2/esp32s3: Improve 32k xtal startup time
See merge request espressif/esp-idf!11836
2021-01-22 16:42:54 +08:00
Angus Gratton
3532f52f60
Merge branch 'bugfix/ldgen_ignore_nonexistent_archives_and_obj' into 'master'
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ldgen: check mappings
Closes IDF-1624
See merge request espressif/esp-idf!8557
2021-01-21 15:59:35 +08:00
Angus Gratton
fe8a891de9
Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master'
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bootloader/esp32c3: Support secure boot
Closes IDF-2115
See merge request espressif/esp-idf!11797
2021-01-21 08:42:49 +08:00
chaijie
f6c61544ae
esp32s2/esp32s3: Improve 32k xtal startup time
2021-01-20 03:51:21 +00:00
chaijie
7cf32b4387
esp32s2: Fix wakeup fail issue when pd peripheral in lightsleep.
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esp32s2: fix wrong deepsleep configuration issue.
1. if RTC_CK8M_ENABLE_WAIT_DEFAULT set to 1, rtc peripherals will not poweron successfully if pd peripherals in light_sleep, the minimum RTC_CK8M_ENABLE_WAIT_DEFAULT is RTC_POWERUP_CYCLES + RTC_WAIT_CYCLES + 2;
2. when goto deepsleep after lightsleep waking up, rtc regulator should not force pu.
2021-01-20 03:51:07 +00:00
KonstantinKondrashov
88c5fe49b8
soc: Adds a soc_caps define for all chips to define the number of boot key digests
2021-01-19 20:51:13 +08:00
Li Shuai
aa7fd175b9
light sleep: light sleep support for esp32c3
2021-01-19 14:50:58 +08:00
Renz Bagaporo
d1c800fbbb
components: fix ldgen check errors
2021-01-19 11:17:18 +08:00
ninh
27aa6c289f
components/pm: Add slp gpio configure workaround
2021-01-15 15:34:45 +08:00
Marius Vikhammer
0713e93b8f
TWAI: bringup for S3 and C3
2021-01-14 20:30:31 +08:00
morris
e6d23a35ec
gdma: dynamic alloc DMA channels
2021-01-13 10:52:27 +08:00
Chen Jian Xing
5b44295cb9
esp_wifi: fix esp32c3 code issues
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1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
2021-01-10 16:16:28 +08:00
ninh
dc7bdb9857
adjust lightsleep overhead time and cali slowclk
2021-01-06 03:40:28 +00:00
Marius Vikhammer
eb788deb03
esp_hw_support: merge C3 changes to master
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Merge RTC related C3 changes to master
2020-12-30 12:20:41 +08:00
Angus Gratton
1b0442b963
Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master'
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esp_system: make rtc fast memory to heap configuration unified across chips
Closes IDF-2503
See merge request espressif/esp-idf!11693
2020-12-29 11:41:05 +08:00
Darian Leung
602a747b31
Add USB Host registers and types and LL layer
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This commit adds the register struct, Low Level Layer, and
protocol types for USB Host
2020-12-24 19:43:42 +08:00
Angus Gratton
c3ba995f2c
Merge branch 'ci/ccomp_performance_tests' into 'master'
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unit_test: Refactor all performance tests that rely on cache compensated timer
See merge request espressif/esp-idf!11709
2020-12-24 13:44:52 +08:00
Mahavir Jain
880a63b2e9
esp_system: make rtc fast memory to heap configuration unified across chips
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Closes IDF-2503
2020-12-24 09:46:35 +05:30
Angus Gratton
fa892eb017
soc: Explain units for rtc_clk_cal() function, fix typo
2020-12-23 09:53:24 +11:00
Cao Sen Miao
e338a2e3df
rtc: add function to en/disable the rtc clock
2020-12-23 09:53:24 +11:00
Marius Vikhammer
0a95151a75
unit_test: Refactor all performance tests that rely on cache compensated timer
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There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.
This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
2020-12-22 18:56:24 +11:00
Cao Sen Miao
0736c91d68
soc: Remove cache constants from soc.h
2020-12-17 15:34:13 +11:00
Marius Vikhammer
457ce080ae
AES: refactor and add HAL layer
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Refactor the AES driver and add HAL, LL and caps.
Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Angus Gratton
c29d93986d
soc: Add initial ESP32-C3 support
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From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00
Armando
fb8b905539
uart: add uart support on esp32s3
2020-11-24 19:12:51 +08:00
Michael (XIAO Xufeng)
099fca515d
Merge branch 'bugfix/move_crypto_caps' into 'master'
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SHA/RSA: moved all caps to soc_caps.h
Closes IDF-2300
See merge request espressif/esp-idf!11032
2020-11-13 11:06:44 +08:00
Angus Gratton
935e4b4d62
Merge branch 'feature/riscv_arch' into 'master'
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Add RISC-V support
Closes IDF-2359
See merge request espressif/esp-idf!11140
2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe
Updates for riscv support
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* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
longer signed/unsigned int).
Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Cao Sen Miao
6eee601cf6
i2c: Add supports on esp32s3
2020-11-12 11:32:45 +08:00
Marius Vikhammer
488f46acf5
SHA/RSA: moved all caps to soc_caps.h
2020-11-12 02:15:46 +00:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
morris
ff976867b3
rmt: split TX and RX in LL driver
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Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
chenjianqiang
9465af0066
rmt: support esp32s3
2020-11-05 19:00:55 +08:00
morris
e4c8ec6174
timergroup: move interrupt index into peripheral description file
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1. Added timer_group_periph.c file, describing module global signals
(e.g. interrupt index)
2. Added more caps in soc_caps.h
2020-11-03 18:16:50 +08:00
Michael (XIAO Xufeng)
35faecea1d
Merge branch 'feature/support_sigma_delta_on_s3' into 'master'
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sigma_delta: add periph signal list and support esp32-s3
See merge request espressif/esp-idf!10945
2020-10-30 17:22:02 +08:00
Michael (XIAO Xufeng)
3bacf35310
esp_flash: support high capacity flash chips (32-bit address)
2020-10-29 18:20:11 +08:00
morris
17808b3ff8
sigma_delta: add periph signal list and support esp32-s3
2020-10-29 11:06:28 +08:00
Renz Bagaporo
6b0a5af73e
soc: move implementations to esp_hw_support
2020-10-28 22:38:50 +08:00
Renz Bagaporo
79887fdc6c
soc: descriptive part occupy whole component
2020-10-28 07:21:29 +08:00
Renz Christian Bagaporo
1f2e2fe8af
soc: separate abstraction, description and implementation
2020-02-11 14:30:42 +05:00
Andrei Gramakov
4e8b4b9e49
soc: add USB peripheral register definitions, hal level, reg map, etc
2020-02-10 08:33:39 +00:00
Konstantin Kondrashov
daa9c30c8e
rmt/esp32s2: Update RMT: reg, struct, LL and test_utils/ref_clock.c
2020-02-09 20:03:31 +08:00
Ivan Grokhotkov
4bfd0b961b
Merge branch 'fix/spi_on_esp32s2' into 'master'
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spi: support esp32s2
See merge request espressif/esp-idf!7432
2020-02-09 19:45:16 +08:00
Ivan Grokhotkov
98bb3772e0
soc: spi_flash LL fixes
2020-02-07 16:18:31 +01:00
Wangjialin
aaf119e930
flash(esp32s2): fix setting address field in spi user mode.
2020-02-07 16:10:51 +01:00
Angus Gratton
fda4efa300
Merge branch 'bugfix/rtc_wdt_timeout' into 'master'
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soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz
See merge request espressif/esp-idf!7499
2020-02-06 14:27:35 +08:00
Konstantin Kondrashov
739eb05bb9
esp32: add implementation of esp_timer based on TG0 LAC timer
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Closes: IDF-979
2020-02-06 14:00:18 +08:00
KonstantinKondrashov
47a5d14e59
soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz
2020-02-05 15:16:28 +08:00
Ivan Grokhotkov
50466a5e4f
Merge branch 'bugfix/esp32s2_ldscripts' into 'master'
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esp32s2: LD script fixes/improvements and re-enable SystemView examples
Closes IDF-1357, IDF-1354, and IDF-1346
See merge request espressif/esp-idf!7431
2020-02-05 02:09:29 +08:00