Aditya Patwardhan
55c5c8367b
Merge branch 'bugfix/soc_cpu_subsys_region_v5.1' into 'release/v5.1'
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fix(soc): change debug addr range to CPU subsystem range (v5.1)
See merge request espressif/esp-idf!28672
2024-02-28 11:16:48 +08:00
Jiang Jiang Jian
76152c80a2
Merge branch 'c6_auto_dbias_master_hsq_v5.1' into 'release/v5.1'
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ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage (v5.1)
See merge request espressif/esp-idf!28722
2024-02-28 10:49:13 +08:00
Jiang Jiang Jian
1553b5b1d1
Merge branch 'feature/case_for_ot_sleepy_ci' into 'release/v5.1'
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ci(openthread): add a test case for openthread sleepy device
See merge request espressif/esp-idf!28280
2024-02-28 10:41:10 +08:00
hongshuqing
80378b809e
feat(pmu): set fix voltage to different mode for esp32c6
2024-02-22 15:01:14 +08:00
Jakob Hasse
a66234b6de
fix(esp_hw_support): Removed unused include directories from cmake
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* Closes https://github.com/espressif/esp-idf/issues/12700
2024-02-21 11:41:11 +08:00
hongshuqing
9f5cd217a0
feat(pmu): set fix voltage to different mode for esp32h2
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h2 remove include
2024-01-26 11:39:16 +08:00
Mahavir Jain
614ad494f6
fix(soc): change debug addr range to CPU subsystem range
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For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).
For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.
For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
2024-01-24 12:52:27 +05:30
Xu Si Yu
abaa9f2bfe
ci(openthread): Add a test case for openthread sleepy device
2024-01-23 16:11:29 +08:00
wuzhenghui
9a246bcbf1
feat: support dump last time sleep context
2024-01-23 16:11:29 +08:00
nilesh.kale
fa02eeeb97
fix(esp_hw_support): fix API esp_hmac_disable_jtag() to disable JTAG
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After ets_hmac_disable(), invalidating JTAG register process is ineffective.
So, added call to enable hmac begore invalidating JTAG REG.
And similarly disabled it after invalidation.
2024-01-23 12:20:06 +05:30
Jiang Jiang Jian
aa2793f3f1
Merge branch 'feature/support_hw_trigger_regdma_when_pu_top_v5.1' into 'release/v5.1'
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fix(pm): trigger regdma retention by PMU when TOP is not power down on esp32H2 (backport v5.1)
See merge request espressif/esp-idf!28342
2024-01-18 11:06:51 +08:00
Lou Tianhao
2ecbfecedf
feat(pm): support PMU trigger regdma when PU TOP
2024-01-16 14:01:22 +08:00
Xiao Xufeng
a055fcbda4
fix(rtc): fixed bbpll not calibrated from bootloader issue
2024-01-05 10:19:20 +08:00
chaijie@espressif.com
630a8ff709
fix(bbpll): fix bbpll calibration may stop early bug(ESP32C2/S3/C6/H2)
2024-01-05 03:24:20 +08:00
Michael (XIAO Xufeng)
67043f557f
feat(soc): Increase max supported version of C3 to 1.99
2024-01-03 18:02:49 +08:00
wuzhenghui
ecca6fb1c2
change(esp_hw_support/sleep): rename ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY
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1. Rename ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY to ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY
2. Set ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY visible for all targets
2023-12-27 15:36:20 +08:00
wuzhenghui
c33dd0f4a2
fix(esp_hw_support/sleep): wait flash ready after non-pd_top lightsleep for esp32c6
2023-12-27 15:36:15 +08:00
Jiang Jiang Jian
a8a3adcfb8
Merge branch 'bugfix/put_extra_link_retention_in_iram_5.1' into 'release/v5.1'
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fix(pm): place extra link opt in iram(Backport v5.1)
See merge request espressif/esp-idf!27898
2023-12-21 11:28:38 +08:00
Lou Tianhao
1419db4b91
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
2023-12-19 11:44:23 +08:00
Jiang Jiang Jian
e51e8a0948
Merge branch 'bugfix/fix_esp32h2_system_retention_restore_backup_v5.1' into 'release/v5.1'
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fix(esp_hw_support): fix esp32h2 system link restore override cpu clk configuration(v5.1)
See merge request espressif/esp-idf!27814
2023-12-15 10:38:24 +08:00
cjin
7d2ab4c14d
fix(pm): place extra link opt in iram
2023-12-14 11:17:54 +08:00
wuzhenghui
5dac3d9e03
fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process
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Closes https://github.com/espressif/esp-idf/issues/12695
2023-12-11 09:24:07 +00:00
Jiang Jiang Jian
e91322891c
Merge branch 'fix/esp32c6_sleep_pll_issue_v5.1' into 'release/v5.1'
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fix(pm): add mac/bb power down/up prepare for fix esp32c6 pll issue (backport v5.1)
See merge request espressif/esp-idf!27339
2023-12-11 15:12:51 +08:00
Jiang Jiang Jian
e0cd5b7aa5
Merge branch 'backport/add_config_to_set_custom_mac_as_base_mac_v5_1' into 'release/v5.1'
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feat(mac): Add a configuration to set custom MAC as base MAC(Backport V5.1)
See merge request espressif/esp-idf!27737
2023-12-11 15:11:19 +08:00
wuzhenghui
3646b5d0c1
fix(esp_hw_support): fix esp32h2 system link restore override cpu clk configuration
2023-12-11 11:42:56 +08:00
xiaqilin
ef4f420663
fix(pm): add mac/bb power down/up prepare for fix esp32c6 pll issue
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* switch root clk src to PLL for modem reg opt and added callback
* register power_down/power_up callback in ieee802154 driver for esp32c6
* remove software regdma opt in bt
2023-12-08 08:03:32 +00:00
wuzhenghui
4a7d9dd387
fix(esp_hw_support): re-initialize icg map in modem_clock_module_enable
2023-12-08 14:22:36 +08:00
zwx
923ce6a4b2
feat(mac): Add a configuration to set custom MAC as base MAC
2023-12-07 14:15:40 +08:00
Ivan Grokhotkov
a803c846aa
Merge branch 'bugfix/console_examples_reenable_v5.1' into 'release/v5.1'
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examples: re-enable console examples for C2, C6, H2 (v5.1)
See merge request espressif/esp-idf!24336
2023-11-29 23:57:09 +08:00
Ivan Grokhotkov
6e2dd2924a
fix(esp_hw_support): fix build with CONFIG_ESP_CONSOLE_UART=n on C6
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Closes https://github.com/espressif/esp-idf/issues/11924
2023-11-28 18:08:11 +01:00
Jiang Guang Ming
03582a8cfe
fix(esp32c3): Update esp32c3 chip revision
2023-11-27 11:32:50 +00:00
Shu Chen
ecbbd3c3d9
Merge branch 'backport/add_ot_radio_stats_enable_config_5_1' into 'release/v5.1'
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feat(openthread): backport some openthread features(BackportV5.1)
See merge request espressif/esp-idf!26885
2023-11-22 12:23:53 +08:00
Jiang Jiang Jian
e718b603e4
Merge branch 'bugfix/clear_ulp_wake_intr_in_wake_source_enable_v5.1' into 'release/v5.1'
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fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable (backport v5.1)
See merge request espressif/esp-idf!27188
2023-11-21 10:52:54 +08:00
Jiang Jiang Jian
0e1ec38785
Merge branch 'bugfix/fix_lightsleep_current_leakage_on_usj_pad_v5.1' into 'release/v5.1'
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fix(esp_hw_support): fix lightsleep current leakage on usb pad (backport v5.1)
See merge request espressif/esp-idf!27205
2023-11-21 10:51:11 +08:00
wuzhenghui
6b14ca55d5
fix(riscv): supports 1 byte and larger than 64byte range watchpoint setting
2023-11-16 20:40:04 +08:00
wuzhenghui
6ae596c764
fix(esp_hw_support): fix lightsleep current leakage on usb-phy controlled pad
2023-11-16 20:03:30 +08:00
wuzhenghui
61bb3fb67f
fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable
2023-11-16 11:49:40 +08:00
Jiang Jiang Jian
cee24a6ce1
Merge branch 'bringup/support_callback_mechanism_in_lightsleep_flow_v5.1' into 'release/v5.1'
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feat(pm): support callback mechanism in lightsleep flow(backport v5.1)
See merge request espressif/esp-idf!26365
2023-11-14 15:33:19 +08:00
Jiang Jiang Jian
0172c33818
Merge branch 'bugfix/fix_deinit_init_wifi_scan_fail_issue_v5.1' into 'release/v5.1'
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Bugfix/fix deinit init wifi scan fail issue v5.1(Backport v5.1)
See merge request espressif/esp-idf!27064
2023-11-14 15:25:54 +08:00
Jiang Jiang Jian
1ed40720d6
Merge branch 'bugfix/lp_active_slow_clock_domain_default_power_down_v5.1' into 'release/v5.1'
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backport v5.1: In the LP ACTIVE state, the slow clock power domain is by default in a powered-off state
See merge request espressif/esp-idf!26601
2023-11-14 15:09:02 +08:00
morris
d0f84285b7
Merge branch 'bugfix/fix_wrong_adc_attenuation_name_v5.1' into 'release/v5.1'
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fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12 (v5.1)
See merge request espressif/esp-idf!26967
2023-11-13 16:50:11 +08:00
muhaidong
abfd0cbebc
change(hal): remove useless code from periph_ll_wifi_bt_module_enable_clk
2023-11-10 11:15:49 +08:00
Armando
6de9757a4b
fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12
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By design, it's 12 dB. There're errors among chips, so the actual
attenuation will be 11dB more or less
2023-11-07 14:09:21 +08:00
wuzhenghui
263a27b26b
bugfix(esp_hw_support): allow reject for lightsleep
2023-11-07 11:10:14 +08:00
Lou Tianhao
9b3e40c9d1
feat(pm/deepsleep): Support EXT1_WAKEUP_MODE_PER_PIN
2023-11-03 11:02:56 +08:00
Lou Tianhao
42ec7a5e37
change(pm): Change sleep callback implement
2023-11-02 11:05:38 +00:00
Lou Tianhao
925da11115
feat(PowerManagement/lightsleep): Support ESP_SLEEP_EVENT_CALLBACKS
2023-11-02 11:05:38 +00:00
Lou Tianhao
dce3b64411
feat(PowerManagement/lightsleep): Define and export a strong symbol of rv_core_critical_regs_restore
2023-11-02 11:05:38 +00:00
Li Shuai
9d97513147
change(Power Management): the xpd_xtal32k value depends on system slow clock source config option when pmu initialize
2023-10-24 17:15:10 +08:00
KonstantinKondrashov
315d4864bb
fix(esp_hw_support): Return deep sleep APIs to the original behavior
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Closes https://github.com/espressif/esp-idf/issues/12359
2023-10-18 18:18:49 +08:00