Commit Graph

104 Commits

Author SHA1 Message Date
Angus Gratton
c676c94445 Merge branch 'bugfix/fix_coredump_fake_stack_bug' into 'master'
espcoredump: Fix bugs related to (fake) stacks

See merge request espressif/esp-idf!12581
2021-03-24 06:55:42 +00:00
Omar Chebib
e533431095 espcoredump: Fix bugs related to (fake) stacks
Add support to tasks stacks in RTC DRAM. Before this fix, any stack
in RTC DRAM would have been considered as corrupted, whichi is not
the case.
Fix a bug related to wrong parameters passed to esp_core_dump_get_stack.
Fix a bug reading fake stack memory, triggering a memory violation.

* Closes https://github.com/espressif/esp-idf/issues/6751
* Merges https://github.com/espressif/esp-idf/pull/6750
2021-03-22 11:38:21 +08:00
morris
3b66958b33 mcpwm: added peripheral signal description list 2021-03-16 21:54:00 +08:00
morris
d0be56b8fe lcd: add LL driver for esp32-s3 2021-03-13 22:31:30 +08:00
morris
7b37158ede rmt: distinguish group and channel in HAL layer 2021-02-25 12:42:23 +08:00
Michael (XIAO Xufeng)
d7d1dee208 system: reset dma when soft reset 2021-01-25 04:51:40 +00:00
morris
e6d23a35ec gdma: dynamic alloc DMA channels 2021-01-13 10:52:27 +08:00
Mahavir Jain
880a63b2e9 esp_system: make rtc fast memory to heap configuration unified across chips
Closes IDF-2503
2020-12-24 09:46:35 +05:30
boarchuz
06d6146445 fix rtc_gpio_desc_t compilation error
Closes https://github.com/espressif/esp-idf/pull/6029
Closes https://github.com/espressif/esp-idf/issues/6301
Closes IDFGH-4470
Closes IDFGH-4167
2020-12-21 13:54:52 +05:30
Marius Vikhammer
457ce080ae AES: refactor and add HAL layer
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Angus Gratton
c29d93986d soc: Add initial ESP32-C3 support
From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
morris
ff976867b3 rmt: split TX and RX in LL driver
Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
morris
e4c8ec6174 timergroup: move interrupt index into peripheral description file
1. Added timer_group_periph.c file, describing module global signals
   (e.g. interrupt index)
2. Added more caps in soc_caps.h
2020-11-03 18:16:50 +08:00
morris
17808b3ff8 sigma_delta: add periph signal list and support esp32-s3 2020-10-29 11:06:28 +08:00
Renz Bagaporo
6b0a5af73e soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
Renz Bagaporo
79887fdc6c soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
Renz Bagaporo
988be69466 esp_hw_support: create component 2020-10-28 07:21:29 +08:00
Felipe Neves
3057b76a7e tests: re-add all disabled tests and all disabled configurations 2020-10-14 16:11:49 +11:00
Felipe Neves
a3c90bf59a freertos: merged freertos 10 kernel files into IDF
freertos/port: update the port files and split into xtensa and riscv ports

freertos: separated cpu files from rest of the kernel sources

freertos/port_xtensa: separated private include files into a folder

freertos/tasks: added task create pinned to core function do not break current IDF API

freertos/tasks: mimiced task create pinned function into tasks.c to do not break the IDF API.

freertos: freertos component now compiling

freertos: freertos component now building

freertos: moved critical sections outside from FR kernel section to portable section

portmacro_xtensa: add void indentifier on functions that take no arguments

freertos: fix critical sections implementation to match with their function prototype

freertos: add cmake changes of freertos into make

freertos: remove portDONT_DISCARD attribute from switch context function, it was breaking the docs building.

freertos: fix conflicitng types of vApplicationSleep function

license: update the license of freertos

freertos: Doxygen comments refactored to render them correctly on docs

freertos: added new functions of freertos into the documentation

freertos: added message buffers and stream buffers to documentation

sysview: update freertos system view to the compatible with version 10

freertos: fixed event group  documentation rendering

freertos:  update static task structure to match the actual tcb size

freertos: removed backported test functions

freertos/smp: brought SMP code to  FreeRTOS 10 port

freertos/portmacro: added missing crosscore interrupt for yielding tasks

freertos: replaced soft-critical sections with hard-critical sections used by SMP

freertos: placed muxes inside of kernel objects

freertos: replaced original FR critical sections with SMP enabled spinlocks critical sections

freertos: moved xtensa port files to a separated folder

freertos: added multiple instance of global variables required to SMP

freertos: added SMP modifications on specific tasks module functions

freertos: added TLS deletion function to task module

freertos/tls: initialize TLS deletion callback to avoid crashing when calling task delete

freertos: modified vTaskDelete to do not erase current task that runs on other core

freertos: reverted taskhandle and timerhandle as void* type

freertos: fixed de-referencing void pointer to get run time counter

freertos: fix system view trace enter macro arguments

freertos: Replaced soft critical sections with spinlocks on event_groups

freertos: fixed tick function to avoid calling tick hooks twice

freertos: Nofity give checking per CPU if schedule is suspended

freertos: added mpu release on TCB deletion

freertos: Added SMP changes when deleting a TCB on idle task

freertos/license: update freertos license in COPYRIGHT.rst

freertos: unicore configurations can use task create pinned to core, it will be always pinned to core 0

freertos/portmacro: added cpu_hal_get_core_id() function instead of inline assembly

freertos/xtensa:  update xtensa specific files used in master branch

newlib/locks: revert the preemption checking in lock acquisition and release

ref_clock: fix initial state of ref_clock interrupt handler

freertos: added missing critical sections and yielding checkings

freertos: remove magic numbers in vTaskDelete

freertos: added missing critical section in prvIsQueueEmpty
2020-10-13 23:52:03 +00:00
morris
edb5ddf63b soc: placeholder for esp32s3 HAL driver
soc rtc
2020-08-07 11:59:00 +08:00
Michael (XIAO Xufeng)
f6dd63d03d spi_slave_hd: new driver for spi slave in half duplex mode 2020-07-11 00:00:50 +08:00
Ivan Grokhotkov
4cdc5edb4e Revert "freertos, soc: don't lower INTLEVEL when entering critical sections"
This reverts commit 614a580bbb.
2020-07-09 17:15:54 +02:00
Angus Gratton
61ab64439b Merge branch 'bugfix/spi_flash_yield_coredump' into 'master'
fixes for core dump regressions

See merge request espressif/esp-idf!8978
2020-06-16 12:15:50 +08:00
Ivan Grokhotkov
614a580bbb freertos, soc: don't lower INTLEVEL when entering critical sections
This fixes the issue where XTOS_SET_INTLEVEL would lower INTLEVEL from
4 to 3, when eTaskGetState is invoked during the core dump, triggered
from the interrupt watchdog.
2020-06-02 15:42:24 +02:00
Mahavir Jain
1aac284dda heap: add rtc fast memory region to dynamic pool
- for ESP32 only enabled in case of unicore config
- capability wise this region (8K) is same as DRAM, except non-DMA capable
- also fixed small issue in reserved memory region processing when (start == end)
2020-05-14 13:12:26 +00:00
Angus Gratton
dcaa9e385a Merge branch 'bugfix/restore_rtc_wdt_driver' into 'master'
Restore rtc_wdt driver

Closes IDF-1514

See merge request espressif/esp-idf!8148
2020-04-02 19:11:49 +08:00
Darian Leung
53928ab98b Restore rtc_wdt driver
This commit restores rtc_wdt.c and rtc_wdt.h that were removed
in commit 91841a53.
2020-04-01 16:13:35 +08:00
Jeroen Domburg
419848549e Add fixes for gcc8 psram fix improvement 2020-03-27 20:04:47 +07:00
Darian Leung
91841a53ff WDT: Add LL and HAL for watchdog timers
This commit updates the watchdog timers (MWDT and RWDT)
in the following ways:

- Add seprate LL for MWDT and RWDT.
- Add a combined WDT HAL for all Watchdog Timers
- Update int_wdt.c and task_wdt.c to use WDT HAL
- Remove most dependencies on LL or direct register access
  in other components. They will now use the WDT HAL
- Update use of watchdogs (including RTC WDT) in bootloader and
  startup code to use the HAL layer.
2020-03-26 02:14:02 +08:00
Marius Vikhammer
37369a8a57 crypto: SHA and AES accelerator bring up for S2
Brings up, fixes and enables AES and SHA hardware acceleration.

Closes IDF-714
Closes IDF-716
2020-03-11 15:09:45 +08:00
Li Shuai
c796e14964 added psram stack check in backtrace 2020-03-03 11:52:29 +08:00
Angus Gratton
04ccb84b83 Merge branch 'feature/cpu_abstraction' into 'master'
CPU related operations abstraction

See merge request espressif/esp-idf!7301
2020-02-28 11:54:29 +08:00
Angus Gratton
d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Renz Christian Bagaporo
cefc71cdcd bootloader_support: mem-related initializations using cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
f3c6320ff6 soc: implement cpu utils in terms of cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
c9a51bfbb2 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00
Renz Christian Bagaporo
1f2e2fe8af soc: separate abstraction, description and implementation 2020-02-11 14:30:42 +05:00
Andrei Gramakov
4e8b4b9e49 soc: add USB peripheral register definitions, hal level, reg map, etc 2020-02-10 08:33:39 +00:00
Michael (XIAO Xufeng)
7026087dc0 spi: support esp32s2 2020-01-26 17:24:12 +08:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Felipe Neves
73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
2020-01-22 06:20:34 +08:00
morris
1c2cc5430e global: bring up esp32s2(not beta) 2020-01-16 17:41:31 +08:00
Darian Leung
a049e02d96 can: Refactor CAN to use HAL and LowLevel layers
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:

- Added bit field members to can_message_t as alternative
  to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
2020-01-09 16:13:51 +08:00
Angus Gratton
7dc7557aa9 soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory
In single core mode, APP CPU cache region is added to the available range.
2020-01-03 17:31:40 +11:00
Ivan Grokhotkov
d9534b3d6a soc: fix backtraces containing ROM functions
esp_ptr_executable would return false for pointers to ROM, which would
interrupt the backtrace. This makes ROM ranges recognized as
executable.
2020-01-02 18:42:46 +01:00
Ivan Grokhotkov
e4d45608d3 soc: add ledc_caps.h, replace target-based ifdefs with caps-based 2019-12-28 20:33:21 +00:00
Renz Christian Bagaporo
e6ad330018 ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation
Otherwise IRAM usage is too high in this example.
2019-11-28 09:20:00 +08:00
Fu Zhi Bo
3a468a1ffd Refactor the touch sensor driver 2019-11-27 20:08:44 +08:00
houwenxiang
f27ae9b0e2 feature: Add uart hal support. 2019-11-26 20:01:50 +08:00