alex/esp-idf
alex/esp-idf
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34,347 Commits 20 Branches 148 Tags 384 MiB
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512 Commits

Author SHA1 Message Date
Laukik Hase
17ffe58051
fix(esp_hw_support): Fix the flash I/DROM region PMP protection 2024-04-03 15:48:46 +05:30
Li Shuai
2d0ac9208e fix(esp_hw_support): fixed modem hang caused by incorrect configuration of power and isolate signals 2024-04-03 10:43:13 +08:00
Jiang Jiang Jian
08299f5f9b Merge branch 'bugfix/fix_maximum_value_of_config_rtc_clk_cal_cycles_bug_v5.2' into 'release/v5.2' 
ESP All Chip: fixed the maximum value of config RTC_CLK_CAL_SYCLES bug (v5.2)

See merge request espressif/esp-idf!29648
 2024-03-15 11:10:38 +08:00
hongshuqing
7771d72d7c fix: fix_maximum_value_of_config_rtc_clk_cal_cycle_bug 2024-03-14 16:11:20 +08:00
chaijie@espressif.com
c7660fe26d fix: fix sleep fast_mem & slow_mem may lost bug 2024-03-14 15:03:41 +08:00
Laukik Hase
68442ecaa0
refactor(esp_hw_support): Remove redundant PMP entry for ROM region 
- The ROM text and data sections share the address range
    (see SOC_I/DROM_MASK_LOW - SOC_I/DROM_MASK_HIGH).
  - Initially, we had two PMP entries for this address range - one marking the
    region as RX and the other as R.
  - However, the latter entry is redundant as the former locks the PMP settings.
  - We can divide the ROM region into text and data sections later when we
    define boundaries marking these regions from the ROM.
 2024-03-01 10:25:07 +05:30
Laukik Hase
a56fc41215
fix(esp_hw_support): Fix the I/DCACHE region PMP protection 2024-03-01 10:25:07 +05:30
hongshuqing
b3a73d5b63 feat(pmu): set fix voltage to different mode for esp32c6 2024-02-22 14:49:01 +08:00
Jiang Jiang Jian
3c7c5829b7 Merge branch 'h2_auto_dbias_master_hsq_v5.2' into 'release/v5.2' 
ESP32H2: Active & sleep dbias get from efuse to fix the voltage (v5.2)

See merge request espressif/esp-idf!28714
 2024-02-21 10:49:16 +08:00
wuzhenghui
2cd8335818
feat(esp_hw_support): support gdma register context sleep retention 2024-02-18 15:57:15 +08:00
Mahavir Jain
e173895618 fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-29 13:57:04 +08:00
hongshuqing
9373d53ce7 feat(pmu): set fix voltage to different mode for esp32h2 
h2 remove include
 2024-01-26 11:36:57 +08:00
Michael (XIAO Xufeng)
e1dfdf26bc Merge branch 'bugfix/recalib_bbpll_before_tuning_v5.2' into 'release/v5.2' 
fix(bbpll): fix bbpll may not lock or not stable bug for stop early (ESP32C2/S3/C6/H2) (v5.2)

See merge request espressif/esp-idf!28284
 2024-01-17 21:30:10 +08:00
Jiang Jiang Jian
e8a5fdcff3 Merge branch 'feat/max_ver_c3_199_v5.2' into 'release/v5.2' 
feat(soc): Increase max supported version of C3 to 1.99 (v5.2)

See merge request espressif/esp-idf!26822
 2024-01-11 14:15:49 +08:00
Lou Tianhao
745a1f492e feat(pm): support PMU trigger regdma when PU TOP 2024-01-08 21:23:28 +08:00
Xiao Xufeng
ea45c22a5c fix(rtc): fixed bbpll not calibrated from bootloader issue 2024-01-05 10:24:49 +08:00
chaijie@espressif.com
016b63dacf fix(bbpll): fix bbpll calibration may stop early bug(ESP32C2/S3/C6/H2) 2024-01-05 03:22:44 +08:00
Michael (XIAO Xufeng)
39dd85639a feat(soc): Increase max supported version of C3 to 1.99 2024-01-04 15:08:31 +08:00
Marius Vikhammer
b5785b41eb docs(esp32p4): update misc docs for esp32p4 2024-01-03 18:26:55 +08:00
wuzhenghui
83b6c79f93
fix(esp_hw_support/sleep): wait flash ready after non-pd_top lightsleep for esp32c6 2023-12-27 15:34:55 +08:00
Jiang Jiang Jian
99d10ca3d2 Merge branch 'change/change_regdma_power_issue_macro_v5.2' into 'release/v5.2' 
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (backport v5.2)

See merge request espressif/esp-idf!27992
 2023-12-25 20:38:48 +08:00
Lou Tianhao
7b5799830c change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-19 11:52:25 +08:00
cjin
bff4001473 fix(pm): place extra link opt in iram 2023-12-14 11:19:05 +08:00
wuzhenghui
7b3c08e37a
fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process 
Closes https://github.com/espressif/esp-idf/issues/12695
 2023-12-08 13:59:52 +08:00
Jakob Hasse
e3653aaa98 fix(esp_hw_support): Removed unused include directories from cmake 
* Closes https://github.com/espressif/esp-idf/issues/12700
 2023-12-04 12:59:51 +08:00
wuzhenghui
adc8351458 fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable 2023-11-16 11:47:20 +08:00
Jiang Jiang Jian
e0286e24c8 Merge branch 'bugfix/lp_active_slow_clock_domain_default_power_down_v5.2' into 'release/v5.2' 
backport v5.2: In the LP ACTIVE state, the slow clock power domain is by default in a powered-off state

See merge request espressif/esp-idf!26998
 2023-11-09 12:14:24 +08:00
Li Shuai
2a968da432 change(Power Management): the xpd_xtal32k value depends on system slow clock source config option when pmu initialize 2023-11-08 14:55:14 +08:00
Armando
f01a40afe2 fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12 
By design, it's 12 dB. There're errors among chips, so the actual
attenuation will be 11dB more or less
 2023-11-07 14:11:10 +08:00
Jiang Guang Ming
5f00b8a4d5 fix(esp32c3): Update esp32c3 chip revision 2023-10-20 11:01:07 +08:00
Armando
70314b56d5 feat(sdmmc): supported sd2.0 on esp32p4 2023-10-18 11:57:55 +00:00
zlq
9c2d470465 feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64 
MHz
 2023-10-12 14:51:54 +08:00
Xiao Xufeng
28ba080c5e Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2" 
This reverts commit b221f87e00.
 2023-10-12 14:51:54 +08:00
Gao Xu
d52040a86d Merge branch 'esp32p4/add_uart_support' into 'master' 
UART: Add uart support for ESP32P4

Closes IDF-6511 and IDF-7506

See merge request espressif/esp-idf!25388
 2023-10-09 18:11:10 +08:00
Lou Tian Hao
adae54faca Merge branch 'bringup/support_callback_mechanism_in_lightsleep_flow' into 'master' 
Power Management: support_callback_mechanism_in_lightsleep_flow

Closes WIFI-5936

See merge request espressif/esp-idf!24597
 2023-10-08 20:16:01 +08:00
gaoxu
4541ad134d feat(uart): add RCC atomic block to uart/lp-uart peripheral 2023-10-08 10:10:02 +08:00
gaoxu
c7afa0dcef feat(uart): uart(hp,lp) support on esp32p4 2023-10-08 10:10:00 +08:00
gaoxu
8efe950077 fix(adc): power settings not taking into effect on H2 2023-09-28 17:41:42 +00:00
wuzhenghui
c8083b07bf feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe 2023-09-28 17:41:42 +00:00
gaoxu
817036f46f fix(adc): power settings not taking into effect on C6 2023-09-28 17:41:42 +00:00
Kevin (Lao Kaiyao)
4c6f4b39f1 Merge branch 'feature/support_i2s_on_p4' into 'master' 
feat(i2s): support i2s on esp32p4

Closes IDF-6508

See merge request espressif/esp-idf!24280
 2023-09-29 00:50:04 +08:00
laokaiyao
72a0746e62 refactor(apll): move the apll soc caps to clk_tree_ll 2023-09-28 15:03:27 +08:00
laokaiyao
cf889f3c6d feat(i2s): support i2s on esp32p4 2023-09-28 15:03:27 +08:00
zlq
b221f87e00 feat(volt): chip auto adjust volt for esp32c6 & esp32h2 2023-09-28 05:55:42 +00:00
Kevin (Lao Kaiyao)
9a239b8367 Merge branch 'feature/support_analog_comparator_on_p4' into 'master' 
feat(ana_cmpr): supported analog comparator on esp32p4

Closes IDF-7479

See merge request espressif/esp-idf!24873
 2023-09-27 04:24:09 +08:00
Jiang Jiang Jian
2ec907e621 Merge branch 'bugfix/fix_sleep_risk_vol_param' into 'master' 
bugfix(sleep): fix risk sleep vol param for esp32c6 & esp32h2

See merge request espressif/esp-idf!25993
 2023-09-26 14:06:56 +08:00
laokaiyao
ff7a11e539 feat(ana_cmpr): supported etm in analog comparator example 2023-09-25 19:57:34 +08:00
chaijie@espressif.com
76aca4cc8a fix(sleep): fix inproper sleep vol param for esp32c6 & esp32h2 2023-09-25 16:37:35 +08:00
Lou Tianhao
450e685cb7 feat(PowerManagement/lightsleep): Support ESP_SLEEP_EVENT_CALLBACKS 2023-09-25 15:39:18 +08:00
harshal.patil
6a7caa7b8e
feat(esp_hw_support): Added locking mechanism for the ECDSA and ECC peripheral 2023-09-20 16:05:50 +05:30