Armando
c331c85318
mspi: make cpu clock source switch safe
...
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
2021-10-19 21:47:27 +08:00
wuzhenghui
5000aa877f
fix rtc_clk_cal: Wait for timeout in a loop instead of just judge once
2021-10-19 12:07:34 +08:00
wuzhenghui
ab9df9945f
fix stuck in rtc_clk_cal
2021-10-14 16:25:54 +08:00
Li Shuai
73829221f5
esp_hw_support: force power down wifi and bt power domain when rtc module init
2021-10-14 10:51:10 +08:00
Armando
16a91399f1
psram: put opiram_psram and spiram_psram in internal ram
...
External memory is accessed via SPI0. When modifying the SPI0 registers,
should put the code in internal RAM. Otherwise when there is an ongoing
SPI0 transaction, CPU changes the SPI0 registers. This is dangerous.
Besides, modifying SPI0 registers may lead external memory to an
unstable state. Therefore putting these code in internal RAM is
necessary.
2021-10-08 17:39:41 +08:00
Armando
7ff9332243
rtc: fix mspi timing issue when self-calibrate ocode
...
When doing OCode self-calibration in rtc_init.c, it will change the
system clock from PLL to XTAL, which is in a lower frequency, and MSPI
timing tuning is not needed. Therefore we should modify the timing
configurations accordingly, and set it back after the calibration.
This is a temporary fix
2021-10-08 15:59:57 +08:00
Armando
4cafdbd83b
mspi: fix psram cs timing register setting not in iram bug
2021-10-08 15:59:57 +08:00
Armando
2655a506c9
mspi: support auto detect octal flash vendor
2021-10-08 15:59:57 +08:00
Jiang Jiang Jian
f5ae8b0533
Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master'
...
support RTC8M and XTAL power domain in light sleep mode
Closes IDF-3419
See merge request espressif/esp-idf!15152
2021-09-27 04:02:29 +00:00
Jiang Jiang Jian
a015123a1d
Merge branch 'feature/rename_apbctrl_to_syscon' into 'master'
...
rename apbctrl to syscon
See merge request espressif/esp-idf!14524
2021-09-16 12:58:07 +00:00
Wu Zheng Hui
1080e4f6a2
rename APB_CTRL ro SYS_CON
...
save
2021-09-16 20:57:57 +08:00
Armando (Dou Yiwen)
b9ea273e78
Merge branch 'feature/suppport_self_icode_calibration_on_s3' into 'master'
...
adc: support self calibration icode on s3
Closes IDF-3913
See merge request espressif/esp-idf!15195
2021-09-16 11:14:58 +00:00
Armando
ddd0235783
adc: support adc self-calibration on esp32s3
2021-09-16 15:17:29 +08:00
Li Shuai
b3e27403f3
esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep
2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22
Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep
2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde
esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator
2021-09-16 14:40:46 +08:00
Li Shuai
b59902f4d1
Merge branch 'bugfix/esp32s3_lightsleep_psram_leakage_current' into 'master'
...
fix SPIRAM leakage when its CS pin has no hardware pullup
See merge request espressif/esp-idf!14730
2021-09-16 04:07:58 +00:00
Armando
ea10dacf68
mspi: add octal psram get_cs_io function
2021-09-15 20:34:18 +08:00
chenjianqiang
9b53e18c44
add flash and PSRAM CS IO acquire function
2021-09-15 20:34:17 +08:00
Armando
c45c6f52f1
adc: support adc efuse-based calibration on esp32s3
2021-09-14 11:42:50 +08:00
Li Shuai
e44ead5356
Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep
2021-09-13 17:36:54 +08:00
Sachin Parekh
fa2707f1f3
hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3
...
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
2021-09-06 11:06:50 +05:30
Sachin Billore
f80d6f8c21
Digital Signature support for S3
...
Closes IDF-1791
2021-09-02 11:59:24 +05:30
Marius Vikhammer
bdf3a8ff29
Merge branch 'feature/xtwdt' into 'master'
...
WDT: Add support for XTAL32K Watchdog timer
Closes IDF-2575
See merge request espressif/esp-idf!15000
2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a
WDT: Add support for XTAL32K Watchdog timer
2021-09-02 09:09:00 +08:00
Armando
a3dc625da6
mspi: support 120MHz Quad Flash and PSRAM on ESP32S3
2021-08-31 16:06:44 +08:00
Wu Zheng Hui
3128a2544b
Adjust the variable name &
...
Add mapping support for different sizes of spi ram
2021-08-25 16:06:28 +08:00
Marius Vikhammer
465830312b
Merge branch 'update_copyright_notice_esp_hw_support_4' into 'master'
...
esp_hw_support: update copyright notice 4
See merge request espressif/esp-idf!14728
2021-08-13 08:40:15 +00:00
Jakob Hasse
1c3be690ed
[esp_hw_support]: HMAC upstream support for S3
2021-08-13 12:01:06 +08:00
Jan Brudný
f51e20d814
esp_hw_support: update copyright notice 4
2021-08-10 13:31:53 +02:00
Jan Brudný
562ce4d009
esp32s2, esp32s3: update copyright notice
2021-08-05 15:01:26 +02:00
Armando (Dou Yiwen)
03fb3973a2
Merge branch 'feature/support_quad_flash_octal_psram_on_esp32s3' into 'master'
...
mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3
Closes IDF-3603
See merge request espressif/esp-idf!14346
2021-08-04 03:57:16 +00:00
Armando
0f91a01a46
mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3
2021-08-03 16:54:00 +08:00
morris
21067a0455
spiram: add getter function to check psram initialization state
2021-07-30 11:23:26 +08:00
Jiang Jiang Jian
af9cb85e00
Merge branch 'feature/support_esp32s3_rtc_hw_support' into 'master'
...
esp_hw_support: add rtc module support for esp32s3
See merge request espressif/esp-idf!14368
2021-07-20 03:23:10 +00:00
sly
d6762a9fb7
esp_hw_support: add rtc module support for esp32s3
2021-07-19 11:17:48 +08:00
morris
2058e89448
Merge branch 'feature/fpga_bootloader' into 'master'
...
Boot ESP32 & ESP32-S2 apps on FPGA
See merge request espressif/esp-idf!8270
2021-07-18 08:06:38 +00:00
Renz Bagaporo
844af01eb4
esp32: move spiram, himem
2021-07-16 20:14:26 +08:00
Renz Bagaporo
452bfda367
esp32: move dport_access
2021-07-16 20:14:26 +08:00
Renz Bagaporo
702e41e1c8
esp32s2: move crypto related functions
2021-07-16 20:14:26 +08:00
Renz Bagaporo
ea2aafbb7a
esp32s2: move memprot api
2021-07-16 20:14:26 +08:00
Angus Gratton
bbbbd5cf0c
esp32s2: FPGA can boot to Hello World
2021-07-16 10:50:06 +10:00
Almir Okato
06a849b33e
rtc: Add missing esp_rom_sys.h header in rtc clk
...
rtc_clk.c for esp32, esp32s2 and esp32s3 did not include the
esp_rom_sys.h header which could cause implicit declaration issues for
some function calls.
2021-07-01 12:50:14 -03:00
Krzysztof Budzynski
f0b2926d70
Merge branch 'docs/s3_get_started' into 'master'
...
docs: updated getting started for S3
Closes IDF-3281 and IDF-3282
See merge request espressif/esp-idf!14174
2021-07-01 14:33:55 +00:00
Angus Gratton
2f8debdde1
Merge branch 'feature/esp32s3_remove_rtc_apb_freq_reg' into 'master'
...
esp32s3: Remove APB frequency RTC register
See merge request espressif/esp-idf!11137
2021-06-29 23:50:23 +00:00
Jiang Jiang Jian
d28417edbc
Merge branch 'bugfix/deep_sleep_rtcwdt_rst_issue' into 'master'
...
clear wakeup and reject int raw signal before entry sleep
Closes FCS-673
See merge request espressif/esp-idf!13982
2021-06-29 13:31:40 +00:00
Marius Vikhammer
638485b222
docs: updated getting started and other misc. guides for S3
2021-06-29 15:44:45 +08:00
Angus Gratton
57fa883127
esp32s3: Remove APB frequency RTC register
...
Usage of this register changed between ESP32-S3 beta2 and the
final chip.
2021-06-29 17:38:46 +10:00
Li Shuai
6ca207531b
deep sleep: clear wakeup and reject int raw signal before entry sleep
2021-06-29 11:59:54 +08:00
Marius Vikhammer
ee2f8b1a62
build system: always build with -fno-jump-tables & -fno-tree-switch-conversion
...
Jump tables placed in flash would cause issue with code that needed to be ran from IRAM.
These optimizations are now always disabled.
2021-06-24 14:54:10 +08:00
