Commit Graph

67 Commits

Author SHA1 Message Date
wanlei
535afdd7f4 feat(esp32c61): ci enable header check, fix c61 build 2024-03-27 19:39:59 +08:00
morris
5369b68bc8 change(flash): acquire the LDO channel used by flash
so that even if the same channel has other consumers, the voltage won't
be changed
2024-03-25 22:04:01 +08:00
Armando
13167d8479 change(flash): rename spi_timing_is_tuned to spi_flash_timing_is_tuned 2024-01-10 11:52:28 +08:00
Marius Vikhammer
52e3f09b32 refactor(spi): moved spi hw sharing func to hw support
Common spi functionality for sharing the SPI bus between modules is moved from esp_driver_spi to
a more fitting location in esp_hw_support (shared HW resource control).

This also allows us to decouple the spi_flash driver from esp_driver_spi, removing
esp_driver_spi and esp_ringbuf from G1 builds.
2023-11-20 12:07:54 +08:00
Cao Sen Miao
dcff5220a7 feat(spi_flash): Support configurable tSUS in flash suspend 2023-11-06 18:04:43 +08:00
Xiao Xufeng
1f5fb3f921 spi_flash: fixed issue that enabling HPM-DC by default may cause app unable to restart 2023-10-24 10:38:08 +08:00
Cao Sen Miao
ed96dadd06 spi_flash: 2nd stage for supporting flash suspend. (1). Support more esp chips (2). Improve real-time performance (3). Making timing more stable (4) Add documents 2023-05-11 20:10:30 +08:00
Armando
8eec6558d1 mspi: refactor timing tuning driver to make it compatible with p4 2023-05-04 17:05:35 +08:00
laokaiyao
b7053b46ef esp32h4: remove esp32h4 target from peripherals 2023-04-20 15:19:45 +08:00
gaoxu
542a61b6cb support SPI_FLASH_ENABLE_COUNTERS feature on esp_flash driver and rename the functions to esp_flash_xx 2023-04-06 11:40:40 +08:00
Cao Sen Miao
bc655a6890 spi_flash: Allow clock frequency up to 64M, and make it default on ESP32H2 2023-03-10 11:39:53 +08:00
Cao Sen Miao
4713a9a7f2 ESP32H2: Introduce new chip target esp32h2, hello_world example supported 2022-12-29 12:29:14 +08:00
Cao Sen Miao
fa3a8fdd91 esp_flash: correct veriable 'size' description 2022-11-28 16:54:03 +08:00
C.S.M
54d9da987a Merge branch 'bugfix/flash_large_memory_size' into 'master'
spi_flash: Fix issue that cannot get accurate flash size when encounter large size memory

Closes IDFGH-8063

See merge request espressif/esp-idf!20738
2022-11-22 16:07:17 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
Cao Sen Miao
b4964279d4 spi_flash: Fix issue that cannot get accurate flash size when encounter large size memory,
Closes https://github.com/espressif/esp-idf/pull/9566
2022-10-31 11:05:36 +08:00
Cao Sen Miao
2c9bb4eb7d spi_flash: Support select flash mode automatically at run time(Quad flash or Octal flash) 2022-10-18 11:25:35 +08:00
wuzhenghui
ff8dd1e1a8 esp32c6: add spi_flash support 2022-09-26 20:32:13 +08:00
Cao Sen Miao
ec6a56ed0c spi_flash: re-enable the HPM mode on several XMC chips 2022-07-22 09:54:56 +08:00
Cao Sen Miao
a690a87829 spi_flash: Remove legacy spi_flash drivers 2022-07-01 11:01:34 +08:00
Armando
f31d88e3fe spi: move spi_common_internal to esp_private 2022-06-24 19:12:13 +08:00
Cao Sen Miao
4418a855ba spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2 2022-04-26 15:22:37 +08:00
Michael (XIAO Xufeng)
46b5363e39 spi_flash: forbid writing to main flash when using invalid init arguments
Also refactored the init code to make the logic of device (CS) acquiring
more centralized.

Resolves: https://github.com/espressif/esp-idf/issues/8556
2022-04-13 18:02:34 +08:00
songruojing
c8c137f2b7 esp32h2: support GPIO peripheral, IO_MUX, GPIO matrix.
Generic GPIO example is supported as well.
2022-03-04 11:25:05 +08:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Cao Sen Miao
3a4db97cec spi_flash: move patch files to common rom patch folder 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3dd1cfea18 spi_flash: refactor spi_flash.h to decline duplicated code 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3934e24d22 ESP8684: add spi_flash, efuse, hw_support support 2021-11-06 17:33:44 +08:00
Armando
c331c85318 mspi: make cpu clock source switch safe
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
2021-10-19 21:47:27 +08:00
Armando
2655a506c9 mspi: support auto detect octal flash vendor 2021-10-08 15:59:57 +08:00
Cao Sen Miao
6c0aebe279 esp_flash: add opi flash support in esp_flash chip driver, for MXIC 2021-09-07 14:44:40 +08:00
Cao Sen Miao
559c1ac3f9 esp_flash: add support mxic as a main flash under spi mode 2021-09-05 00:33:28 +08:00
Armando
d325f4d557 mspi: support octal flash 120M STR mode on esp32s3 2021-08-19 10:44:30 +08:00
Shu Chen
6fce2930d0 esp32h2: enable more components to support esp32h2
Involved components:
 * app_trace
 * esp-tls
 * esp_adc_cal
 * esp_pm
 * esp_serial_slave_link
 * esp_timer
 * freertos
 * idf_test
 * log
 * mbedtls
 * newlib
 * perfmon
 * spi_flash
 * spiffs
 * ulp
 * unity
 * vfs
2021-07-01 19:53:11 +08:00
Cao Sen Miao
08f1bbe0c7 spi_flash: fix cs line setup to make the flash driver more stable 2021-06-01 16:41:41 +08:00
Michael (XIAO Xufeng)
8cfcf6da7a Merge branch 'bugfix/enable_gpio18_gpio19_esp32c3' into 'master'
gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3

Closes IDF-2964

See merge request espressif/esp-idf!12753
2021-04-12 09:39:55 +00:00
Omar Chebib
cd79f3907d gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
2021-04-08 14:01:18 +08:00
Armando
9b9ea71ff9 spi: remove HSPI macro on esp32c3 and esp32s3 2021-04-06 13:42:49 +08:00
Cao Sen Miao
9905da46e0 spi_flash: Add auto suspend mode on esp32c3 2021-01-25 11:14:02 +08:00
KonstantinKondrashov
1f37a5f162 spi_flash(esp32-s2): Add the workaround of a reboot issue when SPI HW suspend is enabled 2021-01-25 11:13:38 +08:00
KonstantinKondrashov
60e58eaddb spi_flash: Add auto-suspend mode for ESP32-S2
Uses HW auto_wait_idle, HW auto_suspend and SW resume
2021-01-25 11:13:38 +08:00
Michael (XIAO Xufeng)
7f3e61cf63 esp_flash: add support for external flash on C3 2020-12-22 13:31:04 +08:00
Angus Gratton
06ec032c0c spi_flash: Simplify init-time size check 2020-12-17 15:34:13 +11:00
Angus Gratton
d4c9a45675 spi_flash: Add ESP32-C3 support
Based on internal commit 3ef01301fff
2020-12-17 15:34:13 +11:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Michael (XIAO Xufeng)
3bacf35310 esp_flash: support high capacity flash chips (32-bit address) 2020-10-29 18:20:11 +08:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
Michael (XIAO Xufeng)
c7b1436485 esp_flash: fix cs_initialize issue on esp32s2 2020-07-27 12:27:05 +08:00
Angus Gratton
e04eacbe3f Merge branch 'refactor/common_rom_efuse_apis' into 'master'
esp_rom: extract common efuse apis into esp_rom_efuse.h

See merge request espressif/esp-idf!9267
2020-07-17 15:57:28 +08:00
morris
458b14a8ea esp_rom: extract common efuse apis into esp_rom_efuse.h 2020-07-15 10:40:50 +08:00